Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | be more explicit about listing .v files | bryan newbold | 2013-06-06 | 1 | -0/+3 |
* | BUGS | bryan newbold | 2013-06-05 | 1 | -0/+1 |
* | add 'make lint' verilog-build command; requires verilator | bryan newbold | 2013-06-05 | 1 | -1/+4 |
* | README: fix typo. | Marti Bolivar | 2013-04-26 | 1 | -1/+1 |
* | update README, comments, .xise project file | bryan newbold | 2013-04-26 | 3 | -12/+56 |
* | update with bnewbold's changes | bryan newbold | 2013-03-27 | 3 | -76/+68 |
* | initial colorization stuff | bryan newbold | 2013-03-27 | 2 | -1/+105 |
* | compile in multiple tb-modules (this might slow things down for you) | bryan newbold | 2013-03-21 | 1 | -2/+6 |
* | add .ucf file reference | bryan newbold | 2013-03-21 | 1 | -1/+1 |
* | isim in the background; hackisly fix deps | bryan newbold | 2013-03-20 | 1 | -4/+4 |
* | fix 'main' in tb.v | bryan newbold | 2013-03-20 | 1 | -1/+1 |
* | fixes to simulate | bryan newbold | 2013-03-20 | 1 | -8/+6 |
* | Corrects comments (clock is 200MHz, not 100MHz) and removed incorrect clock t... | jesstherobot | 2013-03-20 | 1 | -7/+1 |
* | 'main', not 'project' top module by default | bryan newbold | 2013-03-14 | 2 | -3/+3 |
* | fix ise project pointers | bryan newbold | 2013-03-14 | 2 | -10/+20 |
* | improvements | bryan newbold | 2013-03-14 | 5 | -37/+54 |
* | update README; gitignore ./build | bryan newbold | 2013-03-13 | 2 | -15/+24 |
* | some simulation stuff | bryan newbold | 2013-03-13 | 3 | -3/+45 |
* | move stuff around; backup | bryan newbold | 2013-03-13 | 10 | -15/+389 |
* | basic synthesis version of makefile | bryan newbold | 2013-03-13 | 9 | -56/+238 |
* | add basic gitignore | bryan newbold | 2013-03-10 | 4 | -34/+53 |
* | added the base files | Andrew J Meyer | 2013-03-06 | 12 | -0/+235 |
* | Initial checkin and readme | Andrew J Meyer | 2013-03-06 | 1 | -0/+34 |