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| author | bryan newbold <bnewbold@leaflabs.com> | 2013-03-20 13:46:45 -0400 |
|---|---|---|
| committer | bryan newbold <bnewbold@leaflabs.com> | 2013-03-20 13:46:45 -0400 |
| commit | 1096238a48134550146188acf2bc2e1748c8703d (patch) | |
| tree | 08a4d685475454ac4c1e9d799a3cfddf3caa57f4 | |
| parent | f51040dfc4f8581469997d43f1e723e0fedc1338 (diff) | |
| download | basic-hdl-template-1096238a48134550146188acf2bc2e1748c8703d.tar.gz basic-hdl-template-1096238a48134550146188acf2bc2e1748c8703d.zip | |
isim in the background; hackisly fix deps
| -rw-r--r-- | contrib/xilinx.mk | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/contrib/xilinx.mk b/contrib/xilinx.mk index 3693e17..1f19d40 100644 --- a/contrib/xilinx.mk +++ b/contrib/xilinx.mk @@ -189,7 +189,7 @@ junk += $(project)_err.twr $(project)_err.twx .gitignore: $(mkfiles) echo programming_files $(junk) | sed 's, ,\n,g' > .gitignore -tb/simulate_isim.prj: $(tbfiles) +tb/simulate_isim.prj: $(tbfiles) $(vfiles) $(mkfiles) rm -f $@ for f in $(vfiles); do \ echo "verilog unenclib ../$$f" >> $@; \ @@ -199,10 +199,10 @@ tb/simulate_isim.prj: $(tbfiles) done echo "verilog unenclib $(iseenv)/ISE/verilog/src/glbl.v" >> $@ -tb/isim: tb/simulate_isim.prj +tb/isim: tb/simulate_isim.prj $(tbfiles) $(vfiles) $(mkfiles) bash -c "$(sim_env); cd ../tb/; vlogcomp -prj simulate_isim.prj" -tb/simulate_isim: tb/isim +tb/simulate_isim: tb/isim $(tbfiles) $(vfiles) $(mkfiles) bash -c "$(sim_env); cd ../tb/; fuse -lib unisims_ver -lib secureip -lib xilinxcorelib_ver -lib unimacro_ver -lib iplib=./iplib -lib unenclib -o simulate_isim unenclib.tb unenclib.glbl" simulate: tb/simulate_isim @@ -211,7 +211,7 @@ isim_cli: simulate bash -c "$(sim_env); cd ../tb/; ./simulate_isim" isim: simulate - bash -c "$(sim_env); cd ../tb/; ./simulate_isim -gui -view signals.wcfg" + bash -c "$(sim_env); cd ../tb/; ./simulate_isim -gui -view signals.wcfg &" ise: @echo "!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!" |