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Author
Age
Files
Lines
*
refactor project -> exampleproj
bryan newbold
2013-10-09
1
-1
/
+1
*
move around device-specific Makefile includes for easier target swapping
bryan newbold
2013-10-09
1
-2
/
+5
*
basic rot13 UART demo working
bryan newbold
2013-10-08
1
-0
/
+1
*
clean up test stuff
bryan newbold
2013-10-08
1
-3
/
+3
*
working xula2 sim/syn/prog system
bryan newbold
2013-10-08
1
-16
/
+17
*
add test/ and isim/ system
bryan newbold
2013-10-06
1
-7
/
+12
*
add concept of 'board' for seperate ucfs and top level modules
bryan newbold
2013-10-04
1
-2
/
+10
*
very minor style tweaks from downstream repos
bryan newbold
2013-06-19
1
-1
/
+1
*
proper Makefile syntax; device-specific; mcs bitwidth
bryan newbold
2013-06-19
1
-14
/
+22
*
be more explicit about listing .v files
bryan newbold
2013-06-06
1
-0
/
+3
*
update README, comments, .xise project file
bryan newbold
2013-04-26
1
-0
/
+4
*
update with bnewbold's changes
bryan newbold
2013-03-27
1
-2
/
+4
*
'main', not 'project' top module by default
bryan newbold
2013-03-14
1
-1
/
+1
*
improvements
bryan newbold
2013-03-14
1
-3
/
+8
*
some simulation stuff
bryan newbold
2013-03-13
1
-1
/
+4
*
move stuff around; backup
bryan newbold
2013-03-13
1
-3
/
+5
*
basic synthesis version of makefile
bryan newbold
2013-03-13
1
-0
/
+11