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| author | bnewbold <bryan@octopart.com> | 2012-01-20 19:14:58 -0500 |
|---|---|---|
| committer | bnewbold <bryan@octopart.com> | 2012-01-20 19:14:58 -0500 |
| commit | 889a5a5395872eeb3740d5d3281b56c7afa47a6f (patch) | |
| tree | c0efd6404ffdbdfe7f88a173f0836919efdf0184 /ip/clk_wiz_v3_1_0/coregen.cgp | |
| download | netv_fpga_hdmi_overlay-889a5a5395872eeb3740d5d3281b56c7afa47a6f.tar.gz netv_fpga_hdmi_overlay-889a5a5395872eeb3740d5d3281b56c7afa47a6f.zip | |
initial import from NeTV archive
This repository is simply a mirror of the file
fpga/hdmi_overlay_0xD_src.tgz downloaded from
http://www.kosagi.com/netv_hardware/ on Jan 19th, 2011.
It seems to contain all the verilog and scripts required to build FPGA
firmware for the NeTV HDMI device from Chumby/Sutajio Ko-Usagi; see
http://www.kosagi.com/blog/ for more information.
Licensing is vague; see ip/license.txt
Diffstat (limited to 'ip/clk_wiz_v3_1_0/coregen.cgp')
| -rwxr-xr-x | ip/clk_wiz_v3_1_0/coregen.cgp | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/ip/clk_wiz_v3_1_0/coregen.cgp b/ip/clk_wiz_v3_1_0/coregen.cgp new file mode 100755 index 0000000..555710a --- /dev/null +++ b/ip/clk_wiz_v3_1_0/coregen.cgp @@ -0,0 +1,22 @@ +# Date: Tue Aug 09 21:35:33 2011 +
+SET addpads = false +SET asysymbol = true +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = false +SET designentry = Verilog +SET device = xc6slx9 +SET devicefamily = spartan6 +SET flowvendor = Other +SET formalverification = false +SET foundationsym = false +SET implementationfiletype = Ngc +SET package = tqg144 +SET removerpms = false +SET simulationfiles = Behavioral +SET speedgrade = -2 +SET verilogsim = true +SET vhdlsim = false +SET workingdirectory = ./tmp/ +
+# CRC: e7d90245
|