| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
| |
This has gone unmaintained for long enough.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
1) Reset, halt, and unprotect the the flash before writing to it.
This fixes a bug in which every other flash attempt would fail.
2) Maple R5 and below have NRST and JTNRST erroneously tied together,
resulting in a full TAP and system reset when a reset is asserted.
This prevents the 'reset halt' command from working.
This can be fixed hard-hack style by cutting the trace out of JTNRST.
Users of the Leaf Maple JTAG adapter will also need to cut the trace
between TRST and SRST.
3) Assuming you have a functioning 'reset halt' setup (see 2),
the 'make debug' command now halts the chip and waits for a gdb
connection before proceeding execution.
|
| |
|
|
|
| |
Small script to detect the openocd version and choose the appropriate
debug/flash script for use with JTAG debugging.
|
| |
|
|
|
|
| |
flash and run scripts for opencd v0.4.0
also snuck in a gitignore rule for notes/
|
| |\ |
|
| | |
| |
| |
| | |
Still not working but fixed a lot of merge errors
|
| |/ |
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Major build system rewrite. New and exciting:
1. Proper dependency tracking. All source files including header files
should be properly tracked and recompiled as necessary when they are
changed.
2. Build-type tracking. If the target changes from 'ram' to 'flash,'
for example, the build system will force a rebuild rather than
incorrectly link modules to a different address.
3. New targets:
The old 'ram,' 'flash,' and 'jtag' targets have been replaced with
the environment variable MAPLE_TARGET, which controls the link address.
Users can either export it to their environment, or pass MAPLE_TARGET on
the command-line. Once this is set, sketches can be compiled with 'make
sketch,' or simply 'make.'
Note: the default is MAPLE_TARGET='flash.'
The target 'install' now automagically uploads the sketch to the board
using the appropriate method.
The 'run' target has been renamed to 'debug.' It starts an openocd gdb
server.
4. Odds and ends:
-Verbose and 'quiet' modes. Set V=1 for verbose compilation, the default
is quiet.
-Object file sizes and disassembly information is generated and placed
in build/$(BOARD).sizes and build/$(BOARD).disas, respectively.
-Parallel make with -j should speed things up if you have multiple
cores.
|
| | |
|
| |
|
