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* new MIT-licensed wirish_math implementationHEADmasterbnewbold2015-06-131-29/+39
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* fix timer capture TI1/TI2 bugbnewbold2015-06-131-10/+18
| | | | | | | | | | | | | | | | | | | Somewhat confusingly, the TI1/TI2 fields for capture/compare channels 2 and 4 are both flipped compared to channels 1 and 3 and do not correspond to the binary numbers. Section 15.4.7 of RM0008 (STM32F1 series) and Section 12.4.7 of RM0368 (STM32F4 series) read: CC1S: Capture/Compare 1 selection 01: CC1 channel is configured as input, IC1 is mapped on TI1 10: CC1 channel is configured as input, IC1 is mapped on TI2 CC2S: Capture/Compare 2 selection 01: CC2 channel is configured as input, IC2 is mapped on TI2 10: CC2 channel is configured as input, IC2 is mapped on TI1 This commit closes github issue #12 reported by GatorCh.
* docs: add some linux gcc troubleshooting entriesbnewbold2015-06-131-0/+26
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* docs: small improvements to stylesheetbnewbold2015-06-131-5/+18
| | | | | | - make large #define lists look a little less confusing - remove background coloring from 'tt' (aka, any small monospace snippets)
* stm32f2-f4: docs for i2c_reg_map being target-specificbnewbold2015-06-131-1/+2
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* stm32f2-f4: refactor docs to use stm32f2_f4 namespacebnewbold2015-06-138-48/+48
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* stm32f2-f4: refactor wirish doxygen paths and commentsbnewbold2015-06-134-7/+7
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* squelch doxygen complaints about stm32f1 SPI header type signaturebnewbold2015-06-131-3/+4
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* stm32f2-f4: fix doxygen evil_manglerbnewbold2015-06-131-1/+2
| | | | | | | Now detects "stm32f2-f4" as a valid series, and rewrites it to "stm32f2_f4" as a namespace. Documentation will need to be refactored to point at this new namespace.
* stm32f2-f4: refactor header guards, doxygen commentsbnewbold2015-06-1314-70/+70
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* stm32f2-f4: refactor internal doxygen file referencesbnewbold2015-06-1321-21/+21
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* wirish: enable HardwareSPI for STM32F2-4bryan newbold2015-06-122-3/+1
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* wirish/HardwareSPI: use board-agnostic SPI rates (dividers)bryan newbold2015-06-121-4/+4
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* wirish/HardwareSPI: board-specific (CPU rate) SPIFrequency entriesbryan newbold2015-06-121-8/+31
| | | | This is part of adding STM32F2-4 HardwareSPI support.
* F401RB is almost identical to F401CCbryan newbold2015-06-121-1/+1
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* stm32f2-f4: rcc.h: order RCC_TIMER* numerically, not alphabeticallybryan newbold2015-06-121-5/+5
| | | | This avoids a bug with instantiating Wirish HardwareTimers.
* wirish/stm32f2-f4/boards_setup.cpp: very minor F4 typobryan newbold2015-06-121-1/+1
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* Merge branch 'legacy'bnewbold2015-05-2820-102/+115
|\ | | | | | | | | - superficial rebranding to librambutan - bugfixes to documentation syntax
| * superficial librambutan rebrandingbnewbold2015-05-283-44/+43
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| * docs: superficial librambutan rebrandingbnewbold2015-05-285-42/+43
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| * legacy branch: set docs release to 'legacy'bnewbold2015-05-281-1/+1
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| * gitignore: doxygen_sqlite3.db and self-referencebnewbold2015-05-271-0/+4
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| * docs: many small broken ref fixes, syntax bugfixesbnewbold2015-05-2710-15/+24
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| * docs: point doxygen fail to the correct READMEbnewbold2015-05-271-1/+1
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| * Adding support for NUCLEO-F103RBGrégoire Passault2015-05-273-0/+261
| | | | | | | | Signed-off-by: Grégoire Passault <g.passault@gmail.com>
| * Generate .hex files as well.Grégoire Passault2015-05-272-1/+4
| | | | | | | | | | Signed-off-by: Grégoire Passault <g.passault@gmail.com> Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
| * [Makefile] Easier adding of sourcesGregwar2015-05-271-3/+6
| | | | | | | | | | Signed-off-by: Grégoire Passault <g.passault@gmail.com>, Quentin Rouxel <qrouxel@labri.fr>
| * libmaple_types.h: add ifndef guards for some macrosMarti Bolivar2015-05-271-0/+4
| | | | | | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
| * Revert "always clear ISR DMA bit before even calling handler"Jonatan Olofsson2015-05-271-1/+1
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| * stm32f1: gpio.h: silence yet more __always_inline warningsMarti Bolivar2015-05-271-3/+1
| | | | | | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
| * Wire: release the bus on errorMarti Bolivar2015-05-271-0/+2
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| * Fix hang on usart read overrun.Joseph Birr-Pixton2015-05-271-5/+12
| | | | | | | | | | | | | | | | | | | | This is improved on the previous patch: if we get an ORE without RXNE when we don't write a junk byte to our buffer. It also avoids the strange-looking blind read. See issue #107 for more info. Signed-off-by: Joseph Birr-Pixton <jpixton@gmail.com>
* | Fix hang on usart read overrun.Joseph Birr-Pixton2015-05-271-5/+12
| | | | | | | | | | | | | | | | | | | | This is improved on the previous patch: if we get an ORE without RXNE when we don't write a junk byte to our buffer. It also avoids the strange-looking blind read. See issue #107 for more info. Signed-off-by: Joseph Birr-Pixton <jpixton@gmail.com>
* | travis CI: STM32F401CDISCOVERY build fails because of SerialUSBbnewbold2015-03-031-0/+1
| | | | | | | | | | Need a better test build file that exersizes more of the code base, but only the available hardware features.
* | st_stm32f401cdiscovery: USART3 pins; clearer pin referencesbnewbold2015-03-031-12/+10
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* | travis CI: add STM32F401CDISCOVERY build targetbnewbold2015-03-031-0/+1
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* | travis CI: make for JTAG targets by defaultbnewbold2015-03-031-1/+1
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* | st_stm32f401cdiscovery: better wirish board supportbnewbold2015-03-031-5/+27
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* | stm32f4: 32bit-float-friendly GCC flagsbnewbold2015-03-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit makes 'float' (32-bit) the default for floating point constants in the source code, instead of the defaults 'double' (64-bit). Floating point performance is very sensitive to the float vs. double distinction on 32-bit processors, especially Cortex-M4s with a VFP unit for floats but not doubles. In the future it may be wise to make this change for non-hard-fp chips (aka, all the other STM32s) as well, for behavioral consistancy. The warning flag ensures that the frequently used parts of the code base will be less ambiguous, but doesn't cover series-specific code.
* | stm32f4: wirish: fill in board_setup support for STM32F4bnewbold2015-03-031-13/+56
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* | stm32f4: fill in exception handling infrastructurebnewbold2015-03-031-1/+35
| | | | | | | | Eg, for HardFault or assert() failures.
* | wirish_math: explicit type casts for round()bnewbold2015-03-031-1/+2
| | | | | | | | | | | | | | | | This is to squash type promotion warnings and ambiguity (float vs. double). A roundf() macro is introduced for use with floats, matching the POSIX/C99 convention.
* | stm32f4: add F4-specific IRQ entriesbnewbold2015-03-032-0/+10
| | | | | | | | | | Perhaps these should be in F4-specific files instead of the shared F2-F4 files?
* | stm32f4: note possibly incorrect max_baud entriesbnewbold2015-03-031-3/+3
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* | stm32f4: begin filling out F4 suport in headersbnewbold2015-03-033-2/+36
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* | stm32f4: don't try to build FSMC and Timers that hardware doesn't supportbnewbold2015-03-032-0/+29
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* | stm32f4: series-specific linker flagsbnewbold2015-03-034-5/+107
| | | | | | | | Also refactors STM32F2-F4 linker files into sub-series directories.
* | replace unnecessary 'XXX' stringsbnewbold2015-03-012-4/+3
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* | docs: remove unfortunate 'XXX' showing up in grepbnewbold2015-03-012-2/+2
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* | travis CI: now expect maple_native build to passbnewbold2015-03-011-1/+0
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