FSMC refactor; SRAM test code

2 files changed, 326 insertions, 98 deletions

diff --git a/examples/fsmc-stress-test.cpp b/examples/fsmc-stress-test.cpp
new file mode 100644
index 0000000..12e8650
--- /dev/null
+++ b/examples/fsmc-stress-test.cpp
@@ -0,0 +1,216 @@
+/*
+
+  A low-level stress test of SRAM functionality.  Uses slow-ish timing
+  by default (DATAST = ADDSET = 0xF).
+
+  Copyright 2011 LeafLabs, LLC.
+
+  This code is released into the public domain.
+
+ */
+
+#include <stdio.h>
+#include <stddef.h>
+
+#include "wirish.h"
+#include "rcc.h"
+#include "fsmc.h"
+
+// -- SRAM config -------------------------------------------------------------
+
+// Timing configuration
+#define DATAST   0xF
+#define ADDSET   0xF
+
+// Number of SRAM chips to test
+#define N             1
+
+// How much of each to test
+#define MEM_SIZE 0x3FFF
+
+// Their start addresses in FSMC bank 1
+__io uint16 *const starts[N] = {
+    // (__io uint16 *const)FSMC_NOR_PSRAM_REGION1,
+    // (__io uint16 *const)FSMC_NOR_PSRAM_REGION2,
+    (__io uint16 *const)FSMC_NOR_PSRAM_REGION3,
+    // (__io uint16 *const)FSMC_NOR_PSRAM_REGION4,
+};
+
+// Corresponding FSMC configuration registers
+__io uint32 *const bcrs[N] = {
+    // &FSMC_NOR_PSRAM1_BASE->BCR,
+    // &FSMC_NOR_PSRAM2_BASE->BCR,
+    &FSMC_NOR_PSRAM3_BASE->BCR,
+    // &FSMC_NOR_PSRAM4_BASE->BCR,
+};
+
+// Corresponding FSMC timing registers
+__io uint32 *const btrs[N] = {
+    // &FSMC_NOR_PSRAM1_BASE->BTR,
+    // &FSMC_NOR_PSRAM2_BASE->BTR,
+    &FSMC_NOR_PSRAM3_BASE->BTR,
+    // &FSMC_NOR_PSRAM4_BASE->BTR,
+};
+
+// -- Pseudorandom number generation  -----------------------------------------
+
+const uint32 seed = 0xDEADBEEF;
+
+uint32 num_rand_calls = 0;
+
+uint32 rand(long n) {
+    num_rand_calls++;
+    return random(n);
+}
+
+// -- Printing ----------------------------------------------------------------
+
+// For snprintf()
+char snprintf_buf[200];
+
+#define ERR(fmt, ...) do {                                            \
+        snprintf(snprintf_buf, sizeof snprintf_buf,                   \
+                 "ERROR: " fmt " (seed %d, ncalls %d, line %d)",      \
+                 __VA_ARGS__, seed, num_rand_calls, __LINE__);        \
+        Serial1.println(snprintf_buf);                                \
+    } while (0)
+
+// -- setup()/loop() ----------------------------------------------------------
+
+void setup() {
+    fsmc_sram_init_gpios();
+    rcc_clk_enable(RCC_FSMC);
+
+    for (int i = 0; i < N; i++) {
+        *bcrs[i] = (FSMC_BCR_WREN |
+                    FSMC_BCR_MTYP_SRAM |
+                    FSMC_BCR_MWID_16BITS |
+                    FSMC_BCR_MBKEN);
+        *btrs[i] = (DATAST << 8) | ADDSET;
+    }
+
+    Serial1.begin(115200);
+    randomSeed(seed);
+}
+
+// stress_test() and simple_roundtrip() are the available test routines
+bool stress_test(void);
+bool simple_roundtrip(void);
+
+void loop() {
+    uint32 count = 0;
+    bool ok = true;
+    bool (*test)(void) = stress_test;
+
+    while (true) {
+        count++;
+        bool result = test();
+        ok = ok && result;
+        if (ok) {
+            snprintf(snprintf_buf, sizeof snprintf_buf,
+                     "everything ok so far, timestamp %d ms", millis());
+            Serial1.println(snprintf_buf);
+        }
+    }
+}
+
+// -- Test routines -----------------------------------------------------------
+
+bool random_trips();
+bool sequential_trips();
+
+bool stress_test(void) {
+    static int i = 0;
+    i = !i;
+
+    switch (i) {
+    case 0:
+        return random_trips();
+    default:
+        return sequential_trips();
+    }
+}
+
+bool simple_roundtrip(void) {
+    uint16 wval = 0xAB;
+
+    for (int i = 0; i < N; i++) {
+        __io uint16 *addr = starts[i] + 4;
+        snprintf(snprintf_buf, sizeof snprintf_buf, "round-trip 0x%x at %p",
+                 wval, addr);
+        Serial1.println(snprintf_buf);
+
+        *addr = wval;
+        uint16 rval = *addr;
+
+        if (rval != wval) {
+            ERR("wrote 0x%x, read 0x%x, timestamp %d", wval, rval, millis());
+            return false;
+        } else {
+            snprintf(snprintf_buf, sizeof snprintf_buf, "got back 0x%x", rval);
+            Serial1.println(snprintf_buf);
+        }
+    }
+
+    return true;
+}
+
+bool random_trips(void) {
+    for (int n = 0; n < N; n++) {
+        __io uint16 *const start = starts[n];
+
+        for (int i = 0; i < 1000; i++) {
+            uint32 offset = rand(MEM_SIZE);
+            uint32 wval = rand(0xFFFF);
+
+            *(start + offset) = wval;
+            uint32 rval = *(start + offset);
+
+            if (rval != wval) {
+                ERR("wrote 0x%x to 0x%x, read 0x%x", wval, offset, rval);
+                return false;
+            }
+        }
+    }
+    return true;
+}
+
+bool sequential_trips(void) {
+    static const uint32 seq_length = 300;
+
+    for (int n = 0; n < N; n++) {
+        __io uint16 *const start = starts[n];
+
+        for (int i = 0; i < 100; i++) {
+            uint32 start_offset = rand(MEM_SIZE - seq_length);
+
+            for (uint32 w = 0; w < seq_length; w++) {
+                uint32 offset = start_offset + w;
+
+                *(start + offset) = w;
+                uint32 r = *(start + offset);
+
+                if (w != r) {
+                    ERR("wrote 0x%x to 0x%x, read 0x%x", w, offset, r);
+                    return false;
+                }
+            }
+        }
+    }
+    return true;
+}
+
+// ----------------------------------------------------------------------------
+
+__attribute__((constructor)) void premain() {
+    init();
+}
+
+int main(void) {
+    setup();
+    while (true) {
+        loop();
+    }
+    return 0;
+}
+
diff --git a/examples/test-fsmc.cpp b/examples/test-fsmc.cpp
index 4211e4d..7db3bb7 100644
--- a/examples/test-fsmc.cpp
+++ b/examples/test-fsmc.cpp
@@ -1,113 +1,125 @@
+#include <stddef.h>             // for ptrdiff_t

+

 #include "wirish.h"

 #include "fsmc.h"

 

-#define LED_PIN BOARD_LED_PIN

-

-// System control block registers

-#define SCB_BASE    (SCB_Reg*)(0xE000ED00)

-

-// This stuff should ultimately get moved to util.h or scb.h or w/e.

-// Also in interactive test program and the HardFault IRQ handler.

-typedef struct {

-    volatile uint32 CPUID;

-    volatile uint32 ICSR;

-    volatile uint32 VTOR;

-    volatile uint32 AIRCR;

-    volatile uint32 SCR;

-    volatile uint32 CCR;

-    volatile uint32 SHPR1;

-    volatile uint32 SHPR2;

-    volatile uint32 SHPR3;

-    volatile uint32 SHCRS;

-    volatile uint32 CFSR;

-    volatile uint32 HFSR;

-    uint32 pad1;

-    volatile uint32 MMAR;

-    volatile uint32 BFAR;

-} SCB_Reg;

-

-SCB_Reg *scb;

-

-uint16 *ptr;

-int count = 0;

+#ifndef BOARD_maple_native

+#error "Sorry, this example only works on Maple Native."

+#endif

+

+// Start of FSMC SRAM bank 1

+static uint16 *const sram_start = (uint16*)0x60000000;

+// End of Maple Native SRAM chip address space (512K 16-bit words)

+static uint16 *const sram_end = (uint16*)0x60080000;

+

+void test_single_write(void);

+void test_all_addresses(void);

 

 void setup() {

-   uint32 id;

-   scb = (SCB_Reg*)SCB_BASE;

-

-   pinMode(LED_PIN, OUTPUT);

-   digitalWrite(LED_PIN,1);

-

-   Serial1.begin(9600);

-   Serial1.println("Hello World!");

-

-   Serial1.print("Init... ");

-   fsmc_native_sram_init();

-   Serial1.println("Done.");

-

-   // Start of channel1 SRAM bank (through to 0x63FFFFFF, though only a chunk

-   // of this is valid)

-   ptr = (uint16*)(0x60000000);

-

-   Serial1.print("Writing... ");

-   *ptr = 0x1234;

-   Serial1.println("Done.");

-

-   Serial1.print("Reading... ");

-   id = *ptr;

-   Serial1.print("Done: ");     // shouldn't be 0xFFFFFFFF

-   Serial1.println(id,BIN);

-

-   Serial1.println("Dumping System Control Block Registers");

-   Serial1.print("CPUID: ");

-   id = scb->CPUID;

-   Serial1.println(id,BIN);

-   Serial1.print("ICSR:  ");

-   id = scb->ICSR;

-   Serial1.println(id,BIN);

-   Serial1.print("CFSR:  ");

-   id = scb->CFSR;

-   Serial1.println(id,BIN);

-   Serial1.print("HFSR:  ");

-   id = scb->HFSR;

-   Serial1.println(id,BIN);

-   Serial1.print("MMAR:  ");

-   id = scb->MMAR;

-   Serial1.println(id,BIN);

-   Serial1.print("BFAR:  ");

-   id = scb->BFAR;

-   Serial1.println(id,BIN);

-

-   Serial1.println("Now testing all memory addresses... (will hardfault at the end)");

-   delay(3000);

+    pinMode(BOARD_LED_PIN, OUTPUT);

+    digitalWrite(BOARD_LED_PIN, HIGH);

+

+    Serial1.begin(115200);

+    Serial1.println("*** Beginning RAM chip test");

+

+    test_single_write();

+    test_all_addresses();

+

+    Serial1.println("Tests pass, finished.");

 }

 

 void loop() {

-    toggleLED();

-    delay(1);

-

-   for(int i = 0; i<100; i++) {   // modify this to speed things up

-        count++;

-        ptr++;

-        //delay(10);    // tweak this to test SRAM resiliance over time

-        *ptr = (0x0000FFFF & count);

-        if(*ptr != (0x0000FFFF & count)) {

-                Serial1.println("ERROR: mismatch, halting");

-                while(1) { }

+}

+

+void test_single_write() {

+    uint16 *ptr = sram_start;

+    uint16 tmp;

+

+    Serial1.print("Writing 0x1234... ");

+    *ptr = 0x1234;

+    Serial1.println("Done.");

+

+    Serial1.print("Reading... ");

+    tmp = *ptr;

+    Serial1.print("Done: 0x");

+    Serial1.println(tmp, HEX);

+

+    if (tmp != 0x1234) {

+        Serial1.println("Mismatch; abort.");

+        ASSERT(0);

+    }

+}

+

+void test_all_addresses() {

+    uint32 start, end;

+    uint16 count = 0;

+    uint16 *ptr;

+

+    Serial1.println("Now writing all memory addresses (unrolled loop)");

+    // Turn off the USB interrupt, as it interferes most with timing

+    // (don't turn off SysTick, or we won't get micros()).

+    SerialUSB.end();

+    start = micros();

+    for (ptr = sram_start; ptr < sram_end;) {

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+        *ptr++ = count++;

+    }

+    end = micros();

+    SerialUSB.begin();

+    Serial1.print("Done. Elapsed time (us): ");

+    Serial1.println(end - start);

+

+    Serial1.println("Validating writes.");

+    for (ptr = sram_start, count = 0; ptr < sram_end; ptr++, count++) {

+        uint16 value = *ptr;

+        if (value != count) {

+            Serial1.print("mismatch: 0x");

+            Serial1.print((uint32)ptr);

+            Serial1.print(" = 0x");

+            Serial1.print(value, HEX);

+            Serial1.print(", should be 0x");

+            Serial1.print(count, HEX);

+            Serial1.println(".");

+            ASSERT(0);

         }

-   }

+    }

+    Serial1.println("Done; all writes seem valid.");

+

+    ptrdiff_t nwrites = sram_end - sram_start;

+    double us_per_write = double(end-start) / double(nwrites);

+    Serial1.print("Number of writes = ");

+    Serial1.print(nwrites);

+    Serial1.print("; avg. time per write = ");

+    Serial1.print(us_per_write);

+    Serial1.print(" us (");

+    Serial1.print(1 / us_per_write);

+    Serial1.println(" MHz)");

+}

 

-   Serial1.print((uint32)(ptr),HEX);

-   Serial1.print(": ");

-   Serial1.println(*ptr,BIN);

+__attribute__((constructor)) void premain() {

+    init();

 }

 

 int main(void) {

-   init();

-   setup();

+    setup();

+

+    while (true) {

+        loop();

+    }

 

-   while (1) {

-      loop();

-   }

-   return 0;

+    return 0;

 }