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authorbryan newbold <bnewbold@leaflabs.com>2013-11-12 10:37:31 -0500
committerbryan newbold <bnewbold@leaflabs.com>2013-11-12 10:37:31 -0500
commit12fb9032819dde0ccd38dfc2645abbffb891cca9 (patch)
treef5c74f728cc8c00a822b76079019737c48f3c24a /Makefile
parent98a7dd4dd7c3e15308f1c6314f799a367fa1aa33 (diff)
downloadbasic-hdl-template-12fb9032819dde0ccd38dfc2645abbffb891cca9.tar.gz
basic-hdl-template-12fb9032819dde0ccd38dfc2645abbffb891cca9.zip
initial VHDL support
Diffstat (limited to 'Makefile')
-rw-r--r--Makefile3
1 files changed, 3 insertions, 0 deletions
diff --git a/Makefile b/Makefile
index 2b93161..9541815 100644
--- a/Makefile
+++ b/Makefile
@@ -33,6 +33,9 @@ verilog_files += hdl/rot13.v
verilog_files += hdl/simple_uart.v
#verilog_files += hdl/yours.v
+# all .vhd files explicitly also
+vhdl_files :=
+
tbfiles := tb/rot13_tb.v
tbfiles += tb/xula2_tb.v
#tbfiles += tb/sp605_tb.v