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| author | bryan newbold <bnewbold@leaflabs.com> | 2013-11-13 10:35:52 -0500 |
|---|---|---|
| committer | bryan newbold <bnewbold@leaflabs.com> | 2013-11-13 10:36:16 -0500 |
| commit | 0451d1c0df95884d39b85f26a736df1f3086e642 (patch) | |
| tree | 3e4584a28df339c09049f0807b5302389a1d6d38 | |
| parent | 9c621a0e0df0d5837e99d70019953a098db4a505 (diff) | |
| download | basic-hdl-template-0451d1c0df95884d39b85f26a736df1f3086e642.tar.gz basic-hdl-template-0451d1c0df95884d39b85f26a736df1f3086e642.zip | |
TODO updates
| -rw-r--r-- | contrib/TODO | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/contrib/TODO b/contrib/TODO index bb97bce..9c10050 100644 --- a/contrib/TODO +++ b/contrib/TODO @@ -1,7 +1,11 @@ -BUG: synth still seems to continue even if first build (verilog compile) fails +rename repo... + hdl-build + basic-hdl-project + +cleanup simple_uart.v -For bitfile/mcs targets, add an echo that they are being created (slow). +BUG: synth still seems to continue even if first build (verilog compile) fails requests from AJ: anything related to not rebuilding all the coregen when not necessary. |