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Diffstat (limited to 'design')
| -rw-r--r-- | design/hardware.page | 120 | ||||
| -rw-r--r-- | design/overview.page | 11 |
2 files changed, 91 insertions, 40 deletions
diff --git a/design/hardware.page b/design/hardware.page index 8101074..9da3c61 100644 --- a/design/hardware.page +++ b/design/hardware.page @@ -3,16 +3,42 @@ ### Core -*See [research/cpu]() for an overview of the **many** low-cost embedded +*See [/research/cpu]() for an overview of the **many** low-cost embedded processors which have been announced, and a justification of this component selection.* -The Freescale i.MX6 series ARM processors +The Freescale i.MX6 series ARM processors are in production as of summer 2012, +hardware-specific code is being upstreamed into the Linux kernel, and extensive +public documentation will be released in November 2012. Several (but not all) +variants are "pin-compatible", allowing upgrades. Rumored prices put the 1GHz +"Dual Core Lite" processor at around $16/each for commerical-grade temperature +ranges, or $21 for extended temperature ranges. The single core chip could go +as low as $11/each in quantities of 10k. -An external power management/regulator chip is required to provide stable -voltage for this chip. +These chips have plenty of power and storage connectivity to act as web +servers. They should have enough connectivity throughput to fufil expectations +of contemporary network routers. They have enough extra communications and +system ports (SATA, SD, USB, video, audio, etc) to be expandable and hackable. -### Wireless +A dedicated power management/regulator chip ("PMIC") will almost certainly be +required to provide stable voltage for the SoC. The vendor usually produces +such a chip; for budgeting purposes i've included Freescale's equivalent PMIC +for their i.MX53 line of processors. + +512MB should be adequate for almost all server applications. The i.MX6 chips +support 64 bit bus widths for faster throughput, optionally through two 32 bit +channels. RAM chips should be selected to take advantage of this. + +With enough RAM to cache the kernel and core daemons, micro SD flash storage +should be sufficient for both a bootloader and core operating system. Disk +storage can be expanded through a full-sized SD card slot, USB thumb drives, or +a SATA port. + +On-board flash memory could be provided for a BIOS if that ends up being +desired. FRAM memory could also be used to cache the kernel, DHCP tables, or +other information to make reboots extremely fast. + +### WiFi The miniPCIe slot allows flexibility in selecting an appropriate dual-band 802.11n card; see [research/miniPCIe]() for a list of options and issues. @@ -27,35 +53,61 @@ sells such a device new for $35, as does [netgate.com](http://store.netgate.com/WLE200NX-80211nabg-miniPCIe-Card-P1763C29.aspx) for $45. -An antenna would also be required; SparkFun sells adapters for -[$5](https://www.sparkfun.com/products/662), so I will budget $5 for an adapter -plus antenna. - - - ARM SoC, Freescale i.MX6 - - Power management/regulator IC for SoC - - 512MB RAM - - No onboard FLASH, 8GB+ uSD card - - WiFi - - full-size miniPCIe slot for off-the-shelf dual-band card - - 802.15.4 - - all-in-one stm32w chip, trace antenna (?) - - Ethernet - - GigE switch chip w/ PHY, 5 ports - - 4x LAN jacks with drivers for longer cable runs (w/ LEDs) - - 1x WAN jack - - Power - - 5/12v regulator, ~1amp - - Power connector - - Reverse voltage diode - - USB Host jack - - USB mini jack for UART/JTAG/Mass storage (how? USB2 hub?) - - Second SD or uSD connector (for expansion) - - status LEDs and drivers (PWM from SoC?) - - reset button - - power switch - -An alternative "minimal" feature set device is described at -[design/minimal_design](). +Antennas and cabling (for both 2.4GHz and 5GHz) are necessary and usually +aren't included with PCI cards, so the rooter will need to ship with them. + +## Ethernet + +The Realtek RTL8366SR gigabit switch chip is an industry standard with support +in OpenWRT. I have been unable to find a public price quote for it, but am +confident that it can be sourced in smaller quantities (1k). For prototyping it +could even be re-flowed off of a cheap commodity router. + +Extra analog circuitry to boost the current going out over long (50+ meter) +ethernet cable runs may be required for reliability in extreme environments. + +The first revision rooter will probably not support power-over-ethernet; +injector dongles provide similar functionality. + +## Connectivity + +For both initial development and for later hacking, JTAG access to at least the +SoC will be broken out. + +A boot-time serial console is a very useful debugging and hacking interface, +but RS-232 is a bit clunky to implement, and requires an extra adapter for +users. As a contemporary solution, an FTDI chip will allow USB access to the +root serial console, with low-voltage UART pins also broken out to pads +internally. + +## Power + +12-20v DC input power will be accepted, with the explicit goal of being able to +run off 12v battery or solar power without browning out down to 10.5v or so. + +rooter will probably pull between 2-5 watts when active, more depending on on +USB, SATA, PCI, and other peripherals. Idle power usage should go very low. + +TODO: a 12v power adapter is not included in the price estimate below, a decent +one probably costs about $3 in bulk. + +## Extra Features + +rooter will include an 2.4GHz 802.15.4 radio on-board to enable lightweight +"internet-of-things" communication with embedded devices. The 6lowpan protocol +will be supported by default, libre implementations of the ZigBee protocol +stack or other protocols could be installed by the user. + +A simple avalanche break-down circuit will provide a high-quality stream of +random numbers to the main processor, to be mixed with other sources of entropy +for cryptographic purposes. + +A user-programable microcontroller with both an On-The-Go USB port and +connectivity to the main processor will enable real-time programming and other +such hackery. For example, IP-over-USB for devices without an ethernet port, +interfacing to non-IP communication buses, USB mass-storage pass through, +low-bandwidth wireless radio protocol experimentation (433MHz, 900MHz, etc), +out-of-band network data monitoring, secret sharing, etc. ## Proposed BOM and Costs (August 2012) diff --git a/design/overview.page b/design/overview.page index 9337a12..354b6d1 100644 --- a/design/overview.page +++ b/design/overview.page @@ -45,15 +45,14 @@ protocol (eg 802.15.4 6lowpan, ZigBee, Bluetooth Low-Energy, etc). See [design/hardware]() for specific components and costs. -- 1GHz ARM SoC processor (possibly dual-core) +- 1GHz dual-core ARM SoC processor - 512MB RAM - Internal uSD card storage, expandable through SATA and USB ports -- Modular WiFI via miniPCIe slot -- Second USB-only miniPCIe slot for expansion -- 2+ powered USB ports for expansion +- Modular WiFI via miniPCIe slot; recommend dual-band 802.11n +- 2 powered USB ports for expansion - 5x Gigabit ethernet ports: 4x local + 1x upstream -- Serial and JTAG debugging via USB port -- Low-power "internet of things" gateway with 802.15.4 radio +- Serial and JTAG debugging via micro-USB port +- Low-bandwidth "internet of things" gateway with 802.15.4 radio - Hardware entropy generation device ## Comparison |