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/* *****************************************************************************
 * The MIT License
 *
 * Copyright (c) 2010 Perry Hung.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 * ****************************************************************************/

/**
 *  @file nvic.c
 *
 *  @brief Nested interrupt controller routines
 */

#include "libmaple.h"
#include "nvic.h"
#include "systick.h"

void nvic_disable_interrupts(void) {
    /* Turn off all interrupts  */
    REG_SET(NVIC_ICER0, 0xFFFFFFFF);
    REG_SET(NVIC_ICER1, 0xFFFFFFFF);

    /* Turn off systick exception  */
    REG_CLEAR_BIT(SYSTICK_CSR, 0);
}


void nvic_set_vector_table(uint32 *addr, uint32 offset) {
   __write(SCB_VTOR, (uint32)addr | (offset & 0x1FFFFF80));
}


/**
 *  @brief turn on interrupt number n
 *  @param[in] n interrupt number
 */
void nvic_enable_interrupt(uint32 n) {
    if (n >= NVIC_NR_INTERRUPTS) {
        return;
    }

    if (n < 32) {
        REG_SET_BIT(NVIC_ISER0, n);
    } else {
        REG_SET_BIT(NVIC_ISER1, n - 32);
    }
}