aboutsummaryrefslogtreecommitdiffstats
path: root/libmaple/gpio.c
blob: 9334c1e84c920d367e180cea25331d1332ba0dc5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
/* *****************************************************************************
 * The MIT License
 *
 * Copyright (c) 2010 Perry Hung.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 * ****************************************************************************/

/**
 *  @file gpio.c
 *
 *  @brief GPIO initialization routine
 */

#include "libmaple.h"
#include "rcc.h"
#include "gpio.h"

void gpio_init(void) {
   rcc_enable_clk_gpioa();
   rcc_enable_clk_gpiob();
   rcc_enable_clk_gpioc();
   rcc_enable_clk_gpiod();
   rcc_enable_clk_afio();
}

void gpio_set_mode(GPIO_Port* port, uint8 gpio_pin, GPIOPinMode mode) {
   uint32 tmp;
   uint32 shift = POS(gpio_pin % 8);
   GPIOReg CR;

   ASSERT(port);
   ASSERT(gpio_pin < 16);

   if (mode == GPIO_MODE_INPUT_PU) {
      port->ODR |= BIT(gpio_pin);
      mode = CNF_INPUT_PD;
   } else if (mode == GPIO_MODE_INPUT_PD) {
      port->ODR &= ~BIT(gpio_pin);
   }

   CR = (gpio_pin < 8) ? &(port->CRL) : &(port->CRH);

   tmp = *CR;
   tmp &= POS_MASK(shift);
   tmp |= mode << shift;

   *CR = tmp;

}