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* stm32f2/gpio.h: Cosmetics.Marti Bolivar2012-04-111-2/+2
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/stm32f1/spi.c: cosmetics.Marti Bolivar2012-04-111-15/+16
| | | | | | Fix whitespace, move some definitions around. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/spi: Fixups, move nonportable bits into libmaple/stm32f1.Marti Bolivar2012-04-116-134/+231
| | | | | | | | | | | Standard family support refactoring: add STM32F1 series spi.h, spi.c, and move anything that won't port to STM32F2 there. As part of a general effort to be cleaner, remove the dependency on libmaple/util.h from libmaple/spi.h by not using BIT(). Also forward declare struct gpio_dev for spi_gpio_cfg() to remove that include. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/spi: Fix boilerplate.Marti Bolivar2012-04-112-2/+4
| | | | | | Update Doxygen file headers and license copyright dates. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Update examples/test.timers.cpp.Marti Bolivar2012-04-111-234/+474
| | | | | | Currently passing on STM32F2. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* STM32F2: Add timer support.Marti Bolivar2012-04-113-0/+356
| | | | | | | Standard series peripheral support patch, containing STM32F2 series timer.h and timer.c. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32f2/nvic.h: Add fake NVIC_TIMER6 irq number.Marti Bolivar2012-04-111-0/+4
| | | | | | | This is necessary to make some timer code portable, but I'm not sure it's a good idea. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/rcc.h: Fix Doxygen file header.Marti Bolivar2012-04-111-1/+1
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32f2/rcc.h: Fix Doxygen file header.Marti Bolivar2012-04-111-1/+1
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* STM32F1: Add support for timers 9 through 14.Marti Bolivar2012-04-114-42/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This applies to XL-density STM32F1 devices. In stm32f1/timer.c, add timer_dev's for the new timers, using the timer_private API. These definitions are conditionally compiled based on the target density to avoid wasting space on smaller MCUs. Also add calls to the appropriate timer_private.h dispatch routines within the IRQ handlers for these timers. We need to change the IRQ handler names to reflect this eventually, but put that off for now, as it could break backwards compatibility in some exotic situations where the user refers to the libmaple IRQ handlers directly. In stm32f1/timer.h, add register map base pointers and device declarations for the new timers. timer_dev* declarations are compiled in only when the target MCU supports them, in keeping with the above stm32f1/timer.c changes. In libmaple/timer.c, update the (static) IRQ enable routines to account for the additional timers. This adds some code that's unnecessary on smaller STM32F1s, but it's minimal (40 extra bytes on my machine), so portability and readability win out. Size change, using GCC version "(Sourcery G++ Lite 2011.03-42) 4.5.2": Before: text data bss dec hex filename 615 0 0 615 267 build/home/mbolivar/leaf/libmaple/libmaple/timer.o After: text data bss dec hex filename 655 0 0 655 28f build/home/mbolivar/leaf/libmaple/libmaple/timer.o Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/timer_private.h: Update to support TIM9-TIM14.Marti Bolivar2012-04-111-7/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | Add DECLARE_RESTRICTED_GENERAL_TIMER(), for declaring general-purpose timers with limited interrupt support -- that is, for declaring timers 9 through 14. This helps avoid wasting space on pointers to user handlers for interrupts that don't exist. Add dispatch_tim_9_12() and dispatch_tim_10_11_13_14(), which are special purpose dispatch routines for these "restricted" general purpose timers, which only try to dispatch interrupts supported by these timers. Change dispatch_single_irq() to check the logical and of the DIER and SR registers for the timer whose interrupt it's dispatching. This is necessary due to increased muxing on the timer IRQ lines caused by the new timers. See the comment in the patch for more details. This does add overhead on medium- and high-density STM32F1s, where the extra check is unnecessary, but it doesn't change dispatch_single_irq()'s semantics, and keeps the implementation simple, so we'll live with it. These changes will also work on F2 (and F4 AFAIK), which is why they're part of the global private timer API, as opposed to libmaple/stm32f1/timer.c. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/timer_private.h: Add more explanatory comments.Marti Bolivar2012-04-111-12/+31
| | | | | | | Hopefully these will be helpful when adding timer support for additional series in the future. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32f1/nvic.h: Add nvic_irq_num's for XL-density timers; Doxygen fixup.Marti Bolivar2012-04-111-7/+45
| | | | | | | | | | | | | | | | | | | | | This is a backwards-compatible change, but it deprecates some existing functionality. XL density STM32F1 devices have additional timers 9 through 14. These share NVIC lines with timers 1 and 8. This scheme is also used on e.g. STM32F2, so the corresponding nvic_irq_num enumerators on that series have names like "NVIC_TIMER1_BRK_TIMER9" instead of "NVIC_TIMER1_BRK". For portability (and XL-density support), it makes sense to add these enumerators to the F1 version of nvic_irq_num, which we do here. For backwards compatibility, we keep the old enumerators (like NVIC_TIMER1_BRK) around as aliases to the new ones (like NVIC_TIMER1_BRK_TIMER9). These old enumerators are now deprecated. Also fix up the Doxygen @file header. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32f2/nvic.h: Fix Doxygen @file directive.Marti Bolivar2012-04-111-1/+1
| | | | | | This lets Doxygen pick it up. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32f2/rcc: Fix timer rcc_clk_id enumerators.Marti Bolivar2012-04-112-50/+50
| | | | | | | | The timer enumerators are different tokens on F2 than they are on F1. This is wrong (breaks portability), so fix it, and update the F2 rcc_dev_info table to match. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32f1/timer.h: Whitespace tweaks.Marti Bolivar2012-04-111-8/+8
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/timer.h: Minor tweaks.Marti Bolivar2012-04-111-4/+4
| | | | | | Comments etc. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* timer: Fixes, rip out nonportable bits.Marti Bolivar2012-04-117-360/+568
| | | | | | | | | | | | | | Fix copy-paste errors in, and add missing, register bit definitions. For copy-paste errors that would result in source incompatibilities with past releases, add some legacy defines. Add series header and C file for STM32F1 which fills in the missing API. Much of the F1 timer.c would be repeated on F2, so also add timer_private.h to hold these. Support for timers 9 through 14 is still missing. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Don't conditionally compile rcc_clk_id or nvic_irq_num enumerators.Marti Bolivar2012-04-112-6/+0
| | | | | | | | | | Whether or not a given peripheral is present on an F1 series MCU doesn't matter. It doesn't take up any extra space to include these enumerators, and it's convenient to have them defined so portable libmaple routines can safely refer to them. This can prevent the need for special series-specific versions of some functions. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/libmaple_types.h: Add __always_inline.Marti Bolivar2012-04-111-0/+1
| | | | | | We need this to ensure inlining when compiled with -Os. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/timer.h: Fixups.Marti Bolivar2012-04-111-4/+4
| | | | | | Fix include guard define name, update copyright, fix Doxygen @file. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/dac.h: Fixups.Marti Bolivar2012-04-111-1/+3
| | | | | | Assert LeafLabs copyright; fix Doxygen @file, and add missing include. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Deprecate rcc_clk_init().Marti Bolivar2012-04-114-8/+22
| | | | | | | | | | | | This function has been with us from the earliest days of libmaple. It's showing its age, as the API it presents is tied to the STM32F1. Deprecate it, and provide instructions for how to use newer, more portable APIs. The new way is more verbose, but we can always add a portable "just set up the PLL, dammit" convenience function later (a nice candidate is to extract an interface from setup_clocks() in boards.cpp). Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Resurrect ADC support.Marti Bolivar2012-04-1113-214/+920
| | | | | | | | | | | | | Standard refactoring: add series headers for F1 and F2, along with series adc.c files. There are some issues relating to adc_extsel_event to hammer out later, but this will do for now. We also add some new portability interfaces to libmaple/adc.h in order for Wirish to use the same code to initialize the ADCs at init() time. As usual, F1 is untested. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Add notes/stm32.txt.Marti Bolivar2012-04-111-0/+63
| | | | | | Some general notes on the various STM32 series. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/rules.mk: Cosmetics.Marti Bolivar2012-04-111-0/+8
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Resurrect IWDG support.Marti Bolivar2012-04-112-1/+2
| | | | | | This peripheral is identical on F1 and F2. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Resurrect PWR support for F1 and F2.Marti Bolivar2012-04-114-0/+127
| | | | | | Just add the missing register bit definitions in new series headers. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Clean up rules.mk files.Marti Bolivar2012-04-113-7/+8
| | | | | | Alphabetize targets and remove continuation lines. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/pwr.h: Fix register bits (breaking change).Marti Bolivar2012-04-111-10/+34
| | | | | | | | | | | | | | | | | This is a backwards-incompatible change. It is necessary to fix an error. The register bit definitions are given as if they were masks, but they're actually bit numbers. E.g., PWR_CR_DBP, which should be the mask for DBP in the power control register PWR_CR, is actually the number of the bit that should be masked. Fix this by adding _BIT to the definitions and adding proper masks. Also add a mask for the PVD level selection bits in PWR_CSR. Don't add any mask values for particular voltages selected as these are not portable. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* [UNTESTED] Resurrect FSMC support.Marti Bolivar2012-04-115-8/+106
| | | | | | | | | | fsmc_sram_init_gpios() is now series-specific, so move its existing implementation to the F1 backend, and add libmaple/stm32f2/fsmc.c for the F2 backend. Delete libmaple/fsmc.c; it is now empty. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* fsmc.h: Use STM32_HAVE_FSMC feature-test macro.Marti Bolivar2012-04-111-3/+4
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32.h: Add STM32_HAVE_FSMC.Marti Bolivar2012-04-113-7/+7
| | | | | | | This is a feature test macro for the flexible static memory controller (FSMC) peripheral. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* [FIXME] Resurrected, shinier USART support.Marti Bolivar2012-04-1111-175/+836
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FIXME: - Test F1 support - Solve problem of duplicated bytes being TXed unless delay is inserted after configuration but before first bytes are TXed. Rip out nonportable bits from top-level interfaces. The USART register maps are basically the same between F1 and F2, so leave these, but add register bit definitions which had name changes to the libmaple header to avoid needless repetition. There are also a few new bits in the F2 USART registers; add definitions for these in the F2 USART header. Add Doxygen comments for all USART bit definitions. Deprecate struct usart_dev's max_baud field. This is just bloat that doesn't bring us much real benefit. Add new series-specific USART files for F1 and F2: - libmaple/stm32f[1,2]/usart.c - libmaple/stm32f[1,2]/include/series/usart.h These are standard series-specific files, providing register map base pointers, defining devices, implementing nonportable routines, etc. We need a portable way to configure the USART GPIOs. To this end, add usart_async_gpio_cfg() to the top-level USART interface. This function is implemented in new F1 and F2 USART backends to take the appropriate action to configure the RX and TX pins for asynchronous full duplex mode. USART baud rate calculation is done differently on the different series. Keep the usart_set_baud_rate() declaration in the top-level USART header, but move the implementations into the series-specific usart.c files. In usart_set_baud_rate(), allow for deriving clock_speed automatically by letting user tell us to figure out the peripheral clock speed by mapping the device's rcc_clk_id onto an STM32_PCLK[1,2] value. This preserves flexibility for users with non-default clock configurations, but makes things easier on everyone else. Add private USART files for portable private USART routines: - libmaple/usart_private.h - libmaple/usart_private.c Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32f2: Improve GPIO alternate function support.Marti Bolivar2012-04-112-9/+85
| | | | | | | | | Add GPIO_AFRL and GPIO_AFRH bit definitions; these seem to have been overlooked. Add enum gpio_af to give labels to the various functions. Add gpio_set_af() convenience routine for configuring a GPIO's alternate function. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* rcc_reconfigure_pll(): Assert that the PLL is disabled.Marti Bolivar2012-04-112-0/+6
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* RCC: Add rcc_is_clk_on().Marti Bolivar2012-04-112-0/+10
| | | | | | This is a convenience function for checking if a clock line is on. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Style change to libmaple/rules.mk.Marti Bolivar2012-04-111-7/+7
| | | | | | New style makes for cleaner diffs. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32.h: Cleanups.Marti Bolivar2012-04-111-6/+2
| | | | | | | Fix include guard name. Remove unused STM32_FLASH_WAIT_STATES (which was superseded by FLASH_SAFE_WAIT_STATES). Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* wirish/boards.cpp: Use __weak instead of GCC attribute.Marti Bolivar2012-04-111-1/+2
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Add __weak to <libmaple/libmaple_types.h>.Marti Bolivar2012-04-111-0/+1
| | | | | | This is just an alias for __attribute__((weak)). Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* [FIXME] Resurrect boards.cpp for F2 and F1.Marti Bolivar2012-04-116-106/+363
| | | | | | | | | | | | | | | | FIXME: - F1 support currently appears to be failing in start_c.c, for some unknown reason. This will need to get sorted out later. Add a new wirish namespace, and a sub-namespace wirish::priv::. Put a bunch of board setup routines in this namespace, and declare them in new wirish/boards_private.h. boards.cpp uses this to perform initialization tasks in a portable way, with two new boards_setup.cpp files under wirish/stm32f1 and wirish/stm32f2 handling the series-specific details. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* RCC: Add new mechanism for configuring the main PLL.Marti Bolivar2012-04-115-22/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new style for configuring the PLL is to initialize a (series-specific) struct rcc_pll_cfg, and pass a pointer to it to rcc_configure_pll(). After that's done, you can use rcc_turn_on_clk(RCC_CLK_PLL) to turn on the main PLL, and busy-wait until rcc_is_clk_ready(RCC_CLK_PLL) is true to make sure the new configuration took effect. - libmaple/rcc.h: -- Add struct rcc_pll_cfg, which specifies a PLL configuration. This specifies a PLL source and a void pointer to series-specific PLL configuration data. -- Add rcc_configure_pll(), which takes a pointer to struct rcc_pll_cfg, and configures the main PLL. It's up to each series to define this function. - stm32f1/rcc.h: Add struct stm32f1_rcc_pll_data, to store F1-specific PLL configuration state. - stm32f1/rcc.c: Add an implementation for rcc_configure_pll(). - stm32f2/rcc.h: Add struct stm32f2_rcc_pll_data, to store F2-specific PLL configuration data. - stm32f2/rcc.c: Add an implementation for rcc_configure_pll(). Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32f1/rcc.h: Deprecate rcc_clk_init().Marti Bolivar2012-04-111-0/+1
| | | | | | We're going to replace this with a more portable mechanism. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple/rcc.h: Add rcc_enable_css(), rcc_disable_css().Marti Bolivar2012-04-111-0/+17
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* libmaple_types.h: Add __deprecated.Marti Bolivar2012-04-111-0/+1
| | | | | | This is a define for __attribute__((deprecated)). Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* RCC: Clean up and sanitize interfaces across F1, F2 series.Marti Bolivar2012-04-116-49/+224
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Additions: - rcc_switch_sysclk(): For changing the clock used as SYSCLK's source. - enum rcc_clk: One for each system and secondary clock source (e.g. HSE, LSE). These are defined on a per-series basis in each of the <series/rcc.h>. - rcc_turn_on_clk(), rcc_turn_off_clk(), rcc_is_clk_ready(): For turning on system and secondary clock sources, and checking whether or not they're ready. Uses enum rcc_clk. Removals: - rcc_clk_init(): There's no way to port this to F2. Move it to the F1 header. This also means we can remove the empty implementation and enum rcc_pll_multiplier from the F2 RCC header, where it doesn't make any sense. Also fix up some includes, and rewrite rcc_clk_init() in terms of the new clock source management functions. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Clean up Flash interface; add flash_enable_features().Marti Bolivar2012-04-117-87/+42
| | | | | | | | | | | | | | | | Make a single function, flash_enable_features(), to control the access characteristics of Flash memory (i.e. to write to the non-latency bits of ACR). In so doing, make everybody pretend to allow instruction and data caching. On STM32F1, trying to turn these on simply has no effect. This allows unconditionally trying to turn them on, which will simplify users' lives. This has the ancillary benefit of making the stm32f2- and stm32f1-specific flash.c files unnecessary; delete these. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* STM32F2 Flash support.Marti Bolivar2012-04-113-0/+236
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* [WIP] boards: Add st_stm3220g_eval.Marti Bolivar2012-04-112-0/+109
| | | | | | | This supports ST's STM3220G-EVAL, the standard "kitchen-sink" evaluation board for the STM32F2 series. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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