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-rw-r--r--libmaple/stm32f1/include/series/nvic.h52
1 files changed, 45 insertions, 7 deletions
diff --git a/libmaple/stm32f1/include/series/nvic.h b/libmaple/stm32f1/include/series/nvic.h
index 33783f3..42c0b37 100644
--- a/libmaple/stm32f1/include/series/nvic.h
+++ b/libmaple/stm32f1/include/series/nvic.h
@@ -25,7 +25,7 @@
*****************************************************************************/
/**
- * @file libmaple/stm32f1/nvic.h
+ * @file libmaple/stm32f1/include/series/nvic.h
* @brief STM32F1 Nested Vectored Interrupt Controller (NVIC) support.
*/
@@ -78,9 +78,11 @@ typedef enum nvic_irq_num {
NVIC_CAN_RX1 = 21, /**< CAN RX1 */
NVIC_CAN_SCE = 22, /**< CAN SCE */
NVIC_EXTI_9_5 = 23, /**< EXTI line [9:5] */
- NVIC_TIMER1_BRK = 24, /**< Timer 1 break */
- NVIC_TIMER1_UP = 25, /**< Timer 1 update */
- NVIC_TIMER1_TRG_COM = 26, /**< Timer 1 trigger and commutation */
+ NVIC_TIMER1_BRK_TIMER9 = 24, /**< Timer 1 break, Timer 9. */
+ NVIC_TIMER1_UP_TIMER10 = 25, /**< Timer 1 update, Timer 10. */
+ NVIC_TIMER1_TRG_COM_TIMER11 = 26, /**<
+ * Timer 1 trigger and commutation,
+ * Timer 11. */
NVIC_TIMER1_CC = 27, /**< Timer 1 capture/compare */
NVIC_TIMER2 = 28, /**< Timer 2 */
NVIC_TIMER3 = 29, /**< Timer 3 */
@@ -98,9 +100,11 @@ typedef enum nvic_irq_num {
NVIC_RTCALARM = 41, /**< RTC alarm through EXTI line */
NVIC_USBWAKEUP = 42, /**< USB wakeup from suspend through
EXTI line */
- NVIC_TIMER8_BRK = 43, /**< Timer 8 break */
- NVIC_TIMER8_UP = 44, /**< Timer 8 update */
- NVIC_TIMER8_TRG_COM = 45, /**< Timer 8 trigger and commutation */
+ NVIC_TIMER8_BRK_TIMER12 = 43, /**< Timer 8 break, timer 12 */
+ NVIC_TIMER8_UP_TIMER13 = 44, /**< Timer 8 update, timer 13 */
+ NVIC_TIMER8_TRG_COM_TIMER14 = 45, /**<
+ * Timer 8 trigger and commutation,
+ * Timer 14. */
NVIC_TIMER8_CC = 46, /**< Timer 8 capture/compare */
NVIC_ADC3 = 47, /**< ADC3 */
NVIC_FSMC = 48, /**< FSMC */
@@ -115,6 +119,40 @@ typedef enum nvic_irq_num {
NVIC_DMA2_CH2 = 57, /**< DMA2 channel 2 */
NVIC_DMA2_CH3 = 58, /**< DMA2 channel 3 */
NVIC_DMA2_CH_4_5 = 59, /**< DMA2 channels 4 and 5 */
+
+ /* Old enumerators kept around for backwards compatibility: */
+ NVIC_TIMER1_BRK =
+ NVIC_TIMER1_BRK_TIMER9, /**< @brief (Deprecated) Timer 1 break
+ *
+ * For backwards compatibility only.
+ * Use NVIC_TIMER1_BRK_TIMER9 instead. */
+ NVIC_TIMER1_UP =
+ NVIC_TIMER1_UP_TIMER10, /**< @brief (Deprecated) Timer 1 update.
+ *
+ * For backwards compatibility only.
+ * Use NVIC_TIMER1_UP_TIMER10 instead. */
+ NVIC_TIMER1_TRG_COM =
+ NVIC_TIMER1_TRG_COM_TIMER11, /**< @brief (deprecated) Timer 1 trigger
+ * and commutation.
+ *
+ * For backwards compatibility only.
+ * Use NVIC_TIMER1_TRG_COM_TIMER11
+ * instead. */
+ NVIC_TIMER8_BRK =
+ NVIC_TIMER8_BRK_TIMER12, /**< @brief (deprecated) Timer 8 break
+ *
+ * For backwards compatibility only.
+ * Use NVIC_TIMER8_BRK_TIMER12 instead. */
+ NVIC_TIMER8_UP =
+ NVIC_TIMER8_UP_TIMER13, /**< @brief (deprecated) Timer 8 update
+ * For backwards compatibility only.
+ * Use NVIC_TIMER8_UP_TIMER13 instead. */
+ NVIC_TIMER8_TRG_COM =
+ NVIC_TIMER8_TRG_COM_TIMER14, /**< @brief (deprecated) Timer 8 trigger
+ * and commutation.
+ * For backwards compatibility only.
+ * Use NVIC_TIMER8_TRG_COM_TIMER14
+ * instead. */
} nvic_irq_num;
static inline void nvic_irq_disable_all(void) {