diff options
| -rw-r--r-- | docs/source/hardware/maple.rst | 83 | ||||
| -rw-r--r-- | docs/source/jtag.rst | 37 | ||||
| -rw-r--r-- | docs/source/lang/api/board-values.rst | 22 | ||||
| -rw-r--r-- | docs/source/lang/api/disabledebugports.rst | 31 | ||||
| -rw-r--r-- | docs/source/lang/api/enabledebugports.rst | 31 | ||||
| -rw-r--r-- | examples/test-session.cpp | 79 | ||||
| -rw-r--r-- | libmaple/gpio.h | 54 | ||||
| -rw-r--r-- | wirish/boards/maple.cpp | 13 | ||||
| -rw-r--r-- | wirish/boards/maple.h | 13 | ||||
| -rw-r--r-- | wirish/boards/maple_mini.cpp | 5 | ||||
| -rw-r--r-- | wirish/boards/maple_mini.h | 6 | ||||
| -rw-r--r-- | wirish/boards/maple_native.cpp | 16 | ||||
| -rw-r--r-- | wirish/boards/maple_native.h | 10 | ||||
| -rw-r--r-- | wirish/wirish.h | 1 | ||||
| -rw-r--r-- | wirish/wirish_debug.h | 54 |
15 files changed, 347 insertions, 108 deletions
diff --git a/docs/source/hardware/maple.rst b/docs/source/hardware/maple.rst index 44a5238..1fa4f3f 100644 --- a/docs/source/hardware/maple.rst +++ b/docs/source/hardware/maple.rst @@ -40,7 +40,7 @@ Identifying your Rev We went through three versions ("Revs") of the Maple hardware: Rev 1, Rev 3, and Rev 5 [#frev2_4]_; Rev 5, the final design, is currently on sale. The following sections will help you to help you identify your -Rev. Known issues are listed in the :ref:`errata <maple-errata>`. +Rev. Rev 5 ^^^^^ @@ -123,46 +123,38 @@ at the command line with :: $ git clone git://github.com/leaflabs/maple.git -.. _maple-errata: +.. _maple-failure-modes: -Errata ------- - -This section lists known issues and warnings for each revision of the -Maple board. The failure modes aren't design errors, but are easy ways -to break or damage your board permanently. For a list of differences -between the Maple and Arduinos, see the :ref:`Arduino Compatibility -reference <arduino-compatibility>`. - -The errata are grouped by Maple version ("Rev"). - -Maple Rev 5 -^^^^^^^^^^^ - -Known issues: +Failure Modes +------------- -* **Pin 3 AIN missing**: Pin 3 is capable of analog input, but the - corresponding "AIN" is missing from its silkscreen. - -* **GPIO 39-43 not configured**: this is really more of a software - "TODO" item. Some of the JTAG header pins are numbered 39-43. These - STM32 pins are indeed fully functional :ref:`GPIO <gpio>` when a - :ref:`JTAG <jtag>` device is not connected, but we have not enabled - them in software and thus they can not be accessed with the regular - :ref:`lang-pinmode` or :ref:`lang-digitalwrite` functions. - -Potential failure modes: +The following known failure modes apply to all Maple versions. The +failure modes aren't design errors, but are easy ways to break or +damage your board permanently. * **High voltage on non-tolerant pins**: not all header pins are 5V compatible; so e.g. connecting certain serial devices in the wrong way could over-voltage the pins. The :ref:`Pin-Mapping Mega Table <pin-mapping-mega-table>` details which pins are 5V-tolerant. -Maple Rev 3 -^^^^^^^^^^^ +Errata +------ + +This section lists known issues and warnings for each revision of the +Maple board. +Rev 5 +^^^^^ Known issues: +* **Pin 3 AIN missing**: Pin 3 is capable of analog input, but on + boards sold in during Fall 2010, the corresponding "AIN" is missing + from its silkscreen. This mistake was fixed in later manufacturing + runs. + +Rev 3 +^^^^^ + * **Bad/Sticky Buttons**: a number of Rev 3 boards sold in May-June 2010 have questionable RESET and BUT buttons. @@ -180,7 +172,7 @@ Known issues: remover we used is "Precision Electronics Cleaner" from RadioShack, which is "Safe on most plastics" and contains Dipropylene glycol monomethyl ether, hydrotreated heavy naphtha, dipropylene glycol - methyl ether acetate (really?), and carbon dioxide. + methyl ether acetate, and carbon dioxide. * **Resistors on pins 0 and 1**: these header pins, which are RX/TX on USART2 (:ref:`Serial2 <lang-serial>`), have resistors in-line @@ -192,13 +184,6 @@ Known issues: designs, where they appear to protect the USB-Serial converter from TTL voltage on the headers. -* **GPIO 39-43 not configured**: this is really more of a software - "TODO" item. Some of the JTAG header pins are numbered 39-43. These - STM32 pins are indeed fully functional :ref:`GPIO <gpio>` when the a - :ref:`JTAG <jtag>` device is not connected, but we have not enabled - them in software and thus they can not be accessed with the regular - :ref:`lang-pinmode` or :ref:`lang-digitalwrite` functions. - * **Silkscreen Errors**: the silkscreen on the bottom indicated PWM functionality on pin 25 and listen the external header GND pin as number 38 (actually 38 is connected to the BUT button). We manually @@ -207,17 +192,8 @@ Known issues: * **PWM Marketing Mistake**: We originally sold the Maple advertising 22 channels of 16-bit hardware PWM; actually the Maple only has 15. -Potential failure modes: - -* **TTL voltage on non-tolerant pins**: not all header pins are 5V - compatible; connecting certain serial devices in the wrong way could - over voltage the pins. The :ref:`Pin-Mapping Mega Table - <pin-mapping-mega-table>` details which pins are 5V-tolerant. - -Maple Rev 1 -^^^^^^^^^^^ - -Known issues: +Rev 1 +^^^^^ * **ADC noise**: generally very high, in particular when the USB port is being used for communications (including keep-alive pings when @@ -248,14 +224,7 @@ Known issues: <http://forums.leaflabs.com/topic.php?id=32#post-126>`_. * **PWM Marketing Mistake**: We originally sold the Maple advertising - 22 channels of 16-bit hardware PWM; actually the Maple only has 15. - -Potential failure modes: - -* **TTL voltage on non-tolerant pins**: not all header pins are 5v - compatible; connecting certain serial devices in the wrong way could - over voltage the pins. The :ref:`Pin-Mapping Mega Table - <pin-mapping-mega-table>` details which pins are 5V-tolerant. + 22 channels of 16-bit hardware PWM; the correct number is 15. Recommended Reading ------------------- diff --git a/docs/source/jtag.rst b/docs/source/jtag.rst index 858021e..cc6d34a 100644 --- a/docs/source/jtag.rst +++ b/docs/source/jtag.rst @@ -1,11 +1,12 @@ +.. highlight:: cpp + .. _jtag: ====== JTAG ====== -.. TODO update adapter schematic, add information on using it with our -.. devices. +.. FIXME update adapter schematic, add better information JTAG is an interface for low-level debugging of digital devices. It gives instruction by instruction control over the microprocessor and @@ -37,32 +38,36 @@ Wiring Diagram to connect a standard 20-pin ARM JTAG device to the 8-pin JTAG port on the Maple. -The Maple has holes for a 8-pin JTAG header but that header is not -soldered on by default. If you know ahead of time that you'll be -needing it, and you order `straight from LeafLabs -<http://leaflabs.com/store/>`_, add a comment to your order and we can -probably solder one on for no charge. Otherwise, you can simply -attach standard 0.1" pitch male header pins (either the exact 4x2 -block or two 4-pin pieces of breakaway straight header). For a one-off -usage hack, the header can be jammed in the holes and twisted to -ensure electrical contact. +The Maple has holes for a 8-pin JTAG header, but that header is not +soldered on. To use JTAG, simply solder on standard 0.1" pitch male +header pins (either the exact 4 by 2 block, or two 4-pin pieces of +straight breakaway header). Compatible Devices ------------------ We have had good experience with the `Olimex ARM-USB-OCD <http://www.olimex.com/dev/arm-usb-ocd.html>`_ device, which costs -about 55 euro plus shipping (as of November 2010). +about €55 plus shipping (as of April 2011). + +Function Reference +------------------ + +You can disable or enable the JTAG and Serial Wire debugging ports in +software using the ``disableDebugPorts()`` and ``enableDebugPorts()`` +functions. + +* :ref:`lang-disabledebugports` +* :ref:`lang-enabledebugports` Recommended Reading ------------------- * `Wikipedia Article on Joint Test Action Group (JTAG) <http://en.wikipedia.org/wiki/Joint_Test_Action_Group>`_ -* `STM32/gdb/OpenOCD HOWTO <http://fun-tech.se/stm32/OpenOCD/gdb.php>`_ +* `STM32, GDB, OpenOCD How To <http://fun-tech.se/stm32/OpenOCD/gdb.php>`_ * STMicro documentation for STM32F103RB microcontroller: * `Datasheet <http://www.st.com/stonline/products/literature/ds/13587.pdf>`_ (pdf) * `Reference Manual <http://www.st.com/stonline/products/literature/rm/13902.pdf>`_ (pdf) -* There's a `thread on JTAG - <http://forums.leaflabs.com/topic.php?id=536>`_ in our `forum`_ - which you may find useful. +* `LeafLabs Wiki JTAG How To <http://wiki.leaflabs.com/index.php?title=Maple_JTAG_How_To>`_ +* `Forum thread on JTAG <http://forums.leaflabs.com/topic.php?id=536>`_ diff --git a/docs/source/lang/api/board-values.rst b/docs/source/lang/api/board-values.rst index d6d78f6..e274163 100644 --- a/docs/source/lang/api/board-values.rst +++ b/docs/source/lang/api/board-values.rst @@ -84,8 +84,25 @@ Constants * ``BOARD_NR_USARTS``: Number of serial ports on the board. This number includes UARTs 4 and 5 if they are available. +.. _lang-board-values-debug: + +- Debug (JTAG, SW-Debug) related constants: ``BOARD_JTMS_SWDIO_PIN``, + ``BOARD_JTCK_SWCLK_PIN``, ``BOARD_JTDI_PIN``, ``BOARD_JTDO_PIN``, + and ``BOARD_NJTRST_PIN``. + + These constants are the pin numbers for :ref:`GPIOs <gpio>` used by + the :ref:`jtag` and Serial-Wire Debug peripherals. Except for the + Maple Mini, these pins are usually reserved for special purposes by + default (i.e., they are in :ref:`boardUsedPins + <lang-board-values-used-pins>`). However, they can be used as + ordinary GPIOs if you call the :ref:`lang-disabledebugports` + function. (Be careful with this on the Maple, as writing to + ``BOARD_NJTRST_PIN`` may cause your board to reset!). + .. _lang-board-values-pwm-pins: + .. _lang-board-values-adc-pins: + .. _lang-board-values-used-pins: Pin Arrays @@ -94,8 +111,7 @@ Pin Arrays Some :ref:`arrays <lang-array>` of pin numbers are available which you can use to find out certain important information about a given pin. -.. TODO add links to the board-specific hardware information on what -.. are in these arrays +.. TODO [0.1.0] links to board-specific hardware information - ``boardPWMPins``: Pin numbers of each pin capable of :ref:`PWM <pwm>` output, using :ref:`pwmWrite() <lang-pwmwrite>`. The total @@ -159,3 +175,5 @@ See Also - :ref:`lang-toggleled` - :ref:`lang-analogread` - :ref:`lang-pwmwrite` +- :ref:`lang-enabledebugports` +- :ref:`lang-disabledebugports` diff --git a/docs/source/lang/api/disabledebugports.rst b/docs/source/lang/api/disabledebugports.rst new file mode 100644 index 0000000..43ac337 --- /dev/null +++ b/docs/source/lang/api/disabledebugports.rst @@ -0,0 +1,31 @@ +.. highlight:: cpp + +.. _lang-disabledebugports: + +disableDebugPorts() +=================== + +Used to disable the JTAG and Serial Wire debugging ports. + +Library Documentation +--------------------- + +.. doxygenfunction:: disableDebugPorts + +Example +------- + + :: + + void setup() { + disableDebugPorts(); + } + + void loop() { + // Now you can use the debug port pins as ordinary pins + } + +See Also +-------- + +* :ref:`lang-enabledebugports` diff --git a/docs/source/lang/api/enabledebugports.rst b/docs/source/lang/api/enabledebugports.rst new file mode 100644 index 0000000..bee2b0a --- /dev/null +++ b/docs/source/lang/api/enabledebugports.rst @@ -0,0 +1,31 @@ +.. highlight:: cpp + +.. _lang-enabledebugports: + +enableDebugPorts() +================== + +Used to enable the JTAG and Serial Wire debugging ports. + +Library Documentation +--------------------- + +.. doxygenfunction:: enableDebugPorts + +Example +------- + + :: + + void setup() { + enableDebugPorts(); + // Now you can debug using JTAG and SW-Debug + } + + void loop() { + } + +See Also +-------- + +* :ref:`lang-disabledebugports` diff --git a/examples/test-session.cpp b/examples/test-session.cpp index d97d0ca..1d9daf0 100644 --- a/examples/test-session.cpp +++ b/examples/test-session.cpp @@ -27,8 +27,10 @@ void cmd_serial1_echo(void); void cmd_gpio_monitoring(void); void cmd_sequential_adc_reads(void); void cmd_gpio_qa(void); -void cmd_sequential_gpio_writes(void); +void cmd_sequential_gpio_toggling(void); void cmd_gpio_toggling(void); +void cmd_sequential_debug_gpio_toggling(void); +void cmd_debug_gpio_toggling(void); void cmd_but_test(void); void cmd_sequential_pwm_test(void); void cmd_servo_sweep(void); @@ -148,13 +150,21 @@ void loop () { break; case 'g': - cmd_sequential_gpio_writes(); + cmd_sequential_gpio_toggling(); break; case 'G': cmd_gpio_toggling(); break; + case 'j': + cmd_sequential_debug_gpio_toggling(); + break; + + case 'J': + cmd_debug_gpio_toggling(); + break; + case 'B': cmd_but_test(); break; @@ -266,6 +276,8 @@ void cmd_print_help(void) { SerialUSB.println("\tU: dump data as fast as possible on USB"); SerialUSB.println("\tg: toggle GPIOs sequentially"); SerialUSB.println("\tG: toggle GPIOs at the same time"); + SerialUSB.println("\tj: toggle debug port GPIOs sequentially"); + SerialUSB.println("\tJ: toggle debug port GPIOs simultaneously"); SerialUSB.println("\tB: test the built-in button"); SerialUSB.println("\tf: toggle pin 4 as fast as possible in bursts"); SerialUSB.println("\tr: monitor and print GPIO status changes"); @@ -534,7 +546,7 @@ void cmd_gpio_qa(void) { } } -void cmd_sequential_gpio_writes(void) { +void cmd_sequential_gpio_toggling(void) { SerialUSB.println("Sequentially toggling all unused pins. " "Press any key for next pin, ESC to stop."); @@ -582,6 +594,67 @@ void cmd_gpio_toggling(void) { } } +uint8 debugGPIOPins[] = {BOARD_JTMS_SWDIO_PIN, + BOARD_JTCK_SWCLK_PIN, + BOARD_JTDI_PIN, + BOARD_JTDO_PIN, + BOARD_NJTRST_PIN}; + +#define N_DEBUG_PINS 5 + +void cmd_sequential_debug_gpio_toggling(void) { + SerialUSB.println("Toggling all debug (JTAG/SWD) pins sequentially. " + "This will permanently disable debug port " + "functionality."); + disableDebugPorts(); + + for (int i = 0; i < N_DEBUG_PINS; i++) { + pinMode(debugGPIOPins[i], OUTPUT); + } + + for (int i = 0; i < N_DEBUG_PINS; i++) { + int pin = debugGPIOPins[i]; + SerialUSB.print("Toggling pin "); + SerialUSB.print(pin, DEC); + SerialUSB.println("..."); + + pinMode(pin, OUTPUT); + do { + togglePin(pin); + } while (!SerialUSB.available()); + + digitalWrite(pin, LOW); + if (SerialUSB.read() == ESC) + break; + } + + for (int i = 0; i < N_DEBUG_PINS; i++) { + digitalWrite(debugGPIOPins[i], 0); + } +} + +void cmd_debug_gpio_toggling(void) { + SerialUSB.println("Toggling debug GPIO simultaneously. " + "This will permanently disable JTAG and Serial Wire " + "debug port functionality. " + "Press any key to stop."); + disableDebugPorts(); + + for (uint32 i = 0; i < N_DEBUG_PINS; i++) { + pinMode(debugGPIOPins[i], OUTPUT); + } + + while (!SerialUSB.available()) { + for (uint32 i = 0; i < N_DEBUG_PINS; i++) { + togglePin(debugGPIOPins[i]); + } + } + + for (uint32 i = 0; i < N_DEBUG_PINS; i++) { + digitalWrite(debugGPIOPins[i], LOW); + } +} + void cmd_but_test(void) { SerialUSB.println("Press the button to test. Press any key to stop."); pinMode(BOARD_BUTTON_PIN, INPUT); diff --git a/libmaple/gpio.h b/libmaple/gpio.h index ec31cc0..353f965 100644 --- a/libmaple/gpio.h +++ b/libmaple/gpio.h @@ -22,7 +22,7 @@ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. - *****************************************************************************/ +*****************************************************************************/ /** * @file gpio.h @@ -261,22 +261,23 @@ typedef struct afio_reg_map { #define AFIO_EVCR_PIN_15 0xF /* AF remap and debug I/O configuration register */ -#define AFIO_MAPR_SWJ_FULL_SWJ (0x0 << 24) -#define AFIO_MAPR_SWJ_FULL_SWJ_NO_NJRST (0x1 << 24) -#define AFIO_MAPR_SWJ_NO_JTAG_SW (0x2 << 24) -#define AFIO_MAPR_SWJ_NO_JTAG_NO_SW (0x4 << 24) +#define AFIO_MAPR_SWJ_CFG (0x7 << 24) +#define AFIO_MAPR_SWJ_CFG_FULL_SWJ (0x0 << 24) +#define AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_NJRST (0x1 << 24) +#define AFIO_MAPR_SWJ_CFG_NO_JTAG_SW (0x2 << 24) +#define AFIO_MAPR_SWJ_CFG_NO_JTAG_NO_SW (0x4 << 24) #define AFIO_MAPR_ADC2_ETRGREG_REMAP BIT(20) #define AFIO_MAPR_ADC2_ETRGINJ_REMAP BIT(19) #define AFIO_MAPR_ADC1_ETRGREG_REMAP BIT(18) #define AFIO_MAPR_ADC1_ETRGINJ_REMAP BIT(17) #define AFIO_MAPR_TIM5CH4_IREMAP BIT(16) #define AFIO_MAPR_PD01_REMAP BIT(15) -#define AFIO_MAPR_CAN_REMAP (BIT(14) | BIT(13)) -#define AFIO_MAPR_TIM4_REMAP_FULL BIT(12) -#define AFIO_MAPR_TIM3_REMAP (BIT(11) | BIT(10)) -#define AFIO_MAPR_TIM2_REMAP (BIT(9) | BIT(8)) -#define AFIO_MAPR_TIM1_REMAP (BIT(7) | BIT(6)) -#define AFIO_MAPR_USART3_REMAP (BIT(5) | BIT(4)) +#define AFIO_MAPR_CAN_REMAP (0x3 << 13) +#define AFIO_MAPR_TIM4_REMAP BIT(12) +#define AFIO_MAPR_TIM3_REMAP (0x3 << 10) +#define AFIO_MAPR_TIM2_REMAP (0x3 << 8) +#define AFIO_MAPR_TIM1_REMAP (0x3 << 6) +#define AFIO_MAPR_USART3_REMAP (0x3 << 4) #define AFIO_MAPR_USART2_REMAP BIT(3) #define AFIO_MAPR_USART1_REMAP BIT(2) #define AFIO_MAPR_I2C1_REMAP BIT(1) @@ -322,17 +323,32 @@ void afio_init(void); void afio_exti_select(afio_exti_num exti, afio_exti_port gpio_port); /** - * Set the SWJ_CONFIG bits in the AFIO MAPR register. + * @brief Debug port configuration * - * @param config Desired SWJ_CONFIG bits setting. One of: - * AFIO_MAPR_SWJ_FULL_SWJ (full SWJ), - * AFIO_MAPR_SWJ_FULL_SWJ_NO_NJRST (full SWJ, no NJTRST), - * AFIO_MAPR_SWJ_NO_JTAG_SW (JTAG-DP disabled, SW-DP enabled), - * AFIO_MAPR_SWJ_NO_JTAG_NO_SW (JTAG-DP and SW-DP both disabled). + * Used to configure the behavior of JTAG and Serial Wire (SW) debug + * ports and their associated GPIO pins. */ -static inline void afio_mapr_swj_config(uint32 config) { +typedef enum afio_debug_cfg { + AFIO_DEBUG_FULL_SWJ = AFIO_MAPR_SWJ_CFG_FULL_SWJ, /**< + Full Serial Wire and JTAG debug */ + AFIO_DEBUG_FULL_SWJ_NO_NJRST = AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_NJRST, /**< + Full Serial Wire and JTAG, but no NJTRST. */ + AFIO_DEBUG_SW_ONLY = AFIO_MAPR_SWJ_CFG_NO_JTAG_SW, /**< + Serial Wire debug only (JTAG-DP disabled, + SW-DP enabled) */ + AFIO_DEBUG_NONE = AFIO_MAPR_SWJ_CFG_NO_JTAG_NO_SW /**< + No debug; all JTAG and SW pins are free + for use as GPIOs. */ +} afio_debug_cfg; + +/** + * @brief Enable or disable the JTAG and SW debug ports. + * @param config Desired debug port configuration + * @see afio_debug_cfg + */ +static inline void afio_cfg_debug_ports(afio_debug_cfg config) { __io uint32 *mapr = &AFIO_BASE->MAPR; - *mapr = (*mapr & ~(0x7 << 24)) | config; + *mapr = (*mapr & ~AFIO_MAPR_SWJ_CFG) | config; } #ifdef __cplusplus diff --git a/wirish/boards/maple.cpp b/wirish/boards/maple.cpp index 5122290..2d35e7b 100644 --- a/wirish/boards/maple.cpp +++ b/wirish/boards/maple.cpp @@ -88,7 +88,15 @@ extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { {GPIOC, NULL, NULL, 6, 0, ADCx}, /* D35/PC6 */ {GPIOC, NULL, NULL, 7, 0, ADCx}, /* D36/PC7 */ {GPIOC, NULL, NULL, 8, 0, ADCx}, /* D37/PC8 */ - {GPIOC, NULL, NULL, 9, 0, ADCx} /* D38/PC9 (BUT) */ + {GPIOC, NULL, NULL, 9, 0, ADCx}, /* D38/PC9 (BUT) */ + + /* JTAG header */ + + {GPIOA, NULL, NULL, 13, 0, ADCx}, /* D39/PA13 */ + {GPIOA, NULL, NULL, 14, 0, ADCx}, /* D40/PA14 */ + {GPIOA, NULL, NULL, 15, 0, ADCx}, /* D41/PA15 */ + {GPIOB, NULL, NULL, 3, 0, ADCx}, /* D42/PB3 */ + {GPIOB, NULL, NULL, 4, 0, ADCx}, /* D43/PB4 */ }; extern const uint8 boardPWMPins[] __FLASH__ = { @@ -100,7 +108,8 @@ extern const uint8 boardADCPins[] __FLASH__ = { }; extern const uint8 boardUsedPins[] __FLASH__ = { - BOARD_LED_PIN, BOARD_BUTTON_PIN + BOARD_LED_PIN, BOARD_BUTTON_PIN, BOARD_JTMS_SWDIO_PIN, + BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN }; #endif diff --git a/wirish/boards/maple.h b/wirish/boards/maple.h index 1867de8..4a4465c 100644 --- a/wirish/boards/maple.h +++ b/wirish/boards/maple.h @@ -54,7 +54,7 @@ /* Total number of GPIO pins that are broken out to headers and * intended for general use. */ -#define BOARD_NR_GPIO_PINS 39 +#define BOARD_NR_GPIO_PINS 44 /* Number of pins capable of PWM output */ #define BOARD_NR_PWM_PINS 16 @@ -64,6 +64,15 @@ /* Number of pins already connected to external hardware. For Maple, * these are just BOARD_LED_PIN and BOARD_BUTTON_PIN. */ -#define BOARD_NR_USED_PINS 2 +#define BOARD_NR_USED_PINS 7 + +/* + * Debug port pins + */ +#define BOARD_JTMS_SWDIO_PIN 39 +#define BOARD_JTCK_SWCLK_PIN 40 +#define BOARD_JTDI_PIN 41 +#define BOARD_JTDO_PIN 42 +#define BOARD_NJTRST_PIN 43 #endif diff --git a/wirish/boards/maple_mini.cpp b/wirish/boards/maple_mini.cpp index cd2827d..02d62c7 100644 --- a/wirish/boards/maple_mini.cpp +++ b/wirish/boards/maple_mini.cpp @@ -32,13 +32,14 @@ #include "maple_mini.h" #include "gpio.h" +#include "wirish_debug.h" #ifdef BOARD_maple_mini /* Since we want the Serial Wire/JTAG pins as GPIOs, disable both SW * and JTAG debug support */ void boardInit(void) { - afio_mapr_swj_config(AFIO_MAPR_SWJ_NO_JTAG_NO_SW); + disableDebugPorts(); } extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { @@ -89,7 +90,7 @@ extern const uint8 boardPWMPins[BOARD_NR_PWM_PINS] __FLASH__ = { }; extern const uint8 boardADCPins[BOARD_NR_ADC_PINS] __FLASH__ = { - 3, 4, 5, 6, 7, 8, 9, 10, 11, 33 // NB 33 is LED + 3, 4, 5, 6, 7, 8, 9, 10, 11, 33 // NB: 33 is BOARD_LED_PIN }; #define USB_DP 23 diff --git a/wirish/boards/maple_mini.h b/wirish/boards/maple_mini.h index 8b7ae64..3df1da8 100644 --- a/wirish/boards/maple_mini.h +++ b/wirish/boards/maple_mini.h @@ -59,4 +59,10 @@ #define BOARD_NR_ADC_PINS 10 #define BOARD_NR_USED_PINS 4 +#define BOARD_JTMS_SWDIO_PIN 22 +#define BOARD_JTCK_SWCLK_PIN 21 +#define BOARD_JTDI_PIN 20 +#define BOARD_JTDO_PIN 19 +#define BOARD_NJTRST_PIN 18 + #endif diff --git a/wirish/boards/maple_native.cpp b/wirish/boards/maple_native.cpp index adc9497..0b25bd4 100644 --- a/wirish/boards/maple_native.cpp +++ b/wirish/boards/maple_native.cpp @@ -72,7 +72,8 @@ extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { {GPIOB, TIMER4, NULL, 9, 4, ADCx}, /* D26/PB9 */ /* Bottom header */ - /* Note: D{49, 50, 51} are also TIMER2_CH{2, 3, 4}, respectively. */ + /* Note: D{48, 49, 50, 51} are also TIMER2_CH{1, 2, 3, 4}, respectively. */ + /* TODO remap timer 2 in boardInit(); make the appropriate changes here */ {GPIOD, NULL, NULL, 2, 0, ADCx}, /* D27/PD2 */ {GPIOD, NULL, NULL, 3, 0, ADCx}, /* D28/PD3 */ @@ -150,7 +151,15 @@ extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { {GPIOG, NULL, NULL, 4, 0, ADCx}, /* D97/PG4 */ {GPIOD, NULL, NULL, 9, 0, ADCx}, /* D98/PD9 */ {GPIOG, NULL, NULL, 5, 0, ADCx}, /* D99/PG5 */ - {GPIOD, NULL, NULL, 10, 0, ADCx} /* D100/PD10 */ + {GPIOD, NULL, NULL, 10, 0, ADCx}, /* D100/PD10 */ + + /* JTAG header */ + + {GPIOA, NULL, NULL, 13, 0, ADCx}, /* D101/PA13 */ + {GPIOA, NULL, NULL, 14, 0, ADCx}, /* D102/PA14 */ + {GPIOA, NULL, NULL, 15, 0, ADCx}, /* D103/PA15 */ + {GPIOB, NULL, NULL, 3, 0, ADCx}, /* D104/PB3 */ + {GPIOB, NULL, NULL, 4, 0, ADCx} /* D105/PB4 */ }; extern const uint8 boardPWMPins[BOARD_NR_PWM_PINS] __FLASH__ = { @@ -164,7 +173,8 @@ extern const uint8 boardADCPins[BOARD_NR_ADC_PINS] __FLASH__ = { /* FIXME! see comment by BOARD_NR_USED_PINS in maple_native.h */ extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = { - BOARD_LED_PIN, BOARD_BUTTON_PIN + BOARD_LED_PIN, BOARD_BUTTON_PIN, BOARD_JTMS_SWDIO_PIN, + BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN }; #endif diff --git a/wirish/boards/maple_native.h b/wirish/boards/maple_native.h index 10dafa6..13df153 100644 --- a/wirish/boards/maple_native.h +++ b/wirish/boards/maple_native.h @@ -58,12 +58,18 @@ #define BOARD_UART5_TX_PIN 21 #define BOARD_UART5_RX_PIN 29 -#define BOARD_NR_GPIO_PINS 101 +#define BOARD_NR_GPIO_PINS 106 #define BOARD_NR_PWM_PINS 18 #define BOARD_NR_ADC_PINS 21 /* FIXME! this isn't true at all; almost all of the triple header pins * are used by the FSMC by default. Fix this (and the corresponding * boardUsedPins definition in maple_native.cpp) by QA time. */ -#define BOARD_NR_USED_PINS 2 +#define BOARD_NR_USED_PINS 7 + +#define BOARD_JTMS_SWDIO_PIN 101 +#define BOARD_JTCK_SWCLK_PIN 102 +#define BOARD_JTDI_PIN 103 +#define BOARD_JTDO_PIN 104 +#define BOARD_NJTRST_PIN 105 #endif diff --git a/wirish/wirish.h b/wirish/wirish.h index 4cc142d..d30ad20 100644 --- a/wirish/wirish.h +++ b/wirish/wirish.h @@ -39,6 +39,7 @@ #include "bits.h" #include "pwm.h" #include "ext_interrupts.h" +#include "wirish_debug.h" #include "wirish_math.h" #include "wirish_time.h" #include "HardwareSPI.h" diff --git a/wirish/wirish_debug.h b/wirish/wirish_debug.h new file mode 100644 index 0000000..d4c0bab --- /dev/null +++ b/wirish/wirish_debug.h @@ -0,0 +1,54 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file wirish_debug.h + * @brief High level debug port configuration + */ + +/** + * @brief Disable the JTAG and Serial Wire (SW) debug ports. + * + * You can call this function in order to use the JTAG and SW debug + * pins as ordinary GPIOs. + * + * @see enableDebugPorts() + */ +static inline void disableDebugPorts(void) { + afio_cfg_debug_ports(AFIO_DEBUG_NONE); +} + +/** + * @brief Enable the JTAG and Serial Wire (SW) debug ports. + * + * After you call this function, the JTAG and SW debug pins will no + * longer be usable as GPIOs. + * + * @see disableDebugPorts() + */ +static inline void enableDebugPorts(void) { + afio_cfg_debug_ports(AFIO_DEBUG_FULL_SWJ); +} |