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authorMarti Bolivar <mbolivar@leaflabs.com>2012-07-31 15:00:57 -0400
committerMarti Bolivar <mbolivar@leaflabs.com>2012-07-31 15:04:49 -0400
commitc8b7f0b5b390ff4cae32566d53f4410e72de4573 (patch)
treea28d849f8f06797e7e78f2cb6c30da1819ab9d2f /wirish
parent925446023aa23c2141d711c6e42cd2f75ce70a93 (diff)
downloadlibrambutan-c8b7f0b5b390ff4cae32566d53f4410e72de4573.tar.gz
librambutan-c8b7f0b5b390ff4cae32566d53f4410e72de4573.zip
Move bootloader reset signal detection to Wirish.
Use usb_cdcacm hooks to move the DTR edge and "1EAF" magic packet detection to usb_serial.cpp. We'll later be able to extend this system to support Leonardo-style reset signalling. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'wirish')
-rw-r--r--wirish/usb_serial.cpp116
1 files changed, 116 insertions, 0 deletions
diff --git a/wirish/usb_serial.cpp b/wirish/usb_serial.cpp
index cfc6317..bf2ea4e 100644
--- a/wirish/usb_serial.cpp
+++ b/wirish/usb_serial.cpp
@@ -32,11 +32,23 @@
#include <string.h>
+#include <libmaple/nvic.h>
#include <libmaple/usb_cdcacm.h>
#include <libmaple/usb.h>
#include <wirish/wirish.h>
+/*
+ * Hooks used for bootloader reset signalling
+ */
+
+static void rxHook(unsigned, void*);
+static void ifaceSetupHook(unsigned, void*);
+
+/*
+ * USBSerial interface
+ */
+
#define USB_TIMEOUT 50
USBSerial::USBSerial(void) {
@@ -48,12 +60,15 @@ USBSerial::USBSerial(void) {
void USBSerial::begin(void) {
#if BOARD_HAVE_SERIALUSB
usb_cdcacm_enable(BOARD_USB_DISC_DEV, BOARD_USB_DISC_BIT);
+ usb_cdcacm_set_hooks(USB_CDCACM_HOOK_RX, rxHook);
+ usb_cdcacm_set_hooks(USB_CDCACM_HOOK_IFACE_SETUP, ifaceSetupHook);
#endif
}
void USBSerial::end(void) {
#if BOARD_HAVE_SERIALUSB
usb_cdcacm_disable(BOARD_USB_DISC_DEV, BOARD_USB_DISC_BIT);
+ usb_cdcacm_remove_hooks(USB_CDCACM_HOOK_RX | USB_CDCACM_HOOK_IFACE_SETUP);
#endif
}
@@ -126,3 +141,104 @@ uint8 USBSerial::getRTS(void) {
#if BOARD_HAVE_SERIALUSB
USBSerial SerialUSB;
#endif
+
+/*
+ * Bootloader hook implementations
+ */
+
+enum reset_state_t {
+ DTR_UNSET,
+ DTR_HIGH,
+ DTR_NEGEDGE,
+ DTR_LOW
+};
+
+static reset_state_t reset_state = DTR_UNSET;
+
+static void ifaceSetupHook(unsigned hook, void *requestvp) {
+ uint8 request = *(uint8*)requestvp;
+
+ // Ignore requests we're not interested in.
+ if (request != USB_CDCACM_SET_CONTROL_LINE_STATE) {
+ return;
+ }
+
+ // We need to see a negative edge on DTR before we start looking
+ // for the in-band magic reset byte sequence.
+ uint8 dtr = usb_cdcacm_get_dtr();
+ switch (reset_state) {
+ case DTR_UNSET:
+ reset_state = dtr ? DTR_HIGH : DTR_LOW;
+ break;
+ case DTR_HIGH:
+ reset_state = dtr ? DTR_HIGH : DTR_NEGEDGE;
+ break;
+ case DTR_NEGEDGE:
+ reset_state = dtr ? DTR_HIGH : DTR_LOW;
+ break;
+ case DTR_LOW:
+ reset_state = dtr ? DTR_HIGH : DTR_LOW;
+ break;
+ }
+}
+
+#define RESET_DELAY 100000
+static void wait_reset(void) {
+ delay_us(RESET_DELAY);
+ nvic_sys_reset();
+}
+
+#define STACK_TOP 0x20000800
+#define EXC_RETURN 0xFFFFFFF9
+#define DEFAULT_CPSR 0x61000000
+static void rxHook(unsigned hook, void *ignored) {
+ /* FIXME this is mad buggy; we need a new reset sequence. E.g. NAK
+ * after each RX means you can't reset if any bytes are waiting. */
+ if (reset_state == DTR_NEGEDGE) {
+ reset_state = DTR_LOW;
+
+ if (usb_cdcacm_data_available() >= 4) {
+ // The magic reset sequence is "1EAF".
+ uint8 cmpBuf[4] = {'1', 'E', 'A', 'F'};
+ uint8 chkBuf[4];
+
+ // Peek at the waiting bytes, looking for reset sequence.
+ usb_cdcacm_peek(chkBuf, 4);
+ bool cmpMatch = true;
+ for (int i = 0; i < 4; i++) {
+ if (chkBuf[i] != cmpBuf[i]) {
+ cmpMatch = false;
+ break;
+ }
+ }
+
+ // Got the magic sequence? Reset, presumably into the bootloader.
+ if (cmpMatch) {
+ // Return address is wait_reset, but we must set the thumb bit.
+ unsigned int target = (unsigned int)wait_reset | 0x1;
+ asm volatile("mov r0, %[stack_top] \n\t" // Reset stack
+ "mov sp, r0 \n\t"
+ "mov r0, #1 \n\t"
+ "mov r1, %[target_addr] \n\t"
+ "mov r2, %[cpsr] \n\t"
+ "push {r2} \n\t" // Fake xPSR
+ "push {r1} \n\t" // PC target addr
+ "push {r0} \n\t" // Fake LR
+ "push {r0} \n\t" // Fake R12
+ "push {r0} \n\t" // Fake R3
+ "push {r0} \n\t" // Fake R2
+ "push {r0} \n\t" // Fake R1
+ "push {r0} \n\t" // Fake R0
+ "mov lr, %[exc_return] \n\t"
+ "bx lr"
+ :
+ : [stack_top] "r" (STACK_TOP),
+ [target_addr] "r" (target),
+ [exc_return] "r" (EXC_RETURN),
+ [cpsr] "r" (DEFAULT_CPSR)
+ : "r0", "r1", "r2");
+ /* should never get here */
+ }
+ }
+ }
+}