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authorMarti Bolivar <mbolivar@leaflabs.com>2014-10-15 18:14:54 +0800
committerbryan newbold <bnewbold@twinleaf.com>2014-11-24 15:18:25 -0800
commit4ad3b4e440f72264ceec77d3db6ed9ac6cb331da (patch)
tree80f10b7ca5da0b4ce2b254d1105d350bb6a8bd74 /wirish
parent4e157c6ed0e2e211cfd2d786c39b2a3d4f116085 (diff)
downloadlibrambutan-4ad3b4e440f72264ceec77d3db6ed9ac6cb331da.tar.gz
librambutan-4ad3b4e440f72264ceec77d3db6ed9ac6cb331da.zip
wirish: allow boards to override PLL input clock
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'wirish')
-rw-r--r--wirish/boards.cpp12
-rw-r--r--wirish/boards_private.h1
2 files changed, 9 insertions, 4 deletions
diff --git a/wirish/boards.cpp b/wirish/boards.cpp
index 365d5ab..dbf824d 100644
--- a/wirish/boards.cpp
+++ b/wirish/boards.cpp
@@ -120,6 +120,8 @@ static void setup_nvic(void) {
namespace wirish {
namespace priv {
+__weak rcc_clk w_board_pll_in_clk = RCC_CLK_HSE;
+
__weak void board_setup_flash(void) {
// Turn on as many Flash "go faster" features as
// possible. flash_enable_features() just ignores any flags it
@@ -140,15 +142,17 @@ __weak void board_setup_clocks(void) {
RCC_BASE->CFGR = 0x00000000;
rcc_disable_css();
rcc_turn_off_clk(RCC_CLK_PLL);
- rcc_turn_off_clk(RCC_CLK_HSE);
+ if (w_board_pll_in_clk != RCC_CLK_HSI) {
+ rcc_turn_off_clk(w_board_pll_in_clk);
+ }
wirish::priv::board_reset_pll();
// Clear clock readiness interrupt flags and turn off clock
// readiness interrupts.
RCC_BASE->CIR = 0x00000000;
- // Enable HSE, and wait until it's ready.
- rcc_turn_on_clk(RCC_CLK_HSE);
- while (!rcc_is_clk_ready(RCC_CLK_HSE))
+ // Enable the PLL input clock, and wait until it's ready.
+ rcc_turn_on_clk(w_board_pll_in_clk);
+ while (!rcc_is_clk_ready(w_board_pll_in_clk))
;
// Configure AHBx, APBx, etc. prescalers and the main PLL.
diff --git a/wirish/boards_private.h b/wirish/boards_private.h
index 75c6984..642a9ee 100644
--- a/wirish/boards_private.h
+++ b/wirish/boards_private.h
@@ -52,6 +52,7 @@ namespace wirish {
*/
extern rcc_pll_cfg w_board_pll_cfg;
+ extern rcc_clk w_board_pll_in_clk;
extern adc_prescaler w_adc_pre;
extern adc_smp_rate w_adc_smp;