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authorMarti Bolivar <mbolivar@leaflabs.com>2012-06-01 03:05:56 -0400
committerMarti Bolivar <mbolivar@leaflabs.com>2012-06-01 03:05:56 -0400
commit5befb0826a1ff77994c55f42cd73ccf0905a5ce0 (patch)
treec5c5d3f3eb024533ef134f22cd5f94e67bbd2fcf /wirish/include/wirish/HardwareTimer.h
parent33a2fff2fc60ea0e6938d72c81812b2afb3bfb0e (diff)
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libmaple/stm32.h: Add STM32_TIMER_MASK, STM32_HAVE_TIMER.
Feature-test macros for dealing with the fact that timer support has holes. STM32_TIMER_MASK is a bitmask where bit n is set when TIMERn is present. STM32_HAVE_TIMER(n) just tests whether bit n is set in STM32_TIMER_MASK. This is necessary because e.g. the STM32F100RB has timers 1-4, 6, 7, and 15-17. Because of this, the usual STM32_NR_whatever won't work, and we use a bitmask instead. For F1 performance line (F103s), STM32_TIMER_MASK can be derived from the density. For F1 value line, I'm not as sure, so just add it for the single MCU we support (the STM32F100RB). Same story for F2: add it for the STM32F207IC. We can fix this up later if necessary. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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