Final stm32_pin_info design candidate; ADC3 support on Native.

Added an adc_dev to struct stm32_pin_info.  This was necessary to add
support for the channels on the Native which are only connected to
ADC3, but it does add a bunch of NULLs to the PIN_MAPs.

I don't think any other peripherals need representation on a per-pin
basis.  Each peripheral library will be responsible for keeping track
of related GPIO ports and bits, and we can throw #defines in to
boards/*.h for other things (e.g. BOARD_SPI1_MISO_PIN).

Fleshed out the ADC refactor and brought it more in keeping with the
new design as it evolves.

A couple of other tweaks.  Notably: waitForButtonPress() now takes a
default argument meaning "wait forever".

Removed Maple-specific documentation from core functions in io.h; this
information will need to go into the individual board docs files.

4 files changed, 216 insertions, 213 deletions

diff --git a/wirish/boards/maple.cpp b/wirish/boards/maple.cpp
index cebd222..ba2261b 100644
--- a/wirish/boards/maple.cpp
+++ b/wirish/boards/maple.cpp
@@ -44,51 +44,51 @@ stm32_pin_info PIN_MAP[NR_GPIO_PINS] = {
 
     /* Top header */
 
-    {GPIOA, TIMER2,  3, 4,    3}, /* D0/PA3 */
-    {GPIOA, TIMER2,  2, 3,    2}, /* D1/PA2 */
-    {GPIOA, TIMER2,  0, 1,    0}, /* D2/PA0 */
-    {GPIOA, TIMER2,  1, 2,    1}, /* D3/PA1 */
-    {GPIOB,   NULL,  5, 0, ADCx}, /* D4/PB5 */
-    {GPIOB, TIMER4,  6, 1, ADCx}, /* D5/PB6 */
-    {GPIOA, TIMER1,  8, 1, ADCx}, /* D6/PA8 */
-    {GPIOA, TIMER1,  9, 2, ADCx}, /* D7/PA9 */
-    {GPIOA, TIMER1, 10, 3, ADCx}, /* D8/PA10 */
-    {GPIOB, TIMER4,  7, 2, ADCx}, /* D9/PB7 */
-    {GPIOA,   NULL,  4, 0,    4}, /* D10/PA4 */
-    {GPIOA, TIMER3,  7, 2,    7}, /* D11/PA7 */
-    {GPIOA, TIMER3,  6, 1,    6}, /* D12/PA6 */
-    {GPIOA,   NULL,  5, 0,    5}, /* D13/PA5 (LED) */
-    {GPIOB, TIMER4,  8, 3, ADCx}, /* D14/PB8 */
+    {GPIOA, TIMER2, ADC1,  3, 4,    3}, /* D0/PA3 */
+    {GPIOA, TIMER2, ADC1,  2, 3,    2}, /* D1/PA2 */
+    {GPIOA, TIMER2, ADC1,  0, 1,    0}, /* D2/PA0 */
+    {GPIOA, TIMER2, ADC1,  1, 2,    1}, /* D3/PA1 */
+    {GPIOB,   NULL, NULL,  5, 0, ADCx}, /* D4/PB5 */
+    {GPIOB, TIMER4, NULL,  6, 1, ADCx}, /* D5/PB6 */
+    {GPIOA, TIMER1, NULL,  8, 1, ADCx}, /* D6/PA8 */
+    {GPIOA, TIMER1, NULL,  9, 2, ADCx}, /* D7/PA9 */
+    {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* D8/PA10 */
+    {GPIOB, TIMER4, NULL,  7, 2, ADCx}, /* D9/PB7 */
+    {GPIOA,   NULL, ADC1,  4, 0,    4}, /* D10/PA4 */
+    {GPIOA, TIMER3, ADC1,  7, 2,    7}, /* D11/PA7 */
+    {GPIOA, TIMER3, ADC1,  6, 1,    6}, /* D12/PA6 */
+    {GPIOA,   NULL, ADC1,  5, 0,    5}, /* D13/PA5 (LED) */
+    {GPIOB, TIMER4, NULL,  8, 3, ADCx}, /* D14/PB8 */
 
     /* Little header */
 
-    {GPIOC,   NULL,  0, 0,   10}, /* D15/PC0 */
-    {GPIOC,   NULL,  1, 0,   11}, /* D16/PC1 */
-    {GPIOC,   NULL,  2, 0,   12}, /* D17/PC2 */
-    {GPIOC,   NULL,  3, 0,   13}, /* D18/PC3 */
-    {GPIOC,   NULL,  4, 0,   14}, /* D19/PC4 */
-    {GPIOC,   NULL,  5, 0,   15}, /* D20/PC5 */
+    {GPIOC,   NULL, ADC1,  0, 0,   10}, /* D15/PC0 */
+    {GPIOC,   NULL, ADC1,  1, 0,   11}, /* D16/PC1 */
+    {GPIOC,   NULL, ADC1,  2, 0,   12}, /* D17/PC2 */
+    {GPIOC,   NULL, ADC1,  3, 0,   13}, /* D18/PC3 */
+    {GPIOC,   NULL, ADC1,  4, 0,   14}, /* D19/PC4 */
+    {GPIOC,   NULL, ADC1,  5, 0,   15}, /* D20/PC5 */
 
     /* External header */
 
-    {GPIOC,   NULL, 13, 0, ADCx}, /* D21/PC13 */
-    {GPIOC,   NULL, 14, 0, ADCx}, /* D22/PC14 */
-    {GPIOC,   NULL, 15, 0, ADCx}, /* D23/PC15 */
-    {GPIOB, TIMER4,  9, 4, ADCx}, /* D24/PB9 */
-    {GPIOD,   NULL,  2, 0, ADCx}, /* D25/PD2 */
-    {GPIOC,   NULL, 10, 0, ADCx}, /* D26/PC10 */
-    {GPIOB, TIMER3,  0, 3,    8}, /* D27/PB0 */
-    {GPIOB, TIMER3,  1, 4,    9}, /* D28/PB1 */
-    {GPIOB,   NULL, 10, 0, ADCx}, /* D29/PB10 */
-    {GPIOB,   NULL, 11, 0, ADCx}, /* D30/PB11 */
-    {GPIOB,   NULL, 12, 0, ADCx}, /* D31/PB12 */
-    {GPIOB,   NULL, 13, 0, ADCx}, /* D32/PB13 */
-    {GPIOB,   NULL, 14, 0, ADCx}, /* D33/PB14 */
-    {GPIOB,   NULL, 15, 0, ADCx}, /* D34/PB15 */
-    {GPIOC,   NULL,  6, 0, ADCx}, /* D35/PC6 */
-    {GPIOC,   NULL,  7, 0, ADCx}, /* D36/PC7 */
-    {GPIOC,   NULL,  8, 0, ADCx}, /* D37/PC8 */
-    {GPIOC,   NULL,  9, 0, ADCx}  /* D38/PC9 (BUT) */
+    {GPIOC,   NULL, NULL, 13, 0, ADCx}, /* D21/PC13 */
+    {GPIOC,   NULL, NULL, 14, 0, ADCx}, /* D22/PC14 */
+    {GPIOC,   NULL, NULL, 15, 0, ADCx}, /* D23/PC15 */
+    {GPIOB, TIMER4, NULL,  9, 4, ADCx}, /* D24/PB9 */
+    {GPIOD,   NULL, NULL,  2, 0, ADCx}, /* D25/PD2 */
+    {GPIOC,   NULL, NULL, 10, 0, ADCx}, /* D26/PC10 */
+    {GPIOB, TIMER3, ADC1,  0, 3,    8}, /* D27/PB0 */
+    {GPIOB, TIMER3, ADC1,  1, 4,    9}, /* D28/PB1 */
+    {GPIOB,   NULL, NULL, 10, 0, ADCx}, /* D29/PB10 */
+    {GPIOB,   NULL, NULL, 11, 0, ADCx}, /* D30/PB11 */
+    {GPIOB,   NULL, NULL, 12, 0, ADCx}, /* D31/PB12 */
+    {GPIOB,   NULL, NULL, 13, 0, ADCx}, /* D32/PB13 */
+    {GPIOB,   NULL, NULL, 14, 0, ADCx}, /* D33/PB14 */
+    {GPIOB,   NULL, NULL, 15, 0, ADCx}, /* D34/PB15 */
+    {GPIOC,   NULL, NULL,  6, 0, ADCx}, /* D35/PC6 */
+    {GPIOC,   NULL, NULL,  7, 0, ADCx}, /* D36/PC7 */
+    {GPIOC,   NULL, NULL,  8, 0, ADCx}, /* D37/PC8 */
+    {GPIOC,   NULL, NULL,  9, 0, ADCx}  /* D38/PC9 (BUT) */
 };
 
 #endif
diff --git a/wirish/boards/maple_RET6.cpp b/wirish/boards/maple_RET6.cpp
index ae31ce3..962affc 100644
--- a/wirish/boards/maple_RET6.cpp
+++ b/wirish/boards/maple_RET6.cpp
@@ -38,51 +38,54 @@ void boardInit(void) {
 }
 
 stm32_pin_info PIN_MAP[NR_GPIO_PINS] = {
-    {GPIOA, TIMER2,  3, 4,    3}, /* D0/PA3 */
-    {GPIOA, TIMER2,  2, 3,    2}, /* D1/PA2 */
-    {GPIOA, TIMER2,  0, 1,    0}, /* D2/PA0 */
-    {GPIOA, TIMER2,  1, 2,    1}, /* D3/PA1 */
-    {GPIOB,   NULL,  5, 0, ADCx}, /* D4/PB5 */
-    {GPIOB, TIMER4,  6, 1, ADCx}, /* D5/PB6 */
-    {GPIOA, TIMER1,  8, 1, ADCx}, /* D6/PA8 */
-    {GPIOA, TIMER1,  9, 2, ADCx}, /* D7/PA9 */
-    {GPIOA, TIMER1, 10, 3, ADCx}, /* D8/PA10 */
-    {GPIOB, TIMER4,  7, 2, ADCx}, /* D9/PB7 */
-    {GPIOA,   NULL,  4, 0,    4}, /* D10/PA4 */
-    {GPIOA, TIMER3,  7, 2,    7}, /* D11/PA7 */
-    {GPIOA, TIMER3,  6, 1,    6}, /* D12/PA6 */
-    {GPIOA,   NULL,  5, 0,    5}, /* D13/PA5 (LED) */
-    {GPIOB, TIMER4,  8, 3, ADCx}, /* D14/PB8 */
+
+    /* Top header */
+
+    {GPIOA, TIMER2, ADC1,  3, 4,    3}, /* D0/PA3 */
+    {GPIOA, TIMER2, ADC1,  2, 3,    2}, /* D1/PA2 */
+    {GPIOA, TIMER2, ADC1,  0, 1,    0}, /* D2/PA0 */
+    {GPIOA, TIMER2, ADC1,  1, 2,    1}, /* D3/PA1 */
+    {GPIOB,   NULL, NULL,  5, 0, ADCx}, /* D4/PB5 */
+    {GPIOB, TIMER4, NULL,  6, 1, ADCx}, /* D5/PB6 */
+    {GPIOA, TIMER1, NULL,  8, 1, ADCx}, /* D6/PA8 */
+    {GPIOA, TIMER1, NULL,  9, 2, ADCx}, /* D7/PA9 */
+    {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* D8/PA10 */
+    {GPIOB, TIMER4, NULL,  7, 2, ADCx}, /* D9/PB7 */
+    {GPIOA,   NULL, ADC1,  4, 0,    4}, /* D10/PA4 */
+    {GPIOA, TIMER3, ADC1,  7, 2,    7}, /* D11/PA7 */
+    {GPIOA, TIMER3, ADC1,  6, 1,    6}, /* D12/PA6 */
+    {GPIOA,   NULL, ADC1,  5, 0,    5}, /* D13/PA5 (LED) */
+    {GPIOB, TIMER4, NULL,  8, 3, ADCx}, /* D14/PB8 */
 
     /* Little header */
 
-    {GPIOC,   NULL,  0, 0,   10}, /* D15/PC0 */
-    {GPIOC,   NULL,  1, 0,   11}, /* D16/PC1 */
-    {GPIOC,   NULL,  2, 0,   12}, /* D17/PC2 */
-    {GPIOC,   NULL,  3, 0,   13}, /* D18/PC3 */
-    {GPIOC,   NULL,  4, 0,   14}, /* D19/PC4 */
-    {GPIOC,   NULL,  5, 0,   15}, /* D20/PC5 */
+    {GPIOC,   NULL, ADC1,  0, 0,   10}, /* D15/PC0 */
+    {GPIOC,   NULL, ADC1,  1, 0,   11}, /* D16/PC1 */
+    {GPIOC,   NULL, ADC1,  2, 0,   12}, /* D17/PC2 */
+    {GPIOC,   NULL, ADC1,  3, 0,   13}, /* D18/PC3 */
+    {GPIOC,   NULL, ADC1,  4, 0,   14}, /* D19/PC4 */
+    {GPIOC,   NULL, ADC1,  5, 0,   15}, /* D20/PC5 */
 
     /* External header */
 
-    {GPIOC,   NULL, 13, 0, ADCx}, /* D21/PC13 */
-    {GPIOC,   NULL, 14, 0, ADCx}, /* D22/PC14 */
-    {GPIOC,   NULL, 15, 0, ADCx}, /* D23/PC15 */
-    {GPIOB, TIMER4,  9, 4, ADCx}, /* D24/PB9 */
-    {GPIOD,   NULL,  2, 0, ADCx}, /* D25/PD2 */
-    {GPIOC,   NULL, 10, 0, ADCx}, /* D26/PC10 */
-    {GPIOB, TIMER3,  0, 3,    8}, /* D27/PB0 */
-    {GPIOB, TIMER3,  1, 4,    9}, /* D28/PB1 */
-    {GPIOB,   NULL, 10, 0, ADCx}, /* D29/PB10 */
-    {GPIOB,   NULL, 11, 0, ADCx}, /* D30/PB11 */
-    {GPIOB,   NULL, 12, 0, ADCx}, /* D31/PB12 */
-    {GPIOB,   NULL, 13, 0, ADCx}, /* D32/PB13 */
-    {GPIOB,   NULL, 14, 0, ADCx}, /* D33/PB14 */
-    {GPIOB,   NULL, 15, 0, ADCx}, /* D34/PB15 */
-    {GPIOC, TIMER8,  6, 1, ADCx}, /* D35/PC6 */
-    {GPIOC, TIMER8,  7, 2, ADCx}, /* D36/PC7 */
-    {GPIOC, TIMER8,  8, 3, ADCx}, /* D37/PC8 */
-    {GPIOC, TIMER8,  9, 4, ADCx}  /* D38/PC9 (BUT) */
+    {GPIOC,   NULL, NULL, 13, 0, ADCx}, /* D21/PC13 */
+    {GPIOC,   NULL, NULL, 14, 0, ADCx}, /* D22/PC14 */
+    {GPIOC,   NULL, NULL, 15, 0, ADCx}, /* D23/PC15 */
+    {GPIOB, TIMER4, NULL,  9, 4, ADCx}, /* D24/PB9 */
+    {GPIOD,   NULL, NULL,  2, 0, ADCx}, /* D25/PD2 */
+    {GPIOC,   NULL, NULL, 10, 0, ADCx}, /* D26/PC10 */
+    {GPIOB, TIMER3, ADC1,  0, 3,    8}, /* D27/PB0 */
+    {GPIOB, TIMER3, ADC1,  1, 4,    9}, /* D28/PB1 */
+    {GPIOB,   NULL, NULL, 10, 0, ADCx}, /* D29/PB10 */
+    {GPIOB,   NULL, NULL, 11, 0, ADCx}, /* D30/PB11 */
+    {GPIOB,   NULL, NULL, 12, 0, ADCx}, /* D31/PB12 */
+    {GPIOB,   NULL, NULL, 13, 0, ADCx}, /* D32/PB13 */
+    {GPIOB,   NULL, NULL, 14, 0, ADCx}, /* D33/PB14 */
+    {GPIOB,   NULL, NULL, 15, 0, ADCx}, /* D34/PB15 */
+    {GPIOC, TIMER8, NULL,  6, 1, ADCx}, /* D35/PC6 */
+    {GPIOC, TIMER8, NULL,  7, 2, ADCx}, /* D36/PC7 */
+    {GPIOC, TIMER8, NULL,  8, 3, ADCx}, /* D37/PC8 */
+    {GPIOC, TIMER8, NULL,  9, 4, ADCx}  /* D38/PC9 (BUT) */
 };
 
 #endif
diff --git a/wirish/boards/maple_mini.cpp b/wirish/boards/maple_mini.cpp
index 8c005cf..66a0997 100644
--- a/wirish/boards/maple_mini.cpp
+++ b/wirish/boards/maple_mini.cpp
@@ -45,43 +45,43 @@ stm32_pin_info PIN_MAP[NR_GPIO_PINS] = {
 
     /* Top header */
 
-    {GPIOB,   NULL, 11, 0, ADCx}, /* D0/PB11 */
-    {GPIOB,   NULL, 10, 0, ADCx}, /* D1/PB10 */
-    {GPIOB,   NULL,  2, 0, ADCx}, /* D2/PB2 */
-    {GPIOB, TIMER3,  0, 3,    8}, /* D3/PB0 */
-    {GPIOA, TIMER3,  7, 2,    7}, /* D4/PA7 */
-    {GPIOA, TIMER3,  6, 1,    6}, /* D5/PA6 */
-    {GPIOA,   NULL,  5, 0,    5}, /* D6/PA5 */
-    {GPIOA,   NULL,  4, 0,    4}, /* D7/PA4 */
-    {GPIOA, TIMER2,  3, 4,    3}, /* D8/PA3 */
-    {GPIOA, TIMER2,  2, 3,    2}, /* D9/PA2 */
-    {GPIOA, TIMER2,  1, 2,    1}, /* D10/PA1 */
-    {GPIOA, TIMER2,  0, 1,    0}, /* D11/PA0 */
-    {GPIOC,   NULL, 15, 0, ADCx}, /* D12/PC15 */
-    {GPIOC,   NULL, 14, 0, ADCx}, /* D13/PC14 */
-    {GPIOC,   NULL, 13, 0, ADCx}, /* D14/PC13 */
+    {GPIOB,   NULL, NULL, 11, 0, ADCx}, /* D0/PB11 */
+    {GPIOB,   NULL, NULL, 10, 0, ADCx}, /* D1/PB10 */
+    {GPIOB,   NULL, NULL,  2, 0, ADCx}, /* D2/PB2 */
+    {GPIOB, TIMER3, ADC1,  0, 3,    8}, /* D3/PB0 */
+    {GPIOA, TIMER3, ADC1,  7, 2,    7}, /* D4/PA7 */
+    {GPIOA, TIMER3, ADC1,  6, 1,    6}, /* D5/PA6 */
+    {GPIOA,   NULL, ADC1,  5, 0,    5}, /* D6/PA5 */
+    {GPIOA,   NULL, ADC1,  4, 0,    4}, /* D7/PA4 */
+    {GPIOA, TIMER2, ADC1,  3, 4,    3}, /* D8/PA3 */
+    {GPIOA, TIMER2, ADC1,  2, 3,    2}, /* D9/PA2 */
+    {GPIOA, TIMER2, ADC1,  1, 2,    1}, /* D10/PA1 */
+    {GPIOA, TIMER2, ADC1,  0, 1,    0}, /* D11/PA0 */
+    {GPIOC,   NULL, NULL, 15, 0, ADCx}, /* D12/PC15 */
+    {GPIOC,   NULL, NULL, 14, 0, ADCx}, /* D13/PC14 */
+    {GPIOC,   NULL, NULL, 13, 0, ADCx}, /* D14/PC13 */
 
     /* Bottom header */
 
-    {GPIOB, TIMER4,  7, 2, ADCx}, /* D15/PB7 */
-    {GPIOB, TIMER4,  6, 1, ADCx}, /* D16/PB6 */
-    {GPIOB,   NULL,  5, 0, ADCx}, /* D17/PB5 */
-    {GPIOB,   NULL,  4, 0, ADCx}, /* D18/PB4 */
-    {GPIOB,   NULL,  3, 0, ADCx}, /* D19/PB3 */
-    {GPIOA,   NULL, 15, 0, ADCx}, /* D20/PA15 */
-    {GPIOA,   NULL, 14, 0, ADCx}, /* D21/PA14 */
-    {GPIOA,   NULL, 13, 0, ADCx}, /* D22/PA13 */
-    {GPIOA,   NULL, 12, 0, ADCx}, /* D23/PA12 */
-    {GPIOA, TIMER1, 11, 4, ADCx}, /* D24/PA11 */
-    {GPIOA, TIMER1, 10, 3, ADCx}, /* D25/PA10 */
-    {GPIOA, TIMER2,  9, 2, ADCx}, /* D26/PA9 */
-    {GPIOA, TIMER1,  8, 1, ADCx}, /* D27/PA8 */
-    {GPIOB,   NULL, 15, 0, ADCx}, /* D28/PB15 */
-    {GPIOB,   NULL, 14, 0, ADCx}, /* D29/PB14 */
-    {GPIOB,   NULL, 13, 0, ADCx}, /* D30/PB13 */
-    {GPIOB,   NULL, 12, 0, ADCx}, /* D31/PB12 */
-    {GPIOB, TIMER4,  8, 3, ADCx}, /* D32/PB8 */
-    {GPIOB, TIMER3,  1, 4,    9}, /* D33/PB1 */
+    {GPIOB, TIMER4, NULL,  7, 2, ADCx}, /* D15/PB7 */
+    {GPIOB, TIMER4, NULL,  6, 1, ADCx}, /* D16/PB6 */
+    {GPIOB,   NULL, NULL,  5, 0, ADCx}, /* D17/PB5 */
+    {GPIOB,   NULL, NULL,  4, 0, ADCx}, /* D18/PB4 */
+    {GPIOB,   NULL, NULL,  3, 0, ADCx}, /* D19/PB3 */
+    {GPIOA,   NULL, NULL, 15, 0, ADCx}, /* D20/PA15 */
+    {GPIOA,   NULL, NULL, 14, 0, ADCx}, /* D21/PA14 */
+    {GPIOA,   NULL, NULL, 13, 0, ADCx}, /* D22/PA13 */
+    {GPIOA,   NULL, NULL, 12, 0, ADCx}, /* D23/PA12 */
+    {GPIOA, TIMER1, NULL, 11, 4, ADCx}, /* D24/PA11 */
+    {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* D25/PA10 */
+    {GPIOA, TIMER2, NULL,  9, 2, ADCx}, /* D26/PA9 */
+    {GPIOA, TIMER1, NULL,  8, 1, ADCx}, /* D27/PA8 */
+    {GPIOB,   NULL, NULL, 15, 0, ADCx}, /* D28/PB15 */
+    {GPIOB,   NULL, NULL, 14, 0, ADCx}, /* D29/PB14 */
+    {GPIOB,   NULL, NULL, 13, 0, ADCx}, /* D30/PB13 */
+    {GPIOB,   NULL, NULL, 12, 0, ADCx}, /* D31/PB12 */
+    {GPIOB, TIMER4, NULL,  8, 3, ADCx}, /* D32/PB8 */
+    {GPIOB, TIMER3, ADC1,  1, 4,    9}, /* D33/PB1 */
 };
 
 #endif
diff --git a/wirish/boards/maple_native.cpp b/wirish/boards/maple_native.cpp
index c04e98f..75c6a2d 100644
--- a/wirish/boards/maple_native.cpp
+++ b/wirish/boards/maple_native.cpp
@@ -43,113 +43,113 @@ stm32_pin_info PIN_MAP[NR_GPIO_PINS] = {
 
     /* Top header */
 
-    {GPIOB,   NULL, 10, 0, ADCx}, /* D0/PB10 */
-    {GPIOB,   NULL,  2, 0, ADCx}, /* D1/PB2 */
-    {GPIOB,   NULL, 12, 0, ADCx}, /* D2/PB12 */
-    {GPIOB,   NULL, 13, 0, ADCx}, /* D3/PB13 */
-    {GPIOB,   NULL, 14, 0, ADCx}, /* D4/PB14 */
-    {GPIOB,   NULL, 15, 0, ADCx}, /* D5/PB15 */
-    {GPIOC,   NULL,  0, 0,   10}, /* D6/PC0 */
-    {GPIOC,   NULL,  1, 0,   11}, /* D7/PC1 */
-    {GPIOC,   NULL,  2, 0,   12}, /* D8/PC2 */
-    {GPIOC,   NULL,  3, 0,   13}, /* D9/PC3 */
-    {GPIOC,   NULL,  4, 0,   14}, /* D10/PC4 */
-    {GPIOC,   NULL,  5, 0,   15}, /* D11/PC5 */
-    {GPIOC, TIMER8,  6, 1, ADCx}, /* D12/PC6 */
-    {GPIOC, TIMER8,  7, 2, ADCx}, /* D13/PC7 */
-    {GPIOC, TIMER8,  8, 3, ADCx}, /* D14/PC8 */
-    {GPIOC, TIMER8,  9, 4, ADCx}, /* D15/PC9 */
-    {GPIOC,   NULL, 10, 0, ADCx}, /* D16/PC10 */
-    {GPIOC,   NULL, 11, 0, ADCx}, /* D17/PC11 */
-    {GPIOC,   NULL, 12, 0, ADCx}, /* D18/PC12 */
-    {GPIOC,   NULL, 13, 0, ADCx}, /* D19/PC13 */
-    {GPIOC,   NULL, 14, 0, ADCx}, /* D20/PC14 */
-    {GPIOC,   NULL, 15, 0, ADCx}, /* D21/PC15 */
-    {GPIOA, TIMER1,  8, 1, ADCx}, /* D22/PA8 */
-    {GPIOA, TIMER1,  9, 2, ADCx}, /* D23/PA9 */
-    {GPIOA, TIMER1, 10, 3, ADCx}, /* D24/PA10 */
-    {GPIOB, TIMER4,  9, 4, ADCx}, /* D25/PB9 */
+    {GPIOB,   NULL, NULL, 10, 0, ADCx}, /* D0/PB10 */
+    {GPIOB,   NULL, NULL,  2, 0, ADCx}, /* D1/PB2 */
+    {GPIOB,   NULL, NULL, 12, 0, ADCx}, /* D2/PB12 */
+    {GPIOB,   NULL, NULL, 13, 0, ADCx}, /* D3/PB13 */
+    {GPIOB,   NULL, NULL, 14, 0, ADCx}, /* D4/PB14 */
+    {GPIOB,   NULL, NULL, 15, 0, ADCx}, /* D5/PB15 */
+    {GPIOC,   NULL, ADC1,  0, 0,   10}, /* D6/PC0 */
+    {GPIOC,   NULL, ADC1,  1, 0,   11}, /* D7/PC1 */
+    {GPIOC,   NULL, ADC1,  2, 0,   12}, /* D8/PC2 */
+    {GPIOC,   NULL, ADC1,  3, 0,   13}, /* D9/PC3 */
+    {GPIOC,   NULL, ADC1,  4, 0,   14}, /* D10/PC4 */
+    {GPIOC,   NULL, ADC1,  5, 0,   15}, /* D11/PC5 */
+    {GPIOC, TIMER8, NULL,  6, 1, ADCx}, /* D12/PC6 */
+    {GPIOC, TIMER8, NULL,  7, 2, ADCx}, /* D13/PC7 */
+    {GPIOC, TIMER8, NULL,  8, 3, ADCx}, /* D14/PC8 */
+    {GPIOC, TIMER8, NULL,  9, 4, ADCx}, /* D15/PC9 */
+    {GPIOC,   NULL, NULL, 10, 0, ADCx}, /* D16/PC10 */
+    {GPIOC,   NULL, NULL, 11, 0, ADCx}, /* D17/PC11 */
+    {GPIOC,   NULL, NULL, 12, 0, ADCx}, /* D18/PC12 */
+    {GPIOC,   NULL, NULL, 13, 0, ADCx}, /* D19/PC13 */
+    {GPIOC,   NULL, NULL, 14, 0, ADCx}, /* D20/PC14 */
+    {GPIOC,   NULL, NULL, 15, 0, ADCx}, /* D21/PC15 */
+    {GPIOA, TIMER1, NULL,  8, 1, ADCx}, /* D22/PA8 */
+    {GPIOA, TIMER1, NULL,  9, 2, ADCx}, /* D23/PA9 */
+    {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* D24/PA10 */
+    {GPIOB, TIMER4, NULL,  9, 4, ADCx}, /* D25/PB9 */
 
     /* Bottom header */
-    /* FIXME (?) What about D48--D50 also being TIMER2_CH[234]? */
+    /* Note: D{48, 49, 50} are also TIMER2_CH{2, 3, 4}, respectively. */
 
-    {GPIOD,   NULL,  2, 0, ADCx}, /* D26/PD2 */
-    {GPIOD,   NULL,  3, 0, ADCx}, /* D27/PD3 */
-    {GPIOD,   NULL,  6, 0, ADCx}, /* D28/PD6 */
-    {GPIOG,   NULL, 11, 0, ADCx}, /* D29/PG11 */
-    {GPIOG,   NULL, 12, 0, ADCx}, /* D30/PG12 */
-    {GPIOG,   NULL, 13, 0, ADCx}, /* D31/PG13 */
-    {GPIOG,   NULL, 14, 0, ADCx}, /* D32/PG14 */
-    {GPIOG,   NULL,  8, 0, ADCx}, /* D33/PG8 */
-    {GPIOG,   NULL,  7, 0, ADCx}, /* D34/PG7 */
-    {GPIOG,   NULL,  6, 0, ADCx}, /* D35/PG6 */
-    {GPIOB,   NULL,  5, 0, ADCx}, /* D36/PB5 */
-    {GPIOB, TIMER4,  6, 1, ADCx}, /* D37/PB6 */
-    {GPIOB, TIMER4,  7, 2, ADCx}, /* D38/PB7 */
-    {GPIOF,   NULL,  6, 0,    4}, /* D39/PF6 */
-    {GPIOF,   NULL,  7, 0,    5}, /* D40/PF7 */
-    {GPIOF,   NULL,  8, 0,    6}, /* D41/PF8 */
-    {GPIOF,   NULL,  9, 0,    7}, /* D42/PF9 */
-    {GPIOF,   NULL, 10, 0,    8}, /* D43/PF10 */
-    {GPIOF,   NULL, 11, 0, ADCx}, /* D44/PF11 */
-    {GPIOB, TIMER3,  1, 4,    9}, /* D45/PB1 */
-    {GPIOB, TIMER3,  0, 3,    8}, /* D46/PB0 */
-    {GPIOA, TIMER5,  0, 1,    0}, /* D47/PA0 */
-    {GPIOA, TIMER5,  1, 2,    1}, /* D48/PA1 */
-    {GPIOA, TIMER5,  2, 3,    2}, /* D49/PA2 */
-    {GPIOA, TIMER5,  3, 4,    3}, /* D50/PA3 */
-    {GPIOA,   NULL,  4, 0,    4}, /* D51/PA4 */
-    {GPIOA,   NULL,  5, 0,    5}, /* D52/PA5 */
-    {GPIOA, TIMER3,  6, 1,    6}, /* D53/PA6 */
-    {GPIOA, TIMER3,  7, 2,    7}, /* D54/PA7 */
+    {GPIOD,   NULL, NULL,  2, 0, ADCx}, /* D26/PD2 */
+    {GPIOD,   NULL, NULL,  3, 0, ADCx}, /* D27/PD3 */
+    {GPIOD,   NULL, NULL,  6, 0, ADCx}, /* D28/PD6 */
+    {GPIOG,   NULL, NULL, 11, 0, ADCx}, /* D29/PG11 */
+    {GPIOG,   NULL, NULL, 12, 0, ADCx}, /* D30/PG12 */
+    {GPIOG,   NULL, NULL, 13, 0, ADCx}, /* D31/PG13 */
+    {GPIOG,   NULL, NULL, 14, 0, ADCx}, /* D32/PG14 */
+    {GPIOG,   NULL, NULL,  8, 0, ADCx}, /* D33/PG8 */
+    {GPIOG,   NULL, NULL,  7, 0, ADCx}, /* D34/PG7 */
+    {GPIOG,   NULL, NULL,  6, 0, ADCx}, /* D35/PG6 */
+    {GPIOB,   NULL, NULL,  5, 0, ADCx}, /* D36/PB5 */
+    {GPIOB, TIMER4, NULL,  6, 1, ADCx}, /* D37/PB6 */
+    {GPIOB, TIMER4, NULL,  7, 2, ADCx}, /* D38/PB7 */
+    {GPIOF,   NULL, ADC3,  6, 0,    4}, /* D39/PF6 */
+    {GPIOF,   NULL, ADC3,  7, 0,    5}, /* D40/PF7 */
+    {GPIOF,   NULL, ADC3,  8, 0,    6}, /* D41/PF8 */
+    {GPIOF,   NULL, ADC3,  9, 0,    7}, /* D42/PF9 */
+    {GPIOF,   NULL, ADC3, 10, 0,    8}, /* D43/PF10 */
+    {GPIOF,   NULL, NULL, 11, 0, ADCx}, /* D44/PF11 */
+    {GPIOB, TIMER3, ADC1,  1, 4,    9}, /* D45/PB1 */
+    {GPIOB, TIMER3, ADC1,  0, 3,    8}, /* D46/PB0 */
+    {GPIOA, TIMER5, ADC1,  0, 1,    0}, /* D47/PA0 */
+    {GPIOA, TIMER5, ADC1,  1, 2,    1}, /* D48/PA1 */
+    {GPIOA, TIMER5, ADC1,  2, 3,    2}, /* D49/PA2 */
+    {GPIOA, TIMER5, ADC1,  3, 4,    3}, /* D50/PA3 */
+    {GPIOA,   NULL, ADC1,  4, 0,    4}, /* D51/PA4 */
+    {GPIOA,   NULL, ADC1,  5, 0,    5}, /* D52/PA5 */
+    {GPIOA, TIMER3, ADC1,  6, 1,    6}, /* D53/PA6 */
+    {GPIOA, TIMER3, ADC1,  7, 2,    7}, /* D54/PA7 */
 
     /* Right (triple) header */
 
-    {GPIOF,   NULL,  0, 0, ADCx}, /* D55/PF0 */
-    {GPIOD,   NULL, 11, 0, ADCx}, /* D56/PD11 */
-    {GPIOD,   NULL, 14, 0, ADCx}, /* D57/PD14 */
-    {GPIOF,   NULL,  1, 0, ADCx}, /* D58/PF1 */
-    {GPIOD,   NULL, 12, 0, ADCx}, /* D59/PD12 */
-    {GPIOD,   NULL, 15, 0, ADCx}, /* D60/PD15 */
-    {GPIOF,   NULL,  2, 0, ADCx}, /* D61/PF2 */
-    {GPIOD,   NULL, 13, 0, ADCx}, /* D62/PD13 */
-    {GPIOD,   NULL,  0, 0, ADCx}, /* D63/PD0 */
-    {GPIOF,   NULL,  3, 0, ADCx}, /* D64/PF3 */
-    {GPIOE,   NULL,  3, 0, ADCx}, /* D65/PE3 */
-    {GPIOD,   NULL,  1, 0, ADCx}, /* D66/PD1 */
-    {GPIOF,   NULL,  4, 0, ADCx}, /* D67/PF4 */
-    {GPIOE,   NULL,  4, 0, ADCx}, /* D68/PE4 */
-    {GPIOE,   NULL,  7, 0, ADCx}, /* D69/PE7 */
-    {GPIOF,   NULL,  5, 0, ADCx}, /* D70/PF5 */
-    {GPIOE,   NULL,  5, 0, ADCx}, /* D71/PE5 */
-    {GPIOE,   NULL,  8, 0, ADCx}, /* D72/PE8 */
-    {GPIOF,   NULL, 12, 0, ADCx}, /* D73/PF12 */
-    {GPIOE,   NULL,  6, 0, ADCx}, /* D74/PE6 */
-    {GPIOE,   NULL,  9, 0, ADCx}, /* D75/PE9 */
-    {GPIOF,   NULL, 13, 0, ADCx}, /* D76/PF13 */
-    {GPIOE,   NULL, 10, 0, ADCx}, /* D77/PE10 */
-    {GPIOF,   NULL, 14, 0, ADCx}, /* D78/PF14 */
-    {GPIOG,   NULL,  9, 0, ADCx}, /* D79/PG9 */
-    {GPIOE,   NULL, 11, 0, ADCx}, /* D80/PE11 */
-    {GPIOF,   NULL, 15, 0, ADCx}, /* D81/PF15 */
-    {GPIOG,   NULL, 10, 0, ADCx}, /* D82/PG10 */
-    {GPIOE,   NULL, 12, 0, ADCx}, /* D83/PE12 */
-    {GPIOG,   NULL,  0, 0, ADCx}, /* D84/PG0 */
-    {GPIOD,   NULL,  5, 0, ADCx}, /* D85/PD5 */
-    {GPIOE,   NULL, 13, 0, ADCx}, /* D86/PE13 */
-    {GPIOG,   NULL,  1, 0, ADCx}, /* D87/PG1 */
-    {GPIOD,   NULL,  4, 0, ADCx}, /* D88/PD4 */
-    {GPIOE,   NULL, 14, 0, ADCx}, /* D89/PE14 */
-    {GPIOG,   NULL,  2, 0, ADCx}, /* D90/PG2 */
-    {GPIOE,   NULL,  1, 0, ADCx}, /* D91/PE1 */
-    {GPIOE,   NULL, 15, 0, ADCx}, /* D92/PE15 */
-    {GPIOG,   NULL,  3, 0, ADCx}, /* D93/PG3 */
-    {GPIOE,   NULL,  0, 0, ADCx}, /* D94/PE0 */
-    {GPIOD,   NULL,  8, 0, ADCx}, /* D95/PD8 */
-    {GPIOG,   NULL,  4, 0, ADCx}, /* D96/PG4 */
-    {GPIOD,   NULL,  9, 0, ADCx}, /* D97/PD9 */
-    {GPIOG,   NULL,  5, 0, ADCx}, /* D98/PG5 */
-    {GPIOD,   NULL, 10, 0, ADCx}  /* D99/PD10 */
+    {GPIOF,   NULL, NULL,  0, 0, ADCx}, /* D55/PF0 */
+    {GPIOD,   NULL, NULL, 11, 0, ADCx}, /* D56/PD11 */
+    {GPIOD,   NULL, NULL, 14, 0, ADCx}, /* D57/PD14 */
+    {GPIOF,   NULL, NULL,  1, 0, ADCx}, /* D58/PF1 */
+    {GPIOD,   NULL, NULL, 12, 0, ADCx}, /* D59/PD12 */
+    {GPIOD,   NULL, NULL, 15, 0, ADCx}, /* D60/PD15 */
+    {GPIOF,   NULL, NULL,  2, 0, ADCx}, /* D61/PF2 */
+    {GPIOD,   NULL, NULL, 13, 0, ADCx}, /* D62/PD13 */
+    {GPIOD,   NULL, NULL,  0, 0, ADCx}, /* D63/PD0 */
+    {GPIOF,   NULL, NULL,  3, 0, ADCx}, /* D64/PF3 */
+    {GPIOE,   NULL, NULL,  3, 0, ADCx}, /* D65/PE3 */
+    {GPIOD,   NULL, NULL,  1, 0, ADCx}, /* D66/PD1 */
+    {GPIOF,   NULL, NULL,  4, 0, ADCx}, /* D67/PF4 */
+    {GPIOE,   NULL, NULL,  4, 0, ADCx}, /* D68/PE4 */
+    {GPIOE,   NULL, NULL,  7, 0, ADCx}, /* D69/PE7 */
+    {GPIOF,   NULL, NULL,  5, 0, ADCx}, /* D70/PF5 */
+    {GPIOE,   NULL, NULL,  5, 0, ADCx}, /* D71/PE5 */
+    {GPIOE,   NULL, NULL,  8, 0, ADCx}, /* D72/PE8 */
+    {GPIOF,   NULL, NULL, 12, 0, ADCx}, /* D73/PF12 */
+    {GPIOE,   NULL, NULL,  6, 0, ADCx}, /* D74/PE6 */
+    {GPIOE,   NULL, NULL,  9, 0, ADCx}, /* D75/PE9 */
+    {GPIOF,   NULL, NULL, 13, 0, ADCx}, /* D76/PF13 */
+    {GPIOE,   NULL, NULL, 10, 0, ADCx}, /* D77/PE10 */
+    {GPIOF,   NULL, NULL, 14, 0, ADCx}, /* D78/PF14 */
+    {GPIOG,   NULL, NULL,  9, 0, ADCx}, /* D79/PG9 */
+    {GPIOE,   NULL, NULL, 11, 0, ADCx}, /* D80/PE11 */
+    {GPIOF,   NULL, NULL, 15, 0, ADCx}, /* D81/PF15 */
+    {GPIOG,   NULL, NULL, 10, 0, ADCx}, /* D82/PG10 */
+    {GPIOE,   NULL, NULL, 12, 0, ADCx}, /* D83/PE12 */
+    {GPIOG,   NULL, NULL,  0, 0, ADCx}, /* D84/PG0 */
+    {GPIOD,   NULL, NULL,  5, 0, ADCx}, /* D85/PD5 */
+    {GPIOE,   NULL, NULL, 13, 0, ADCx}, /* D86/PE13 */
+    {GPIOG,   NULL, NULL,  1, 0, ADCx}, /* D87/PG1 */
+    {GPIOD,   NULL, NULL,  4, 0, ADCx}, /* D88/PD4 */
+    {GPIOE,   NULL, NULL, 14, 0, ADCx}, /* D89/PE14 */
+    {GPIOG,   NULL, NULL,  2, 0, ADCx}, /* D90/PG2 */
+    {GPIOE,   NULL, NULL,  1, 0, ADCx}, /* D91/PE1 */
+    {GPIOE,   NULL, NULL, 15, 0, ADCx}, /* D92/PE15 */
+    {GPIOG,   NULL, NULL,  3, 0, ADCx}, /* D93/PG3 */
+    {GPIOE,   NULL, NULL,  0, 0, ADCx}, /* D94/PE0 */
+    {GPIOD,   NULL, NULL,  8, 0, ADCx}, /* D95/PD8 */
+    {GPIOG,   NULL, NULL,  4, 0, ADCx}, /* D96/PG4 */
+    {GPIOD,   NULL, NULL,  9, 0, ADCx}, /* D97/PD9 */
+    {GPIOG,   NULL, NULL,  5, 0, ADCx}, /* D98/PG5 */
+    {GPIOD,   NULL, NULL, 10, 0, ADCx}  /* D99/PD10 */
 };
 
 #endif