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| author | bnewbold <bnewbold@robocracy.org> | 2015-06-13 22:01:54 -0700 |
|---|---|---|
| committer | bnewbold <bnewbold@robocracy.org> | 2015-06-13 22:02:23 -0700 |
| commit | 94c8e3c9e98412feaef8e5aa8b29b1ec0047e9cf (patch) | |
| tree | bb18859ee5ab7ab7126d58771844032ad9eaf2bd /stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon-stm32-isrs.S | |
| parent | 53f79bcf6974f4e3d133faa67b300d5cca493575 (diff) | |
| download | librambutan-94c8e3c9e98412feaef8e5aa8b29b1ec0047e9cf.tar.gz librambutan-94c8e3c9e98412feaef8e5aa8b29b1ec0047e9cf.zip | |
fix timer capture TI1/TI2 bug
Somewhat confusingly, the TI1/TI2 fields for capture/compare channels 2
and 4 are both flipped compared to channels 1 and 3 and do not
correspond to the binary numbers.
Section 15.4.7 of RM0008 (STM32F1 series) and Section 12.4.7 of RM0368
(STM32F4 series) read:
CC1S: Capture/Compare 1 selection
01: CC1 channel is configured as input, IC1 is mapped on TI1
10: CC1 channel is configured as input, IC1 is mapped on TI2
CC2S: Capture/Compare 2 selection
01: CC2 channel is configured as input, IC2 is mapped on TI2
10: CC2 channel is configured as input, IC2 is mapped on TI1
This commit closes github issue #12 reported by GatorCh.
Diffstat (limited to 'stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon-stm32-isrs.S')
0 files changed, 0 insertions, 0 deletions