aboutsummaryrefslogtreecommitdiffstats
path: root/src/wiring
diff options
context:
space:
mode:
authoriperry <iperry@749a229e-a60e-11de-b98f-4500b42dc123>2010-01-17 02:57:17 +0000
committeriperry <iperry@749a229e-a60e-11de-b98f-4500b42dc123>2010-01-17 02:57:17 +0000
commit2826bbb424f15d61c5ef917dcfd5444e7e607b56 (patch)
tree4903428bc2df15208ece7b4f19ffaa120f04bb1c /src/wiring
parentd468ccac449968009cbbd2eabd8cfa7d7f3a35e5 (diff)
downloadlibrambutan-2826bbb424f15d61c5ef917dcfd5444e7e607b56.tar.gz
librambutan-2826bbb424f15d61c5ef917dcfd5444e7e607b56.zip
Enabled 39 GPIOs for digitalWrite(), fixed timer/usart collisions on PWM/USART pins
git-svn-id: https://leaflabs.googlecode.com/svn/trunk/library@120 749a229e-a60e-11de-b98f-4500b42dc123
Diffstat (limited to 'src/wiring')
-rw-r--r--src/wiring/wiring.h2
-rw-r--r--src/wiring/wiring_digital.c37
2 files changed, 28 insertions, 11 deletions
diff --git a/src/wiring/wiring.h b/src/wiring/wiring.h
index 2a33b75..5333464 100644
--- a/src/wiring/wiring.h
+++ b/src/wiring/wiring.h
@@ -16,7 +16,7 @@ extern "C"{
#define MAPLE 1
-#define NR_MAPLE_PINS 14 // temporary
+#define NR_MAPLE_PINS 39 // temporary
#define HIGH 0x1
#define LOW 0x0
diff --git a/src/wiring/wiring_digital.c b/src/wiring/wiring_digital.c
index 456f5da..71be17b 100644
--- a/src/wiring/wiring_digital.c
+++ b/src/wiring/wiring_digital.c
@@ -58,15 +58,33 @@ static const PinGPIOMapping PIN_TO_GPIO[NR_MAPLE_PINS] = {
{GPIOA_BASE, 7}, // D11/PA7
{GPIOA_BASE, 6}, // D12/PA6
{GPIOA_BASE, 5}, // D13/PA5
-/* for later */
-#if 0
- {GPIOC_BASE, 0}, // D14/A0/PC0
- {GPIOC_BASE, 1}, // D15/A1/PC1
- {GPIOC_BASE, 2}, // D16/A2/PC2
- {GPIOC_BASE, 3}, // D17/A3/PC3
- {GPIOC_BASE, 4}, // D18/A4/PC4
- {GPIOC_BASE, 5}, // D19/A5/PC5
-#endif
+ {GPIOB_BASE, 8}, // D14/PB8
+ /* Little header */
+ {GPIOC_BASE, 0}, // D15/PC0
+ {GPIOC_BASE, 1}, // D16/PC1
+ {GPIOC_BASE, 2}, // D17/PC2
+ {GPIOC_BASE, 3}, // D18/PC3
+ {GPIOC_BASE, 4}, // D19/PC4
+ {GPIOC_BASE, 5}, // D20/PC5
+ /* External header */
+ {GPIOC_BASE, 13}, // D21/PC13
+ {GPIOC_BASE, 14}, // D22/PC14
+ {GPIOC_BASE, 15}, // D23/PC15
+ {GPIOB_BASE, 9}, // D24/PB9
+ {GPIOD_BASE, 2}, // D25/PD2
+ {GPIOC_BASE, 10}, // D26/PC10
+ {GPIOB_BASE, 0}, // D27/PB0
+ {GPIOB_BASE, 1}, // D28/PB1
+ {GPIOB_BASE, 10}, // D29/PB10
+ {GPIOB_BASE, 11}, // D30/PB11
+ {GPIOB_BASE, 12}, // D31/PB12
+ {GPIOB_BASE, 13}, // D32/PB13
+ {GPIOB_BASE, 14}, // D33/PB14
+ {GPIOB_BASE, 15}, // D34/PB15
+ {GPIOC_BASE, 6}, // D35/PC6
+ {GPIOC_BASE, 7}, // D36/PC7
+ {GPIOC_BASE, 8}, // D37/PC8
+ {GPIOC_BASE, 9}, // D38/PC9
};
void pinMode(uint8_t pin, WiringPinMode mode) {
@@ -97,7 +115,6 @@ void pinMode(uint8_t pin, WiringPinMode mode) {
return;
}
-
gpio_set_mode(PIN_TO_GPIO[pin].port, PIN_TO_GPIO[pin].pin, outputMode);
}