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authorPerry Hung <iperry@alum.mit.edu>2010-03-23 00:55:40 -0400
committerPerry Hung <iperry@alum.mit.edu>2010-03-23 01:25:00 -0400
commit3639ad2cf027da7425ebe76382842c006acec05a (patch)
tree65682fc68e0625c4ff41f7cdc169482ec6d77672 /src/wiring/wiring_digital.c
parent48be688f451e81d2a81c76a85dadf18093e672ab (diff)
downloadlibrambutan-3639ad2cf027da7425ebe76382842c006acec05a.tar.gz
librambutan-3639ad2cf027da7425ebe76382842c006acec05a.zip
Unified analog, digital, and timer pin mappings to implement the mapping
we discussed. There's no such thing as A0-A15 anymore. You should now be able to do something like: unsigned int val; pinMode(15, INPUT_ANALOG); val = analogRead(15);
Diffstat (limited to 'src/wiring/wiring_digital.c')
-rw-r--r--src/wiring/wiring_digital.c121
1 files changed, 61 insertions, 60 deletions
diff --git a/src/wiring/wiring_digital.c b/src/wiring/wiring_digital.c
index b1be9a5..71dae57 100644
--- a/src/wiring/wiring_digital.c
+++ b/src/wiring/wiring_digital.c
@@ -25,66 +25,67 @@
#include "wiring.h"
#include "io.h"
-#include "gpio.h"
-typedef enum AFMode{
- AF_NONE,
- AF_PWM,
- AF_SERIAL,
- AF_I2C, // unused for now
- AF_SPI, // unusued for now
-} AFMode;
-
-
-typedef struct PinGPIOMapping {
- GPIO_Port *port;
- uint32 pin;
-} PinGPIOMapping;
-
-
-/* Reset state is input floating */
-static const PinGPIOMapping PIN_TO_GPIO[NR_MAPLE_PINS] = {
- {GPIOA_BASE, 3}, // D0/PA3
- {GPIOA_BASE, 2}, // D1/PA2
- {GPIOA_BASE, 0}, // D2/PA0
- {GPIOA_BASE, 1}, // D3/PA1
- {GPIOB_BASE, 5}, // D4/PB5
- {GPIOB_BASE, 6}, // D5/PB6
- {GPIOA_BASE, 8}, // D6/PA8
- {GPIOA_BASE, 9}, // D7/PA9
- {GPIOA_BASE, 10}, // D8/PA10
- {GPIOB_BASE, 7}, // D9/PB7
- {GPIOA_BASE, 4}, // D10/PA4
- {GPIOA_BASE, 7}, // D11/PA7
- {GPIOA_BASE, 6}, // D12/PA6
- {GPIOA_BASE, 5}, // D13/PA5
- {GPIOB_BASE, 8}, // D14/PB8
+#define ADC0 0
+#define ADC1 1
+#define ADC2 2
+#define ADC3 3
+#define ADC4 4
+#define ADC5 5
+#define ADC6 6
+#define ADC7 7
+#define ADC8 8
+#define ADC9 9
+#define ADC10 10
+#define ADC11 11
+#define ADC12 12
+#define ADC13 13
+#define ADC14 14
+#define ADC15 15
+#define ADC16 16
+
+const PinMapping PIN_MAP[NR_MAPLE_PINS] = {
+ {GPIOA_BASE, 3, ADC3, TIMER2_CH4_CCR}, // D0/PA3
+ {GPIOA_BASE, 2, ADC2, TIMER2_CH3_CCR}, // D1/PA2
+ {GPIOA_BASE, 0, ADC0, TIMER2_CH1_CCR}, // D2/PA0
+ {GPIOA_BASE, 1, ADC1, TIMER2_CH2_CCR}, // D3/PA1
+ {GPIOB_BASE, 5, ADC_INVALID, TIMER_INVALID}, // D4/PB5
+ {GPIOB_BASE, 6, ADC_INVALID, TIMER4_CH1_CCR}, // D5/PB6
+ {GPIOA_BASE, 8, ADC_INVALID, TIMER1_CH1_CCR}, // D6/PA8
+ {GPIOA_BASE, 9, ADC_INVALID, TIMER1_CH2_CCR}, // D7/PA9
+ {GPIOA_BASE, 10, ADC_INVALID, TIMER1_CH3_CCR}, // D8/PA10
+ {GPIOB_BASE, 7, ADC_INVALID, TIMER4_CH2_CCR}, // D9/PB7
+ {GPIOA_BASE, 4, ADC4, TIMER_INVALID}, // D10/PA4
+ {GPIOA_BASE, 7, ADC7, TIMER3_CH2_CCR}, // D11/PA7
+ {GPIOA_BASE, 6, ADC6, TIMER3_CH1_CCR}, // D12/PA6
+ {GPIOA_BASE, 5, ADC5, TIMER_INVALID}, // D13/PA5
+ {GPIOB_BASE, 8, ADC_INVALID, TIMER4_CH3_CCR}, // D14/PB8
/* Little header */
- {GPIOC_BASE, 0}, // D15/PC0
- {GPIOC_BASE, 1}, // D16/PC1
- {GPIOC_BASE, 2}, // D17/PC2
- {GPIOC_BASE, 3}, // D18/PC3
- {GPIOC_BASE, 4}, // D19/PC4
- {GPIOC_BASE, 5}, // D20/PC5
+ {GPIOC_BASE, 0, ADC10, TIMER_INVALID}, // D15/PC0
+ {GPIOC_BASE, 1, ADC11, TIMER_INVALID}, // D16/PC1
+ {GPIOC_BASE, 2, ADC12, TIMER_INVALID}, // D17/PC2
+ {GPIOC_BASE, 3, ADC13, TIMER_INVALID}, // D18/PC3
+ {GPIOC_BASE, 4, ADC14, TIMER_INVALID}, // D19/PC4
+ {GPIOC_BASE, 5, ADC15, TIMER_INVALID}, // D20/PC5
/* External header */
- {GPIOC_BASE, 13}, // D21/PC13
- {GPIOC_BASE, 14}, // D22/PC14
- {GPIOC_BASE, 15}, // D23/PC15
- {GPIOB_BASE, 9}, // D24/PB9
- {GPIOD_BASE, 2}, // D25/PD2
- {GPIOC_BASE, 10}, // D26/PC10
- {GPIOB_BASE, 0}, // D27/PB0
- {GPIOB_BASE, 1}, // D28/PB1
- {GPIOB_BASE, 10}, // D29/PB10
- {GPIOB_BASE, 11}, // D30/PB11
- {GPIOB_BASE, 12}, // D31/PB12
- {GPIOB_BASE, 13}, // D32/PB13
- {GPIOB_BASE, 14}, // D33/PB14
- {GPIOB_BASE, 15}, // D34/PB15
- {GPIOC_BASE, 6}, // D35/PC6
- {GPIOC_BASE, 7}, // D36/PC7
- {GPIOC_BASE, 8}, // D37/PC8
- {GPIOC_BASE, 9}, // D38/PC9
+ {GPIOC_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D21/PC13
+ {GPIOC_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D22/PC14
+ {GPIOC_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D23/PC15
+ {GPIOB_BASE, 9, ADC_INVALID, TIMER4_CH4_CCR}, // D24/PB9
+ {GPIOD_BASE, 2, ADC_INVALID, TIMER_INVALID}, // D25/PD2
+ {GPIOC_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D26/PC10
+ {GPIOB_BASE, 0, ADC8, TIMER3_CH3_CCR}, // D27/PB0
+ {GPIOB_BASE, 1, ADC9, TIMER3_CH4_CCR}, // D28/PB1
+ {GPIOB_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D29/PB10
+ {GPIOB_BASE, 11, ADC_INVALID, TIMER_INVALID}, // D30/PB11
+ {GPIOB_BASE, 12, ADC_INVALID, TIMER_INVALID}, // D31/PB12
+ {GPIOB_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D32/PB13
+ {GPIOB_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D33/PB14
+ {GPIOB_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D34/PB15
+ {GPIOC_BASE, 6, ADC_INVALID, TIMER_INVALID}, // D35/PC6
+ {GPIOC_BASE, 7, ADC_INVALID, TIMER_INVALID}, // D36/PC7
+ {GPIOC_BASE, 8, ADC_INVALID, TIMER_INVALID}, // D37/PC8
+ {GPIOC_BASE, 9, ADC_INVALID, TIMER_INVALID} // D38/PC9
};
void pinMode(uint8_t pin, WiringPinMode mode) {
@@ -120,7 +121,7 @@ void pinMode(uint8_t pin, WiringPinMode mode) {
return;
}
- gpio_set_mode(PIN_TO_GPIO[pin].port, PIN_TO_GPIO[pin].pin, outputMode);
+ gpio_set_mode(PIN_MAP[pin].port, PIN_MAP[pin].pin, outputMode);
}
@@ -128,12 +129,12 @@ uint32_t digitalRead(uint8_t pin) {
if (pin >= NR_MAPLE_PINS)
return 0;
- return (PIN_TO_GPIO[pin].port->IDR & BIT(PIN_TO_GPIO[pin].pin)) ? 1 : 0;
+ return (PIN_MAP[pin].port->IDR & BIT(PIN_MAP[pin].pin)) ? 1 : 0;
}
void digitalWrite(uint8_t pin, uint8_t val) {
if (pin >= NR_MAPLE_PINS)
return;
- gpio_write_bit(PIN_TO_GPIO[pin].port, PIN_TO_GPIO[pin].pin, val);
+ gpio_write_bit(PIN_MAP[pin].port, PIN_MAP[pin].pin, val);
}