aboutsummaryrefslogtreecommitdiffstats
path: root/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5
diff options
context:
space:
mode:
authoriperry <iperry@749a229e-a60e-11de-b98f-4500b42dc123>2009-12-17 02:37:07 +0000
committeriperry <iperry@749a229e-a60e-11de-b98f-4500b42dc123>2009-12-17 02:37:07 +0000
commit32e57dac2e61e79b029593eb4d34d727bcc10678 (patch)
tree98d7ff41993576bb150d13d5f63dc744f6812852 /src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5
downloadlibrambutan-32e57dac2e61e79b029593eb4d34d727bcc10678.tar.gz
librambutan-32e57dac2e61e79b029593eb4d34d727bcc10678.zip
Initial commit of library code, moved from leaftest repo
git-svn-id: https://leaflabs.googlecode.com/svn/trunk/library@69 749a229e-a60e-11de-b98f-4500b42dc123
Diffstat (limited to 'src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5')
-rwxr-xr-xsrc/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5/stm32f10x_flash_offset.icf31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5/stm32f10x_flash_offset.icf b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5/stm32f10x_flash_offset.icf
new file mode 100755
index 0000000..ac30a01
--- /dev/null
+++ b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5/stm32f10x_flash_offset.icf
@@ -0,0 +1,31 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08002000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08002000 ;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };