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authoriperry <iperry@749a229e-a60e-11de-b98f-4500b42dc123>2009-12-17 02:37:07 +0000
committeriperry <iperry@749a229e-a60e-11de-b98f-4500b42dc123>2009-12-17 02:37:07 +0000
commit32e57dac2e61e79b029593eb4d34d727bcc10678 (patch)
tree98d7ff41993576bb150d13d5f63dc744f6812852 /src/stm32lib/examples/FSMC/SRAM
downloadlibrambutan-32e57dac2e61e79b029593eb4d34d727bcc10678.tar.gz
librambutan-32e57dac2e61e79b029593eb4d34d727bcc10678.zip
Initial commit of library code, moved from leaftest repo
git-svn-id: https://leaflabs.googlecode.com/svn/trunk/library@69 749a229e-a60e-11de-b98f-4500b42dc123
Diffstat (limited to 'src/stm32lib/examples/FSMC/SRAM')
-rwxr-xr-xsrc/stm32lib/examples/FSMC/SRAM/fsmc_sram.c161
-rwxr-xr-xsrc/stm32lib/examples/FSMC/SRAM/fsmc_sram.h33
-rwxr-xr-xsrc/stm32lib/examples/FSMC/SRAM/main.c223
-rwxr-xr-xsrc/stm32lib/examples/FSMC/SRAM/readme.txt54
-rwxr-xr-xsrc/stm32lib/examples/FSMC/SRAM/stm32f10x_conf.h170
-rwxr-xr-xsrc/stm32lib/examples/FSMC/SRAM/stm32f10x_it.c810
-rwxr-xr-xsrc/stm32lib/examples/FSMC/SRAM/stm32f10x_it.h100
7 files changed, 1551 insertions, 0 deletions
diff --git a/src/stm32lib/examples/FSMC/SRAM/fsmc_sram.c b/src/stm32lib/examples/FSMC/SRAM/fsmc_sram.c
new file mode 100755
index 0000000..ea7d248
--- /dev/null
+++ b/src/stm32lib/examples/FSMC/SRAM/fsmc_sram.c
@@ -0,0 +1,161 @@
+/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
+* File Name : fsmc_sram.c
+* Author : MCD Application Team
+* Version : V2.0.1
+* Date : 06/13/2008
+* Description : This file provides a set of functions needed to drive the
+* IS61WV51216BLL SRAM memory mounted on STM3210E-EVAL board.
+********************************************************************************
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "fsmc_sram.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define Bank1_SRAM3_ADDR ((u32)0x68000000)
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : FSMC_SRAM_Init
+* Description : Configures the FSMC and GPIOs to interface with the SRAM memory.
+* This function must be called before any write/read operation
+* on the SRAM.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void FSMC_SRAM_Init(void)
+{
+ FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
+ FSMC_NORSRAMTimingInitTypeDef p;
+ GPIO_InitTypeDef GPIO_InitStructure;
+
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
+ RCC_APB2Periph_GPIOF, ENABLE);
+
+/*-- GPIO Configuration ------------------------------------------------------*/
+ /* SRAM Data lines configuration */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
+ GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(GPIOD, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
+ GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
+ GPIO_Pin_15;
+ GPIO_Init(GPIOE, &GPIO_InitStructure);
+
+ /* SRAM Address lines configuration */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
+ GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
+ GPIO_Pin_14 | GPIO_Pin_15;
+ GPIO_Init(GPIOF, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
+ GPIO_Pin_4 | GPIO_Pin_5;
+ GPIO_Init(GPIOG, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
+ GPIO_Init(GPIOD, &GPIO_InitStructure);
+
+ /* NOE and NWE configuration */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;
+ GPIO_Init(GPIOD, &GPIO_InitStructure);
+
+ /* NE3 configuration */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+ GPIO_Init(GPIOG, &GPIO_InitStructure);
+
+ /* NBL0, NBL1 configuration */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
+ GPIO_Init(GPIOE, &GPIO_InitStructure);
+
+/*-- FSMC Configuration ------------------------------------------------------*/
+ p.FSMC_AddressSetupTime = 0;
+ p.FSMC_AddressHoldTime = 0;
+ p.FSMC_DataSetupTime = 2;
+ p.FSMC_BusTurnAroundDuration = 0;
+ p.FSMC_CLKDivision = 0;
+ p.FSMC_DataLatency = 0;
+ p.FSMC_AccessMode = FSMC_AccessMode_A;
+
+ FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
+ FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
+ FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+ FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+ FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+ FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+ FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_AsyncWait = FSMC_AsyncWait_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+ FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+
+ FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
+
+ /* Enable FSMC Bank1_SRAM Bank */
+ FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
+}
+
+/*******************************************************************************
+* Function Name : FSMC_SRAM_WriteBuffer
+* Description : Writes a Half-word buffer to the FSMC SRAM memory.
+* Input : - pBuffer : pointer to buffer.
+* - WriteAddr : SRAM memory internal address from which the data
+* will be written.
+* - NumHalfwordToWrite : number of half-words to write.
+*
+* Output : None
+* Return : None
+*******************************************************************************/
+void FSMC_SRAM_WriteBuffer(u16* pBuffer, u32 WriteAddr, u32 NumHalfwordToWrite)
+{
+ for(; NumHalfwordToWrite != 0; NumHalfwordToWrite--) /* while there is data to write */
+ {
+ /* Transfer data to the memory */
+ *(u16 *) (Bank1_SRAM3_ADDR + WriteAddr) = *pBuffer++;
+
+ /* Increment the address*/
+ WriteAddr += 2;
+ }
+}
+
+/*******************************************************************************
+* Function Name : FSMC_SRAM_ReadBuffer
+* Description : Reads a block of data from the FSMC SRAM memory.
+* Input : - pBuffer : pointer to the buffer that receives the data read
+* from the SRAM memory.
+* - ReadAddr : SRAM memory internal address to read from.
+* - NumHalfwordToRead : number of half-words to read.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FSMC_SRAM_ReadBuffer(u16* pBuffer, u32 ReadAddr, u32 NumHalfwordToRead)
+{
+ for(; NumHalfwordToRead != 0; NumHalfwordToRead--) /* while there is data to read */
+ {
+ /* Read a half-word from the memory */
+ *pBuffer++ = *(vu16*) (Bank1_SRAM3_ADDR + ReadAddr);
+
+ /* Increment the address*/
+ ReadAddr += 2;
+ }
+}
+
+/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
diff --git a/src/stm32lib/examples/FSMC/SRAM/fsmc_sram.h b/src/stm32lib/examples/FSMC/SRAM/fsmc_sram.h
new file mode 100755
index 0000000..f599266
--- /dev/null
+++ b/src/stm32lib/examples/FSMC/SRAM/fsmc_sram.h
@@ -0,0 +1,33 @@
+/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
+* File Name : fsmc_sram.h
+* Author : MCD Application Team
+* Version : V2.0.1
+* Date : 06/13/2008
+* Description : Header for fsmc_sram.c file.
+********************************************************************************
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __FSMC_SRAM_H
+#define __FSMC_SRAM_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f10x_lib.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void FSMC_SRAM_Init(void);
+void FSMC_SRAM_WriteBuffer(u16* pBuffer, u32 WriteAddr, u32 NumHalfwordToWrite);
+void FSMC_SRAM_ReadBuffer(u16* pBuffer, u32 ReadAddr, u32 NumHalfwordToRead);
+
+#endif /* __FSMC_SRAM_H */
+
+/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
diff --git a/src/stm32lib/examples/FSMC/SRAM/main.c b/src/stm32lib/examples/FSMC/SRAM/main.c
new file mode 100755
index 0000000..f7c2f0d
--- /dev/null
+++ b/src/stm32lib/examples/FSMC/SRAM/main.c
@@ -0,0 +1,223 @@
+/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
+* File Name : main.c
+* Author : MCD Application Team
+* Version : V2.0.1
+* Date : 06/13/2008
+* Description : Main program body
+********************************************************************************
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+/* Includes ------------------------------------------------------------------*/
+#include "fsmc_sram.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define BUFFER_SIZE 0x400
+#define WRITE_READ_ADDR 0x8000
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+GPIO_InitTypeDef GPIO_InitStructure;
+ErrorStatus HSEStartUpStatus;
+
+u16 TxBuffer[BUFFER_SIZE];
+u16 RxBuffer[BUFFER_SIZE];
+u32 WriteReadStatus = 0, Index = 0;
+
+/* Private function prototypes -----------------------------------------------*/
+void RCC_Configuration(void);
+void NVIC_Configuration(void);
+void Fill_Buffer(u16 *pBuffer, u16 BufferLenght, u32 Offset);
+
+/* Private functions ---------------------------------------------------------*/
+/*******************************************************************************
+* Function Name : main
+* Description : Main program.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+int main(void)
+{
+#ifdef DEBUG
+ debug();
+#endif
+
+ /* System Clocks Configuration */
+ RCC_Configuration();
+
+ /* NVIC Configuration */
+ NVIC_Configuration();
+
+ /* PF.06 and PF.07 config to drive LD1 and LD2 ******************************/
+ /* Enable GPIOF clock */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOF, ENABLE);
+
+ /* Configure PF.06 and PF.07 as Output push-pull */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(GPIOF, &GPIO_InitStructure);
+
+ /* Write/read to/from FSMC SRAM memory *************************************/
+ /* Enable the FSMC Clock */
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
+
+ /* Configure FSMC Bank1 NOR/SRAM3 */
+ FSMC_SRAM_Init();
+
+ /* Write data to FSMC SRAM memory */
+ /* Fill the buffer to send */
+ Fill_Buffer(TxBuffer, BUFFER_SIZE, 0x3212);
+ FSMC_SRAM_WriteBuffer(TxBuffer, WRITE_READ_ADDR, BUFFER_SIZE);
+
+
+ /* Read data from FSMC SRAM memory */
+ FSMC_SRAM_ReadBuffer(RxBuffer, WRITE_READ_ADDR, BUFFER_SIZE);
+
+ /* Read back SRAM memory and check content correctness */
+ for (Index = 0x00; (Index < BUFFER_SIZE) && (WriteReadStatus == 0); Index++)
+ {
+ if (RxBuffer[Index] != TxBuffer[Index])
+ {
+ WriteReadStatus = Index + 1;
+ }
+ }
+
+ if (WriteReadStatus == 0)
+ { /* OK */
+ /* Turn on LD1 */
+ GPIO_SetBits(GPIOF, GPIO_Pin_6);
+ }
+ else
+ { /* KO */
+ /* Turn off LD2 */
+ GPIO_SetBits(GPIOF, GPIO_Pin_7);
+ }
+
+ while (1)
+ {
+ }
+}
+
+/*******************************************************************************
+* Function Name : RCC_Configuration
+* Description : Configures the different system clocks.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void RCC_Configuration(void)
+{
+ /* RCC system reset(for debug purpose) */
+ RCC_DeInit();
+
+ /* Enable HSE */
+ RCC_HSEConfig(RCC_HSE_ON);
+
+ /* Wait till HSE is ready */
+ HSEStartUpStatus = RCC_WaitForHSEStartUp();
+
+ if(HSEStartUpStatus == SUCCESS)
+ {
+ /* Enable Prefetch Buffer */
+ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
+
+ /* Flash 2 wait state */
+ FLASH_SetLatency(FLASH_Latency_2);
+
+ /* HCLK = SYSCLK */
+ RCC_HCLKConfig(RCC_SYSCLK_Div1);
+
+ /* PCLK2 = HCLK */
+ RCC_PCLK2Config(RCC_HCLK_Div1);
+
+ /* PCLK1 = HCLK/2 */
+ RCC_PCLK1Config(RCC_HCLK_Div2);
+
+ /* PLLCLK = 8MHz * 9 = 72 MHz */
+ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
+
+ /* Enable PLL */
+ RCC_PLLCmd(ENABLE);
+
+ /* Wait till PLL is ready */
+ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
+ {
+ }
+
+ /* Select PLL as system clock source */
+ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
+
+ /* Wait till PLL is used as system clock source */
+ while(RCC_GetSYSCLKSource() != 0x08)
+ {
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : NVIC_Configuration
+* Description : Configures Vector Table base location.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void NVIC_Configuration(void)
+{
+#ifdef VECT_TAB_RAM
+ /* Set the Vector Table base location at 0x20000000 */
+ NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
+#else /* VECT_TAB_FLASH */
+ /* Set the Vector Table base location at 0x08000000 */
+ NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
+#endif
+}
+
+/*******************************************************************************
+* Function name : Fill_Buffer
+* Description : Fill the global buffer
+* Input : - pBuffer: pointer on the Buffer to fill
+* - BufferSize: size of the buffer to fill
+* - Offset: first value to fill on the Buffer
+* Output param : None
+*******************************************************************************/
+void Fill_Buffer(u16 *pBuffer, u16 BufferLenght, u32 Offset)
+{
+ u16 IndexTmp = 0;
+
+ /* Put in global buffer same values */
+ for (IndexTmp = 0; IndexTmp < BufferLenght; IndexTmp++ )
+ {
+ pBuffer[IndexTmp] = IndexTmp + Offset;
+ }
+}
+
+#ifdef DEBUG
+/*******************************************************************************
+* Function Name : assert_failed
+* Description : Reports the name of the source file and the source line number
+* where the assert_param error has occurred.
+* Input : - file: pointer to the source file name
+* - line: assert_param error line source number
+* Output : None
+* Return : None
+*******************************************************************************/
+void assert_failed(u8* file, u32 line)
+{
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {
+ }
+}
+#endif
+
+/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
diff --git a/src/stm32lib/examples/FSMC/SRAM/readme.txt b/src/stm32lib/examples/FSMC/SRAM/readme.txt
new file mode 100755
index 0000000..b9aefda
--- /dev/null
+++ b/src/stm32lib/examples/FSMC/SRAM/readme.txt
@@ -0,0 +1,54 @@
+/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
+* File Name : readme.txt
+* Author : MCD Application Team
+* Version : V2.0.1
+* Date : 06/13/2008
+* Description : Description of the FSMC SRAM Example.
+********************************************************************************
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+Example description
+===================
+This example provides a basic example of how to use the FSMC firmware library and
+an associate driver to perform read/write operations on the IS61WV51216BLL SRAM
+memory mounted on STM3210E-EVAL board.
+
+
+Directory contents
+==================
+stm32f10x_conf.h Library Configuration file
+stm32f10x_it.c Interrupt handlers
+stm32f10x_it.h Header for stm32f10x_it.c
+fsmc_sram.c Driver for SRAM memory
+fsmc_sram.h Header for fsmc_sram.c
+main.c Main program
+
+
+Hardware environment
+====================
+This example runs on STMicroelectronics STM3210E-EVAL evaluation board.
+
+
+How to use it
+=============
+In order to make the program work, you must do the following:
+- Create a project and setup all your toolchain's start-up files
+- Compile the directory content files and required Library files:
+ + stm32f10x_lib.c
+ + stm32f10x_gpio.c
+ + stm32f10x_rcc.c
+ + stm32f10x_nvic.c
+ + stm32f10x_flash.c
+ + stm32f10x_fsmc.c
+
+- Link all compiled files and load your image into target memory
+- Run the example
+
+
+******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE******
diff --git a/src/stm32lib/examples/FSMC/SRAM/stm32f10x_conf.h b/src/stm32lib/examples/FSMC/SRAM/stm32f10x_conf.h
new file mode 100755
index 0000000..48e488f
--- /dev/null
+++ b/src/stm32lib/examples/FSMC/SRAM/stm32f10x_conf.h
@@ -0,0 +1,170 @@
+/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
+* File Name : stm32f10x_conf.h
+* Author : MCD Application Team
+* Version : V2.0.1
+* Date : 06/13/2008
+* Description : Library configuration file.
+********************************************************************************
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F10x_CONF_H
+#define __STM32F10x_CONF_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f10x_type.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Uncomment the line below to compile the library in DEBUG mode, this will expanse
+ the "assert_param" macro in the firmware library code (see "Exported macro"
+ section below) */
+/*#define DEBUG 1*/
+
+/* Comment the line below to disable the specific peripheral inclusion */
+/************************************* ADC ************************************/
+//#define _ADC
+//#define _ADC1
+//#define _ADC2
+//#define _ADC3
+
+/************************************* BKP ************************************/
+//#define _BKP
+
+/************************************* CAN ************************************/
+//#define _CAN
+
+/************************************* CRC ************************************/
+//#define _CRC
+
+/************************************* DAC ************************************/
+//#define _DAC
+
+/************************************* DBGMCU *********************************/
+//#define _DBGMCU
+
+/************************************* DMA ************************************/
+//#define _DMA
+//#define _DMA1_Channel1
+//#define _DMA1_Channel2
+//#define _DMA1_Channel3
+//#define _DMA1_Channel4
+//#define _DMA1_Channel5
+//#define _DMA1_Channel6
+//#define _DMA1_Channel7
+//#define _DMA2_Channel1
+//#define _DMA2_Channel2
+//#define _DMA2_Channel3
+//#define _DMA2_Channel4
+//#define _DMA2_Channel5
+
+/************************************* EXTI ***********************************/
+//#define _EXTI
+
+/************************************* FLASH and Option Bytes *****************/
+#define _FLASH
+/* Uncomment the line below to enable FLASH program/erase/protections functions,
+ otherwise only FLASH configuration (latency, prefetch, half cycle) functions
+ are enabled */
+/* #define _FLASH_PROG */
+
+/************************************* FSMC ***********************************/
+#define _FSMC
+
+/************************************* GPIO ***********************************/
+#define _GPIO
+//#define _GPIOA
+//#define _GPIOB
+//#define _GPIOC
+#define _GPIOD
+#define _GPIOE
+#define _GPIOF
+#define _GPIOG
+#define _AFIO
+
+/************************************* I2C ************************************/
+//#define _I2C
+//#define _I2C1
+//#define _I2C2
+
+/************************************* IWDG ***********************************/
+//#define _IWDG
+
+/************************************* NVIC ***********************************/
+#define _NVIC
+
+/************************************* PWR ************************************/
+//#define _PWR
+
+/************************************* RCC ************************************/
+#define _RCC
+
+/************************************* RTC ************************************/
+//#define _RTC
+
+/************************************* SDIO ***********************************/
+//#define _SDIO
+
+/************************************* SPI ************************************/
+//#define _SPI
+//#define _SPI1
+//#define _SPI2
+//#define _SPI3
+
+/************************************* SysTick ********************************/
+//#define _SysTick
+
+/************************************* TIM ************************************/
+//#define _TIM
+//#define _TIM1
+//#define _TIM2
+//#define _TIM3
+//#define _TIM4
+//#define _TIM5
+//#define _TIM6
+//#define _TIM7
+//#define _TIM8
+
+/************************************* USART **********************************/
+//#define _USART
+//#define _USART1
+//#define _USART2
+//#define _USART3
+//#define _UART4
+//#define _UART5
+
+/************************************* WWDG ***********************************/
+//#define _WWDG
+
+/* In the following line adjust the value of External High Speed oscillator (HSE)
+ used in your application */
+#define HSE_Value ((u32)8000000) /* Value of the External oscillator in Hz*/
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef DEBUG
+/*******************************************************************************
+* Macro Name : assert_param
+* Description : The assert_param macro is used for function's parameters check.
+* It is used only if the library is compiled in DEBUG mode.
+* Input : - expr: If expr is false, it calls assert_failed function
+* which reports the name of the source file and the source
+* line number of the call that failed.
+* If expr is true, it returns no value.
+* Return : None
+*******************************************************************************/
+ #define assert_param(expr) ((expr) ? (void)0 : assert_failed((u8 *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(u8* file, u32 line);
+#else
+ #define assert_param(expr) ((void)0)
+#endif /* DEBUG */
+
+#endif /* __STM32F10x_CONF_H */
+
+/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
diff --git a/src/stm32lib/examples/FSMC/SRAM/stm32f10x_it.c b/src/stm32lib/examples/FSMC/SRAM/stm32f10x_it.c
new file mode 100755
index 0000000..e27c1e7
--- /dev/null
+++ b/src/stm32lib/examples/FSMC/SRAM/stm32f10x_it.c
@@ -0,0 +1,810 @@
+/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
+* File Name : stm32f10x_it.c
+* Author : MCD Application Team
+* Version : V2.0.1
+* Date : 06/13/2008
+* Description : Main Interrupt Service Routines.
+* This file provides template for all exceptions handler
+* and peripherals interrupt service routine.
+********************************************************************************
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f10x_it.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : NMIException
+* Description : This function handles NMI exception.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void NMIException(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : HardFaultException
+* Description : This function handles Hard Fault exception.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void HardFaultException(void)
+{
+ /* Go to infinite loop when Hard Fault exception occurs */
+ while (1)
+ {
+ }
+}
+
+/*******************************************************************************
+* Function Name : MemManageException
+* Description : This function handles Memory Manage exception.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void MemManageException(void)
+{
+ /* Go to infinite loop when Memory Manage exception occurs */
+ while (1)
+ {
+ }
+}
+
+/*******************************************************************************
+* Function Name : BusFaultException
+* Description : This function handles Bus Fault exception.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void BusFaultException(void)
+{
+ /* Go to infinite loop when Bus Fault exception occurs */
+ while (1)
+ {
+ }
+}
+
+/*******************************************************************************
+* Function Name : UsageFaultException
+* Description : This function handles Usage Fault exception.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void UsageFaultException(void)
+{
+ /* Go to infinite loop when Usage Fault exception occurs */
+ while (1)
+ {
+ }
+}
+
+/*******************************************************************************
+* Function Name : DebugMonitor
+* Description : This function handles Debug Monitor exception.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DebugMonitor(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : SVCHandler
+* Description : This function handles SVCall exception.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SVCHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : PendSVC
+* Description : This function handles PendSVC exception.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void PendSVC(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : SysTickHandler
+* Description : This function handles SysTick Handler.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SysTickHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : WWDG_IRQHandler
+* Description : This function handles WWDG interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void WWDG_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : PVD_IRQHandler
+* Description : This function handles PVD interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void PVD_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TAMPER_IRQHandler
+* Description : This function handles Tamper interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TAMPER_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : RTC_IRQHandler
+* Description : This function handles RTC global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : FLASH_IRQHandler
+* Description : This function handles Flash interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void FLASH_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : RCC_IRQHandler
+* Description : This function handles RCC interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void RCC_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : EXTI0_IRQHandler
+* Description : This function handles External interrupt Line 0 request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void EXTI0_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : EXTI1_IRQHandler
+* Description : This function handles External interrupt Line 1 request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void EXTI1_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : EXTI2_IRQHandler
+* Description : This function handles External interrupt Line 2 request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void EXTI2_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : EXTI3_IRQHandler
+* Description : This function handles External interrupt Line 3 request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void EXTI3_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : EXTI4_IRQHandler
+* Description : This function handles External interrupt Line 4 request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void EXTI4_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA1_Channel1_IRQHandler
+* Description : This function handles DMA1 Channel 1 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA1_Channel1_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA1_Channel2_IRQHandler
+* Description : This function handles DMA1 Channel 2 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA1_Channel2_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA1_Channel3_IRQHandler
+* Description : This function handles DMA1 Channel 3 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA1_Channel3_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA1_Channel4_IRQHandler
+* Description : This function handles DMA1 Channel 4 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA1_Channel4_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA1_Channel5_IRQHandler
+* Description : This function handles DMA1 Channel 5 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA1_Channel5_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA1_Channel6_IRQHandler
+* Description : This function handles DMA1 Channel 6 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA1_Channel6_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA1_Channel7_IRQHandler
+* Description : This function handles DMA1 Channel 7 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA1_Channel7_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : ADC1_2_IRQHandler
+* Description : This function handles ADC1 and ADC2 global interrupts requests.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC1_2_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : USB_HP_CAN_TX_IRQHandler
+* Description : This function handles USB High Priority or CAN TX interrupts
+* requests.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void USB_HP_CAN_TX_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : USB_LP_CAN_RX0_IRQHandler
+* Description : This function handles USB Low Priority or CAN RX0 interrupts
+* requests.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void USB_LP_CAN_RX0_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : CAN_RX1_IRQHandler
+* Description : This function handles CAN RX1 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_RX1_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : CAN_SCE_IRQHandler
+* Description : This function handles CAN SCE interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_SCE_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : EXTI9_5_IRQHandler
+* Description : This function handles External lines 9 to 5 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void EXTI9_5_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM1_BRK_IRQHandler
+* Description : This function handles TIM1 Break interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM1_BRK_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM1_UP_IRQHandler
+* Description : This function handles TIM1 overflow and update interrupt
+* request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM1_UP_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM1_TRG_COM_IRQHandler
+* Description : This function handles TIM1 Trigger and commutation interrupts
+* requests.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM1_TRG_COM_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM1_CC_IRQHandler
+* Description : This function handles TIM1 capture compare interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM1_CC_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM2_IRQHandler
+* Description : This function handles TIM2 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM2_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM3_IRQHandler
+* Description : This function handles TIM3 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM3_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM4_IRQHandler
+* Description : This function handles TIM4 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM4_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : I2C1_EV_IRQHandler
+* Description : This function handles I2C1 Event interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void I2C1_EV_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : I2C1_ER_IRQHandler
+* Description : This function handles I2C1 Error interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void I2C1_ER_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : I2C2_EV_IRQHandler
+* Description : This function handles I2C2 Event interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void I2C2_EV_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : I2C2_ER_IRQHandler
+* Description : This function handles I2C2 Error interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void I2C2_ER_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : SPI1_IRQHandler
+* Description : This function handles SPI1 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SPI1_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : SPI2_IRQHandler
+* Description : This function handles SPI2 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SPI2_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : USART1_IRQHandler
+* Description : This function handles USART1 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void USART1_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : USART2_IRQHandler
+* Description : This function handles USART2 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void USART2_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : USART3_IRQHandler
+* Description : This function handles USART3 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void USART3_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : EXTI15_10_IRQHandler
+* Description : This function handles External lines 15 to 10 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void EXTI15_10_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : RTCAlarm_IRQHandler
+* Description : This function handles RTC Alarm interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTCAlarm_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : USBWakeUp_IRQHandler
+* Description : This function handles USB WakeUp interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void USBWakeUp_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM8_BRK_IRQHandler
+* Description : This function handles TIM8 Break interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM8_BRK_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM8_UP_IRQHandler
+* Description : This function handles TIM8 overflow and update interrupt
+* request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM8_UP_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM8_TRG_COM_IRQHandler
+* Description : This function handles TIM8 Trigger and commutation interrupts
+* requests.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM8_TRG_COM_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM8_CC_IRQHandler
+* Description : This function handles TIM8 capture compare interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM8_CC_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : ADC3_IRQHandler
+* Description : This function handles ADC3 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC3_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : FSMC_IRQHandler
+* Description : This function handles FSMC global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void FSMC_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : SDIO_IRQHandler
+* Description : This function handles SDIO global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SDIO_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM5_IRQHandler
+* Description : This function handles TIM5 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM5_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : SPI3_IRQHandler
+* Description : This function handles SPI3 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SPI3_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : UART4_IRQHandler
+* Description : This function handles UART4 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART4_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : UART5_IRQHandler
+* Description : This function handles UART5 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART5_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM6_IRQHandler
+* Description : This function handles TIM6 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM6_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : TIM7_IRQHandler
+* Description : This function handles TIM7 global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM7_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA2_Channel1_IRQHandler
+* Description : This function handles DMA2 Channel 1 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA2_Channel1_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA2_Channel2_IRQHandler
+* Description : This function handles DMA2 Channel 2 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA2_Channel2_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA2_Channel3_IRQHandler
+* Description : This function handles DMA2 Channel 3 interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA2_Channel3_IRQHandler(void)
+{
+}
+
+/*******************************************************************************
+* Function Name : DMA2_Channel4_5_IRQHandler
+* Description : This function handles DMA2 Channel 4 and DMA2 Channel 5
+* interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void DMA2_Channel4_5_IRQHandler(void)
+{
+}
+
+/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
diff --git a/src/stm32lib/examples/FSMC/SRAM/stm32f10x_it.h b/src/stm32lib/examples/FSMC/SRAM/stm32f10x_it.h
new file mode 100755
index 0000000..e74b6cc
--- /dev/null
+++ b/src/stm32lib/examples/FSMC/SRAM/stm32f10x_it.h
@@ -0,0 +1,100 @@
+/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
+* File Name : stm32f10x_it.h
+* Author : MCD Application Team
+* Version : V2.0.1
+* Date : 06/13/2008
+* Description : This file contains the headers of the interrupt handlers.
+********************************************************************************
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F10x_IT_H
+#define __STM32F10x_IT_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f10x_lib.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void NMIException(void);
+void HardFaultException(void);
+void MemManageException(void);
+void BusFaultException(void);
+void UsageFaultException(void);
+void DebugMonitor(void);
+void SVCHandler(void);
+void PendSVC(void);
+void SysTickHandler(void);
+void WWDG_IRQHandler(void);
+void PVD_IRQHandler(void);
+void TAMPER_IRQHandler(void);
+void RTC_IRQHandler(void);
+void FLASH_IRQHandler(void);
+void RCC_IRQHandler(void);
+void EXTI0_IRQHandler(void);
+void EXTI1_IRQHandler(void);
+void EXTI2_IRQHandler(void);
+void EXTI3_IRQHandler(void);
+void EXTI4_IRQHandler(void);
+void DMA1_Channel1_IRQHandler(void);
+void DMA1_Channel2_IRQHandler(void);
+void DMA1_Channel3_IRQHandler(void);
+void DMA1_Channel4_IRQHandler(void);
+void DMA1_Channel5_IRQHandler(void);
+void DMA1_Channel6_IRQHandler(void);
+void DMA1_Channel7_IRQHandler(void);
+void ADC1_2_IRQHandler(void);
+void USB_HP_CAN_TX_IRQHandler(void);
+void USB_LP_CAN_RX0_IRQHandler(void);
+void CAN_RX1_IRQHandler(void);
+void CAN_SCE_IRQHandler(void);
+void EXTI9_5_IRQHandler(void);
+void TIM1_BRK_IRQHandler(void);
+void TIM1_UP_IRQHandler(void);
+void TIM1_TRG_COM_IRQHandler(void);
+void TIM1_CC_IRQHandler(void);
+void TIM2_IRQHandler(void);
+void TIM3_IRQHandler(void);
+void TIM4_IRQHandler(void);
+void I2C1_EV_IRQHandler(void);
+void I2C1_ER_IRQHandler(void);
+void I2C2_EV_IRQHandler(void);
+void I2C2_ER_IRQHandler(void);
+void SPI1_IRQHandler(void);
+void SPI2_IRQHandler(void);
+void USART1_IRQHandler(void);
+void USART2_IRQHandler(void);
+void USART3_IRQHandler(void);
+void EXTI15_10_IRQHandler(void);
+void RTCAlarm_IRQHandler(void);
+void USBWakeUp_IRQHandler(void);
+void TIM8_BRK_IRQHandler(void);
+void TIM8_UP_IRQHandler(void);
+void TIM8_TRG_COM_IRQHandler(void);
+void TIM8_CC_IRQHandler(void);
+void ADC3_IRQHandler(void);
+void FSMC_IRQHandler(void);
+void SDIO_IRQHandler(void);
+void TIM5_IRQHandler(void);
+void SPI3_IRQHandler(void);
+void UART4_IRQHandler(void);
+void UART5_IRQHandler(void);
+void TIM6_IRQHandler(void);
+void TIM7_IRQHandler(void);
+void DMA2_Channel1_IRQHandler(void);
+void DMA2_Channel2_IRQHandler(void);
+void DMA2_Channel3_IRQHandler(void);
+void DMA2_Channel4_5_IRQHandler(void);
+
+#endif /* __STM32F10x_IT_H */
+
+/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/