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| author | Marti Bolivar <mbolivar@leaflabs.com> | 2012-05-14 12:09:11 -0400 |
|---|---|---|
| committer | Marti Bolivar <mbolivar@leaflabs.com> | 2012-05-16 13:23:39 -0400 |
| commit | 0287ea3598176bf05f4e6f88b3b641159f7620bd (patch) | |
| tree | 9d0a7bbae16222e780d500cab9209eadd9dd2e11 /source | |
| parent | 3a12a179152a61531bf2ace01f7ad42a8812c684 (diff) | |
| download | librambutan-0287ea3598176bf05f4e6f88b3b641159f7620bd.tar.gz librambutan-0287ea3598176bf05f4e6f88b3b641159f7620bd.zip | |
Update <libmaple/nvic.h> API page.
Updates for new supported chips.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'source')
| -rw-r--r-- | source/libmaple/api/nvic.rst | 43 |
1 files changed, 33 insertions, 10 deletions
diff --git a/source/libmaple/api/nvic.rst b/source/libmaple/api/nvic.rst index b22c94b..505e36e 100644 --- a/source/libmaple/api/nvic.rst +++ b/source/libmaple/api/nvic.rst @@ -1,25 +1,44 @@ .. highlight:: c .. _libmaple-nvic: -``nvic.h`` -========== +``<libmaple/nvic.h>`` +===================== Nested Vector Interrupt Controller (NVIC) support. +The same API is used on all targets, but the available interrupts are +target-dependent. To manage this, each target series defines an +:ref:`nvic_irq_num <libmaple-nvic-nvic_irq_num>` enumerator for each +available interrupt. + .. contents:: Contents :local: -Types ------ - -.. doxygenstruct:: nvic_reg_map -.. doxygenenum:: nvic_irq_num - Devices ------- None at this time. +.. _libmaple-nvic-nvic_irq_num: + +``nvic_irq_num`` +---------------- + +This target-dependent enum is used to identify an interrupt vector +number. Interrupts which are common across series have the same token +(though not necessarily the same value) for their ``nvic_irq_num``\ s. +The available values on each supported target series are as follows. + +STM32F1 Targets +~~~~~~~~~~~~~~~ + +.. doxygenenum:: stm32f1::nvic_irq_num + +STM32F2 Targets +~~~~~~~~~~~~~~~ + +.. doxygenenum:: stm32f2::nvic_irq_num + Functions --------- @@ -33,10 +52,14 @@ Functions .. doxygenfunction:: nvic_irq_disable_all .. doxygenfunction:: nvic_sys_reset -Register Map Base Pointers --------------------------- +Register Maps +------------- + +Since the NVIC is part of the ARM core, its registers and base pointer +are common across all targes. .. doxygendefine:: NVIC_BASE +.. doxygenstruct:: nvic_reg_map Register Bit Definitions ------------------------ |