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authorMarti Bolivar <mbolivar@leaflabs.com>2012-01-27 21:01:59 -0500
committerMarti Bolivar <mbolivar@leaflabs.com>2012-04-11 16:56:54 -0400
commitb5a8e0386d5134839bf23e82110d2f1926201202 (patch)
tree50b4a7a328bbc848d877ac9c6f77166403afe586 /libmaple/stm32f1/include/series
parent511a553334f36112bc2fd85f7c991840df727b60 (diff)
downloadlibrambutan-b5a8e0386d5134839bf23e82110d2f1926201202.tar.gz
librambutan-b5a8e0386d5134839bf23e82110d2f1926201202.zip
Clean up Flash interface; add flash_enable_features().
Make a single function, flash_enable_features(), to control the access characteristics of Flash memory (i.e. to write to the non-latency bits of ACR). In so doing, make everybody pretend to allow instruction and data caching. On STM32F1, trying to turn these on simply has no effect. This allows unconditionally trying to turn them on, which will simplify users' lives. This has the ancillary benefit of making the stm32f2- and stm32f1-specific flash.c files unnecessary; delete these. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'libmaple/stm32f1/include/series')
-rw-r--r--libmaple/stm32f1/include/series/flash.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/libmaple/stm32f1/include/series/flash.h b/libmaple/stm32f1/include/series/flash.h
index efa608c..5603176 100644
--- a/libmaple/stm32f1/include/series/flash.h
+++ b/libmaple/stm32f1/include/series/flash.h
@@ -135,6 +135,14 @@ typedef struct flash_reg_map {
#define FLASH_SAFE_WAIT_STATES FLASH_WAIT_STATE_2
+/* Flash memory features available via ACR */
+enum {
+ FLASH_PREFETCH = 0x10,
+ FLASH_HALF_CYCLE = 0x8,
+ FLASH_ICACHE = 0x0, /* Not available on STM32F1 */
+ FLASH_DCACHE = 0x0, /* Not available on STM32F1 */
+};
+
#ifdef __cplusplus
}
#endif