aboutsummaryrefslogtreecommitdiffstats
path: root/libmaple/nvic.c
diff options
context:
space:
mode:
authorMarti Bolivar <mbolivar@leaflabs.com>2011-06-20 17:15:42 -0400
committerMarti Bolivar <mbolivar@leaflabs.com>2011-09-24 16:02:15 -0400
commite0c7ac23ec37b80a3cddd8782d5e41eb7b639937 (patch)
tree2c570182c4f2d9585ebacf8286ce89434daf19bf /libmaple/nvic.c
parent5b6bfdf598f975b26d6d0cbdced53d1b5d308cc7 (diff)
downloadlibrambutan-e0c7ac23ec37b80a3cddd8782d5e41eb7b639937.tar.gz
librambutan-e0c7ac23ec37b80a3cddd8782d5e41eb7b639937.zip
scb.h: Fix register map and bit definitions.
For the change log: This commit breaks backwards compatibility with 0.0.12. However, it appears that the previous version was incorrect, so these changes are necessary. The SCB register map type (scb_reg_map) appears to be adapted from versions specified by ARM; these include every possible register, and do not necessarily apply to the STM32, since some registers are implementation defined, to the extent that the implementation is allowed not to feature them at all. Thus, the current definition appears to be an overreach, since libmaple is STM32-specific. We should thus revise it based on ST's PM0056, where the STM32 SCB is specified. However, the ST docs appear to be buggy. In particular, they appear to contradict requirements made by ARM v7-M ARM with respect to the debug fault status register (DFSR), which ARM says must exist, but ST fails to specify (it does leave a DFSR-sized hole in the SCB memory layout, conveniently located next to some obvious typos which suggest that the section was not well-proofread). We defer to ARM and assume ST just forgot to document the register, and leave the DFSR field in struct scb_reg_map, since (based on my reading) its absence would be a silicon bug. All of the registers appearing in memory addresses higher than that of SCB_BFAR are not specified by ST, but the v7-M ARM appears to give some latitude on this to the implementation. Leave them in the source text, but put them in an appropriately-commented #if 0 block so that users who know they're there can yell at us if they find them missing. In this block, the Auxiliary Feature Register's field was "ADR" instead of "AFR" in struct scb_reg_map; fix this. Register bit definitions have been added which are named based on PM0056 when possible, and on the November 2010 "Derrata 2010_Q3" issue of the ARM v7-M Architecture Reference Manual, in the case of the DFSR. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'libmaple/nvic.c')
0 files changed, 0 insertions, 0 deletions