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authorMarti Bolivar <mbolivar@leaflabs.com>2012-06-01 03:05:56 -0400
committerMarti Bolivar <mbolivar@leaflabs.com>2012-06-01 03:05:56 -0400
commit5befb0826a1ff77994c55f42cd73ccf0905a5ce0 (patch)
treec5c5d3f3eb024533ef134f22cd5f94e67bbd2fcf /libmaple/include/libmaple/stm32.h
parent33a2fff2fc60ea0e6938d72c81812b2afb3bfb0e (diff)
downloadlibrambutan-5befb0826a1ff77994c55f42cd73ccf0905a5ce0.tar.gz
librambutan-5befb0826a1ff77994c55f42cd73ccf0905a5ce0.zip
libmaple/stm32.h: Add STM32_TIMER_MASK, STM32_HAVE_TIMER.
Feature-test macros for dealing with the fact that timer support has holes. STM32_TIMER_MASK is a bitmask where bit n is set when TIMERn is present. STM32_HAVE_TIMER(n) just tests whether bit n is set in STM32_TIMER_MASK. This is necessary because e.g. the STM32F100RB has timers 1-4, 6, 7, and 15-17. Because of this, the usual STM32_NR_whatever won't work, and we use a bitmask instead. For F1 performance line (F103s), STM32_TIMER_MASK can be derived from the density. For F1 value line, I'm not as sure, so just add it for the single MCU we support (the STM32F100RB). Same story for F2: add it for the STM32F207IC. We can fix this up later if necessary. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'libmaple/include/libmaple/stm32.h')
-rw-r--r--libmaple/include/libmaple/stm32.h43
1 files changed, 39 insertions, 4 deletions
diff --git a/libmaple/include/libmaple/stm32.h b/libmaple/include/libmaple/stm32.h
index 097a016..94fb689 100644
--- a/libmaple/include/libmaple/stm32.h
+++ b/libmaple/include/libmaple/stm32.h
@@ -70,14 +70,36 @@ extern "C" {
#include <series/stm32.h>
/* Ensure the series header isn't broken. */
-#if (!defined(STM32_PCLK1) || !defined(STM32_PCLK2) || \
- !defined(STM32_MCU_SERIES) || !defined(STM32_NR_INTERRUPTS) || \
- !defined(STM32_NR_GPIO_PORTS) || !defined(STM32_DELAY_US_MULT) || \
- !defined(STM32_SRAM_END) || !defined(STM32_HAVE_FSMC) || \
+#if (!defined(STM32_PCLK1) || \
+ !defined(STM32_PCLK2) || \
+ !defined(STM32_MCU_SERIES) || \
+ !defined(STM32_NR_INTERRUPTS) || \
+ !defined(STM32_NR_GPIO_PORTS) || \
+ !defined(STM32_TIMER_MASK) || \
+ !defined(STM32_DELAY_US_MULT) || \
+ !defined(STM32_SRAM_END) || \
+ !defined(STM32_HAVE_FSMC) || \
!defined(STM32_HAVE_USB))
#error "Bad STM32F1 configuration. Check <series/stm32.h> header for your MCU."
#endif
+/*
+ * Derived macros
+ */
+
+/* FIXME [0.0.13] add this to ReST API page */
+/**
+ * @brief Statically determine whether a timer is present.
+ *
+ * Given a constant timer number n (starting from 1), this macro has a
+ * nonzero value exactly when TIMERn is available.
+ */
+#define STM32_HAVE_TIMER(n) (STM32_TIMER_MASK & (1 << (n)))
+
+/*
+ * Doxygen for functionality provided by series header.
+ */
+
#ifdef __DOXYGEN__
/*
@@ -128,6 +150,19 @@ extern "C" {
*/
#define STM32_NR_GPIO_PORTS
+/* FIXME [0.0.13] add this to ReST API page */
+/**
+ * @brief Bitmask of timers available on the MCU.
+ *
+ * That is, if TIMERn is available, then STM32_TIMER_MASK & (1 << n)
+ * will be nonzero. For example, a nonzero value of "STM32_TIMER_MASK
+ * & 0x2" means TIMER1 is available.
+ *
+ * A bitmask is necessary as some STM32 MCUs have "holes" in the range
+ * of available timers.
+ */
+#define STM32_TIMER_MASK
+
/**
* @brief Multiplier to convert microseconds into loop iterations
* in delay_us().