Merge branch 'wip-family-support'

Merge the long-lived (too long; future changes like these will need to
proceed more incrementally) development branch of libmaple, containing
experimental STM32F2 and STM32F1 value line support, into master.

This required many changes to the structure of the library. The most
important structural reorganizations occurred in:

- 954f9e5: moves public headers to include directories
- 3efa313: uses "series" instead of "family"
- c0d60e3: adds board files to the build system, to make it easier to
  add new boards
- 096d86c: adds build logic for targeting different STM32 series
  (e.g. STM32F1, STM32F2)

This last commit in particular (096d86c) is the basis for the
repartitioning of libmaple into portable sections, which work on all
supported MCUs, and nonportable sections, which are segregated into
separate directories and contain all series-specific code. Moving
existing STM32F1-only code into libmaple/stm32f1 and wirish/stm32f1,
along with adding equivalents under .../stm32f2 directories, was the
principal project of this branch.

Important API changes occur in several places. Existing code is still
expected to work on STM32F1 targets, but there have been many
deprecations. A detailed changelog explaining the situation needs to
be prepared.

F2 and F1 value line support is not complete; the merge is proceeding
prematurely in this respect. We've been getting more libmaple patches
from the community lately, and I'm worried that the merge conflicts
with the old tree structure will become painful to manage.

Conflicts:
	Makefile

Resolved Makefile conflicts manually; this required propagating
-Xlinker usage into support/make/target-config.mk.

Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>

1 files changed, 115 insertions, 0 deletions

diff --git a/libmaple/include/libmaple/pwr.h b/libmaple/include/libmaple/pwr.h
new file mode 100644
index 0000000..e4b5b0d
--- /dev/null
+++ b/libmaple/include/libmaple/pwr.h
@@ -0,0 +1,115 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2010 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file libmaple/include/libmaple/pwr.h
+ * @brief Power control (PWR).
+ */
+
+#ifndef _LIBMAPLE_PWR_H_
+#define _LIBMAPLE_PWR_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <libmaple/libmaple.h>
+#include <series/pwr.h>
+
+/** Power interface register map. */
+typedef struct pwr_reg_map {
+    __io uint32 CR;      /**< Control register */
+    __io uint32 CSR;     /**< Control and status register */
+} pwr_reg_map;
+
+/** Power peripheral register map base pointer. */
+#define PWR_BASE                        ((struct pwr_reg_map*)0x40007000)
+
+/*
+ * Register bit definitions
+ */
+
+/* Control register */
+
+/** Disable backup domain write protection bit */
+#define PWR_CR_DBP_BIT                  8
+/** Power voltage detector enable bit */
+#define PWR_CR_PVDE_BIT                 4
+/** Clear standby flag bit */
+#define PWR_CR_CSBF_BIT                 3
+/** Clear wakeup flag bit */
+#define PWR_CR_CWUF_BIT                 2
+/** Power down deepsleep bit */
+#define PWR_CR_PDDS_BIT                 1
+/** Low-power deepsleep bit */
+#define PWR_CR_LPDS_BIT                 0
+
+/** Disable backup domain write protection */
+#define PWR_CR_DBP                      (1U << PWR_CR_DBP_BIT)
+/** Power voltage detector (PVD) level selection */
+#define PWR_CR_PLS                      (0x7 << 5)
+/** Power voltage detector enable */
+#define PWR_CR_PVDE                     (1U << PWR_CR_PVDE_BIT)
+/** Clear standby flag */
+#define PWR_CR_CSBF                     (1U << PWR_CR_CSBF_BIT)
+/** Clear wakeup flag */
+#define PWR_CR_CWUF                     (1U << PWR_CR_CWUF_BIT)
+/** Power down deepsleep */
+#define PWR_CR_PDDS                     (1U << PWR_CR_PDDS_BIT)
+/** Low-power deepsleep */
+#define PWR_CR_LPDS                     (1U << PWR_CR_LPDS_BIT)
+
+/* Control and status register */
+
+/** Enable wakeup pin bit */
+#define PWR_CSR_EWUP_BIT                 8
+/** PVD output bit */
+#define PWR_CSR_PVDO_BIT                 2
+/** Standby flag bit */
+#define PWR_CSR_SBF_BIT                  1
+/** Wakeup flag bit */
+#define PWR_CSR_WUF_BIT                  0
+
+/** Enable wakeup pin */
+#define PWR_CSR_EWUP                     (1U << PWR_CSR_EWUP_BIT)
+/** PVD output */
+#define PWR_CSR_PVDO                     (1U << PWR_CSR_PVDO_BIT)
+/** Standby flag */
+#define PWR_CSR_SBF                      (1U << PWR_CSR_SBF_BIT)
+/** Wakeup flag */
+#define PWR_CSR_WUF                      (1U << PWR_CSR_WUF_BIT)
+
+/*
+ * Convenience functions
+ */
+
+void pwr_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif