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authorMarti Bolivar <mbolivar@leaflabs.com>2012-06-20 15:18:17 -0400
committerMarti Bolivar <mbolivar@leaflabs.com>2012-06-22 14:06:09 -0400
commit9e08625d03acdef8dd2007cdb9fc203a074240b2 (patch)
tree0c7776054be9bf80b6c4673928e5a4b58de29cc1
parent336b45c9954c8821e73e8f0e4a9b5011a4af28b6 (diff)
downloadlibrambutan-9e08625d03acdef8dd2007cdb9fc203a074240b2.tar.gz
librambutan-9e08625d03acdef8dd2007cdb9fc203a074240b2.zip
<libmaple/i2c.h>: Move low-level routines to end of file.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
-rw-r--r--libmaple/include/libmaple/i2c.h144
1 files changed, 73 insertions, 71 deletions
diff --git a/libmaple/include/libmaple/i2c.h b/libmaple/include/libmaple/i2c.h
index ccce139..8ea77d7 100644
--- a/libmaple/include/libmaple/i2c.h
+++ b/libmaple/include/libmaple/i2c.h
@@ -165,8 +165,6 @@ typedef struct i2c_msg {
* Convenience routines
*/
-void i2c_init(i2c_dev *dev);
-
/* I2C enable options */
#define I2C_FAST_MODE 0x1 // 400 khz
#define I2C_DUTY_16_9 0x2 // 16/9 duty ratio
@@ -193,75 +191,6 @@ static inline void i2c_disable(i2c_dev *dev) {
dev->state = I2C_STATE_DISABLED;
}
-/**
- * @brief Turn on an I2C peripheral
- * @param dev Device to enable
- */
-static inline void i2c_peripheral_enable(i2c_dev *dev) {
- dev->regs->CR1 |= I2C_CR1_PE;
-}
-
-/**
- * @brief Turn off an I2C peripheral
- * @param dev Device to turn off
- */
-static inline void i2c_peripheral_disable(i2c_dev *dev) {
- dev->regs->CR1 &= ~I2C_CR1_PE;
-}
-
-/**
- * @brief Fill transmit register
- * @param dev I2C device
- * @param byte Byte to write
- */
-static inline void i2c_write(i2c_dev *dev, uint8 byte) {
- dev->regs->DR = byte;
-}
-
-/**
- * @brief Set input clock frequency, in MHz
- * @param dev I2C device
- * @param freq Frequency, in MHz. This must be at least 2, and at most
- * the APB frequency of dev's bus. (For example, if
- * rcc_dev_clk(dev) == RCC_APB1, freq must be at most
- * PCLK1, in MHz). There is an additional limit of 46 MHz.
- */
-static inline void i2c_set_input_clk(i2c_dev *dev, uint32 freq) {
-#define I2C_MAX_FREQ_MHZ 46
- ASSERT(2 <= freq && freq <= _i2c_bus_clk(dev) && freq <= I2C_MAX_FREQ_MHZ);
- uint32 cr2 = dev->regs->CR2;
- cr2 &= ~I2C_CR2_FREQ;
- cr2 |= freq;
- dev->regs->CR2 = freq;
-#undef I2C_MAX_FREQ_MHZ
-}
-
-/**
- * @brief Set I2C clock control register.
- *
- * See the chip reference manual for the details.
- *
- * @param dev I2C device
- * @param val Value to use for clock control register (in
- * Fast/Standard mode)
- */
-static inline void i2c_set_clk_control(i2c_dev *dev, uint32 val) {
- uint32 ccr = dev->regs->CCR;
- ccr &= ~I2C_CCR_CCR;
- ccr |= val;
- dev->regs->CCR = ccr;
-}
-
-/**
- * @brief Set SCL rise time
- * @param dev I2C device
- * @param trise Maximum rise time in fast/standard mode (see chip
- * reference manual for the relevant formulas).
- */
-static inline void i2c_set_trise(i2c_dev *dev, uint32 trise) {
- dev->regs->TRISE = trise;
-}
-
/* Start/stop conditions */
/**
@@ -345,6 +274,79 @@ static inline void i2c_disable_ack(i2c_dev *dev) {
dev->regs->CR1 &= ~I2C_CR1_ACK;
}
+/* Miscellaneous low-level routines */
+
+void i2c_init(i2c_dev *dev);
+
+/**
+ * @brief Turn on an I2C peripheral
+ * @param dev Device to enable
+ */
+static inline void i2c_peripheral_enable(i2c_dev *dev) {
+ dev->regs->CR1 |= I2C_CR1_PE;
+}
+
+/**
+ * @brief Turn off an I2C peripheral
+ * @param dev Device to turn off
+ */
+static inline void i2c_peripheral_disable(i2c_dev *dev) {
+ dev->regs->CR1 &= ~I2C_CR1_PE;
+}
+
+/**
+ * @brief Fill transmit register
+ * @param dev I2C device
+ * @param byte Byte to write
+ */
+static inline void i2c_write(i2c_dev *dev, uint8 byte) {
+ dev->regs->DR = byte;
+}
+
+/**
+ * @brief Set input clock frequency, in MHz
+ * @param dev I2C device
+ * @param freq Frequency, in MHz. This must be at least 2, and at most
+ * the APB frequency of dev's bus. (For example, if
+ * rcc_dev_clk(dev) == RCC_APB1, freq must be at most
+ * PCLK1, in MHz). There is an additional limit of 46 MHz.
+ */
+static inline void i2c_set_input_clk(i2c_dev *dev, uint32 freq) {
+#define I2C_MAX_FREQ_MHZ 46
+ ASSERT(2 <= freq && freq <= _i2c_bus_clk(dev) && freq <= I2C_MAX_FREQ_MHZ);
+ uint32 cr2 = dev->regs->CR2;
+ cr2 &= ~I2C_CR2_FREQ;
+ cr2 |= freq;
+ dev->regs->CR2 = freq;
+#undef I2C_MAX_FREQ_MHZ
+}
+
+/**
+ * @brief Set I2C clock control register.
+ *
+ * See the chip reference manual for the details.
+ *
+ * @param dev I2C device
+ * @param val Value to use for clock control register (in
+ * Fast/Standard mode)
+ */
+static inline void i2c_set_clk_control(i2c_dev *dev, uint32 val) {
+ uint32 ccr = dev->regs->CCR;
+ ccr &= ~I2C_CCR_CCR;
+ ccr |= val;
+ dev->regs->CCR = ccr;
+}
+
+/**
+ * @brief Set SCL rise time
+ * @param dev I2C device
+ * @param trise Maximum rise time in fast/standard mode (see chip
+ * reference manual for the relevant formulas).
+ */
+static inline void i2c_set_trise(i2c_dev *dev, uint32 trise) {
+ dev->regs->TRISE = trise;
+}
+
#ifdef __cplusplus
}
#endif