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author | Marti Bolivar <mbolivar@leaflabs.com> | 2011-11-16 18:12:57 -0500 |
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committer | Marti Bolivar <mbolivar@leaflabs.com> | 2012-04-11 16:56:51 -0400 |
commit | 57a73728b93e297fee80574fc04c4a07ddc325df (patch) | |
tree | b327e70c360e78de9941d07b497f97ad98cc6704 | |
parent | a4ae6eea2fe541d4e457574d589b441b61fd7d9b (diff) | |
download | librambutan-57a73728b93e297fee80574fc04c4a07ddc325df.tar.gz librambutan-57a73728b93e297fee80574fc04c4a07ddc325df.zip |
libmaple/nvic.c: Cosmetics.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
-rw-r--r-- | libmaple/nvic.c | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/libmaple/nvic.c b/libmaple/nvic.c index b80751f..e3f79a3 100644 --- a/libmaple/nvic.c +++ b/libmaple/nvic.c @@ -46,7 +46,7 @@ */ void nvic_irq_set_priority(nvic_irq_num irqn, uint8 priority) { if (irqn < 0) { - /* This interrupt is in the system handler block */ + /* This interrupt is in the system handler block */ SCB_BASE->SHP[((uint32)irqn & 0xF) - 4] = (priority & 0xF) << 4; } else { NVIC_BASE->IP[irqn] = (priority & 0xF) << 4; @@ -54,16 +54,12 @@ void nvic_irq_set_priority(nvic_irq_num irqn, uint8 priority) { } /** - * @brief Initialize the NVIC - * @param vector_table_address Vector table base address. - * @param offset Offset from vector_table_address. Some restrictions - * apply to the use of nonzero offsets; see ST RM0008 - * and the ARM Cortex M3 Technical Reference Manual. + * @brief Initialize the NVIC, setting interrupts to a default priority. */ -void nvic_init(uint32 vector_table_address, uint32 offset) { +void nvic_init(uint32 address, uint32 offset) { uint32 i; - nvic_set_vector_table(vector_table_address, offset); + nvic_set_vector_table(address, offset); /* * Lower priority level for all peripheral interrupts to lowest @@ -78,10 +74,18 @@ void nvic_init(uint32 vector_table_address, uint32 offset) { } /** - * Reset the vector table address. + * @brief Set the vector table base address. + * + * For stand-alone products, the vector table base address is normally + * the start of Flash (0x08000000). + * + * @param address Vector table base address. + * @param offset Offset from address. Some restrictions apply to the + * use of nonzero offsets; see the ARM Cortex M3 + * Technical Reference Manual. */ -void nvic_set_vector_table(uint32 addr, uint32 offset) { - SCB_BASE->VTOR = addr | (offset & 0x1FFFFF80); +void nvic_set_vector_table(uint32 address, uint32 offset) { + SCB_BASE->VTOR = address | (offset & 0x1FFFFF80); } /** |