summaryrefslogtreecommitdiffstats
path: root/package/oprofile/oprofile-0.9.3-avr32.patch
blob: 708efccec8faadf368ff2d2b0f59b602a339176f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
From 39ec366414a52eec3ac9db6b639965fef78601e3 Mon Sep 17 00:00:00 2001
From: Haavard Skinnemoen <hskinnemoen@atmel.com>
Date: Wed, 31 Oct 2007 20:38:48 +0100
Subject: [PATCH] Oprofile: Add support for AVR32

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
---
 events/Makefile.am      |    1 +
 events/avr32/events     |   27 +++++++++++++++++++++++++++
 events/avr32/unit_masks |    4 ++++
 libop/op_cpu_type.c     |    1 +
 libop/op_cpu_type.h     |    1 +
 libop/op_events.c       |    1 +
 utils/ophelp.c          |    5 +++++
 7 files changed, 40 insertions(+), 0 deletions(-)
 create mode 100644 events/avr32/events
 create mode 100644 events/avr32/unit_masks

diff --git a/events/Makefile.am b/events/Makefile.am
index 6efaa2e..4681d34 100644
--- a/events/Makefile.am
+++ b/events/Makefile.am
@@ -32,6 +32,7 @@ event_files = \
 	arm/xscale2/events arm/xscale2/unit_masks \
 	arm/armv6/events arm/armv6/unit_masks \
 	arm/mpcore/events arm/mpcore/unit_masks \
+	avr32/events avr32/unit_masks \
 	mips/20K/events mips/20K/unit_masks \
 	mips/24K/events mips/24K/unit_masks \
 	mips/25K/events mips/25K/unit_masks \
diff --git a/events/avr32/events b/events/avr32/events
new file mode 100644
index 0000000..489d914
--- /dev/null
+++ b/events/avr32/events
@@ -0,0 +1,27 @@
+# AVR32 events
+#
+event:0x00 counters:1,2 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses
+event:0x01 counters:1,2 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
+event:0x02 counters:1,2 um:zero minimum:500 name:CYCLES_DATA_STALL : cycles stall due to data dependency
+event:0x03 counters:1,2 um:zero minimum:500 name:ITLB_MISS : number of Instruction TLB misses
+event:0x04 counters:1,2 um:zero minimum:500 name:DTLB_MISS : number of Data TLB misses
+event:0x05 counters:1,2 um:zero minimum:500 name:BR_INST_EXECUTED : branch instruction executed w/ or w/o program flow change
+event:0x06 counters:1,2 um:zero minimum:500 name:BR_INST_MISS_PRED : branch mispredicted
+event:0x07 counters:1,2 um:zero minimum:500 name:INSN_EXECUTED : instructions executed
+event:0x08 counters:1,2 um:zero minimum:500 name:DCACHE_WBUF_FULL : data cache write buffers full
+event:0x09 counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_WBUF_FULL : cycles stalled due to data cache write buffers full
+event:0x0a counters:1,2 um:zero minimum:500 name:DCACHE_READ_MISS : data cache read miss
+event:0x0b counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_READ_MISS : cycles stalled due to data cache read miss
+event:0x0c counters:1,2 um:zero minimum:500 name:WRITE_ACCESS : write access
+event:0x0d counters:1,2 um:zero minimum:500 name:CYCLES_WRITE_ACCESS : cycles when write access is ongoing
+event:0x0e counters:1,2 um:zero minimum:500 name:READ_ACCESS : read access
+event:0x0f counters:1,2 um:zero minimum:500 name:CYCLES_READ_ACCESS : cycles when read access is ongoing
+event:0x10 counters:1,2 um:zero minimum:500 name:CACHE_STALL : read or write access that stalled
+event:0x11 counters:1,2 um:zero minimum:500 name:CYCLES_CACHE_STALL : cycles stalled doing read or write access
+event:0x12 counters:1,2 um:zero minimum:500 name:DCACHE_ACCESS : data cache access
+event:0x13 counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_ACCESS : cycles when data cache access is ongoing
+event:0x14 counters:1,2 um:zero minimum:500 name:DCACHE_WB : data cache line writeback
+event:0x15 counters:1,2 um:zero minimum:500 name:ACCUMULATOR_HIT : accumulator cache hit
+event:0x16 counters:1,2 um:zero minimum:500 name:ACCUMULATOR_MISS : accumulator cache miss
+event:0x17 counters:1,2 um:zero minimum:500 name:BTB_HIT : branch target buffer hit
+event:0xff counters:0 um:zero minimum:500 name:CPU_CYCLES : clock cycles counter
diff --git a/events/avr32/unit_masks b/events/avr32/unit_masks
new file mode 100644
index 0000000..37d9839
--- /dev/null
+++ b/events/avr32/unit_masks
@@ -0,0 +1,4 @@
+# AVR32 performance counters possible unit masks
+#
+name:zero type:mandatory default:0x00
+	0x00 No unit mask
diff --git a/libop/op_cpu_type.c b/libop/op_cpu_type.c
index 04647f0..023397c 100644
--- a/libop/op_cpu_type.c
+++ b/libop/op_cpu_type.c
@@ -72,6 +72,7 @@ static struct cpu_descr const cpu_descrs[MAX_CPU_TYPE] = {
 	{ "ARM MPCore", "arm/mpcore", CPU_ARM_MPCORE, 2 },
 	{ "ARM V6 PMU", "arm/armv6", CPU_ARM_V6, 3 },
 	{ "ppc64 POWER5++", "ppc64/power5++", CPU_PPC64_POWER5pp, 6 },
+	{ "AVR32", "avr32", CPU_AVR32, 3 },
 };
  
 static size_t const nr_cpu_descrs = sizeof(cpu_descrs) / sizeof(struct cpu_descr);
diff --git a/libop/op_cpu_type.h b/libop/op_cpu_type.h
index 5c9bde7..d2a624e 100644
--- a/libop/op_cpu_type.h
+++ b/libop/op_cpu_type.h
@@ -70,6 +70,7 @@ typedef enum {
 	CPU_ARM_MPCORE, /**< ARM MPCore */
 	CPU_ARM_V6, /**< ARM V6 */
 	CPU_PPC64_POWER5pp,  /**< ppc64 Power5++ family */
+	CPU_AVR32, /**< AVR32 */
 	MAX_CPU_TYPE
 } op_cpu;
 
diff --git a/libop/op_events.c b/libop/op_events.c
index 2b3c9a9..1ab4bcc 100644
--- a/libop/op_events.c
+++ b/libop/op_events.c
@@ -788,6 +788,7 @@ void op_default_event(op_cpu cpu_type, struct op_default_event_descr * descr)
 		case CPU_ARM_XSCALE2:
 		case CPU_ARM_MPCORE:
 		case CPU_ARM_V6:
+		case CPU_AVR32:
 			descr->name = "CPU_CYCLES";
 			break;
 
diff --git a/utils/ophelp.c b/utils/ophelp.c
index a5a7a02..10ed606 100644
--- a/utils/ophelp.c
+++ b/utils/ophelp.c
@@ -511,6 +511,11 @@ int main(int argc, char const * argv[])
 		       "Downloadable from http://www.freescale.com\n");
 		break;
 
+	case CPU_AVR32:
+		printf("See AVR32 Architecture Manual\n"
+			"Chapter 6: Performance Counters\n"
+			"http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf\n");
+
 	case CPU_RTC:
 		break;
 
-- 
1.5.3.4