diff options
author | Mischa Jonker <mischa.jonker@synopsys.com> | 2013-05-02 09:51:27 +0000 |
---|---|---|
committer | Peter Korsgaard <jacmet@sunsite.dk> | 2013-05-04 23:10:30 +0200 |
commit | 1ef17030d0592007c6959ce91cfc2cd5080f7bb6 (patch) | |
tree | cf22f5d862aa1e5c18702e0493b39af964a77166 /toolchain/gcc/4.4.7-arc | |
parent | cb232b31ffc75b37465995ae9223fad09bda2489 (diff) | |
download | buildroot-novena-1ef17030d0592007c6959ce91cfc2cd5080f7bb6.tar.gz buildroot-novena-1ef17030d0592007c6959ce91cfc2cd5080f7bb6.zip |
arc: add gcc for ARC
ARC needs a specific GCC for now, while we wait for ARC support to get
upstreamed.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Diffstat (limited to 'toolchain/gcc/4.4.7-arc')
-rw-r--r-- | toolchain/gcc/4.4.7-arc/fix_branch_out_of_range.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/toolchain/gcc/4.4.7-arc/fix_branch_out_of_range.patch b/toolchain/gcc/4.4.7-arc/fix_branch_out_of_range.patch new file mode 100644 index 000000000..e39b1cc2d --- /dev/null +++ b/toolchain/gcc/4.4.7-arc/fix_branch_out_of_range.patch @@ -0,0 +1,30 @@ +arc: Fix operand-out-of-range errors + +brcc_s instructions can generate operand-out-of-range errors. While a +better solution is being discussed by the compiler team, this workaround +ensures that the chances of running into this issue are low. + +Signed-off-by: Mischa Jonker <mjonker@synopsys.com> + +diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c +index ff602c0..b3ca4c4 100644 +--- a/gcc/config/arc/arc.c ++++ b/gcc/config/arc/arc.c +@@ -6565,7 +6565,7 @@ estimate required size increase). + rtx *ccp = &XEXP (XVECEXP (pat, 0, 1), 0); + + offset = branch_dest (insn) - INSN_ADDRESSES (INSN_UID (insn)); +- if ((offset >= -140 && offset < 140) ++ if ((offset >= -120 && offset < 120) + && rtx_equal_p (XEXP (op, 1), const0_rtx) + && compact_register_operand (XEXP (op, 0), VOIDmode) + && equality_comparison_operator (op, VOIDmode)) +@@ -6687,7 +6687,7 @@ estimate required size increase). + + if (op0 != cmp0) + cc_clob_rtx = gen_rtx_REG (CC_ZNmode, CC_REG); +- else if ((offset >= -140 && offset < 140) ++ else if ((offset >= -120 && offset < 120) + && rtx_equal_p (op1, const0_rtx) + && compact_register_operand (op0, VOIDmode) + && (GET_CODE (op) == EQ |