Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | fix potential problem with old etwr target | bryan newbold | 2013-06-27 | 1 | -1/+1 | |
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* | add planahead, fpga_editor, and timing targets | bryan newbold | 2013-06-27 | 1 | -13/+31 | |
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* | don't re-coregen after every little Makefile tweak | bryan newbold | 2013-06-19 | 1 | -1/+1 | |
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* | proper Makefile syntax; device-specific; mcs bitwidth | bryan newbold | 2013-06-19 | 2 | -2/+10 | |
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* | add 'make lint' verilog-build command; requires verilator | bryan newbold | 2013-06-05 | 1 | -1/+4 | |
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* | update with bnewbold's changes | bryan newbold | 2013-03-27 | 1 | -74/+63 | |
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* | initial colorization stuff | bryan newbold | 2013-03-27 | 2 | -1/+105 | |
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* | compile in multiple tb-modules (this might slow things down for you) | bryan newbold | 2013-03-21 | 1 | -2/+6 | |
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* | add .ucf file reference | bryan newbold | 2013-03-21 | 1 | -1/+1 | |
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* | isim in the background; hackisly fix deps | bryan newbold | 2013-03-20 | 1 | -4/+4 | |
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* | fixes to simulate | bryan newbold | 2013-03-20 | 1 | -8/+6 | |
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* | fix ise project pointers | bryan newbold | 2013-03-14 | 1 | -1/+1 | |
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* | improvements | bryan newbold | 2013-03-14 | 2 | -12/+32 | |
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* | some simulation stuff | bryan newbold | 2013-03-13 | 1 | -2/+38 | |
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* | move stuff around; backup | bryan newbold | 2013-03-13 | 2 | -48/+17 | |
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* | basic synthesis version of makefile | bryan newbold | 2013-03-13 | 2 | -0/+223 | |