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-rw-r--r--hdl/main_sp605.v97
1 files changed, 80 insertions, 17 deletions
diff --git a/hdl/main_sp605.v b/hdl/main_sp605.v
index 1b4f9f2..a5e25b3 100644
--- a/hdl/main_sp605.v
+++ b/hdl/main_sp605.v
@@ -1,31 +1,94 @@
-// very minimal example top-level module
+/*
+ * main_sp605.v
+ *
+ * Copyright: (C) 2013 LeafLabs, LLC
+ * License: MIT License (See LICENSE file)
+ * Author: Bryan Newbold <bnewbold@leaflabs.com>
+ * Date: May-June 2013
+ *
+ * This top-level module contains only device-specific instantiations and
+ * wiring. It connects central_core (the top-level functional module) with
+ * specific device resources (DCMs, buffers, etc) and I/O Pads.
+ *
+ * This file is for use with the Xilinx SP605 development board, for
+ * development purposes before porting to the LeafLabs WiredLeaf board.
+ *
+ * It is assumed that a 25MHz crystal is inserted into the User Clock module
+ * on the SP605, replacing the default 27MHz crystal.
+ *
+ * TODO: test this in hardware
+ */
module main (
- output reg [3:0] gpio_led,
- input wire [3:0] gpio_switch,
- input wire SYSTEMCLOCK,
- input wire PUSH_BUTTON_RESET_RAW // this is active low
- );
+ // Clocks
+ input wire reset_button,
+ input wire user_clock,
+
+ // GPIO, LEDs, Buttons
+ input wire[3:0] gpio_switch,
+ input wire[3:0] gpio_button,
+ inout wire[3:0] gpio_header,
+ output wire[3:0] gpio_led,
+
+ // UART
+ input wire uart_rx,
+ output wire uart_tx
+
+ ); // don't forget to remove trailing comma!
wire reset;
- assign reset = !PUSH_BUTTON_RESET_RAW;
+ assign reset = reset_button;
+ wire clock_25mhz;
+ assign clock_25mhz = user_clock;
+
+ reg [23:0] throb_counter = 0;
+ reg throb_led = 0;
+ assign gpio_led[0] = throb_led;
- reg [25:0] throb_counter = 0;
+ wire [7:0] rx_byte;
+ wire [7:0] tx_byte;
+ wire uart_flag;
+ assign gpio_led[1] = uart_flag;
+ simple_uart #(
+ .CLOCK_DIVIDE(651) // for (non-standard) 25MHz clock
+ ) simple_uart_inst (
+ .clk(clock_25mhz),
+ .rst(reset),
+ .rx(uart_rx),
+ .tx(uart_tx),
+ .transmit(uart_flag),
+ .tx_byte(tx_byte),
+ .received(uart_flag),
+ .rx_byte(rx_byte),
+ .is_receiving(),
+ .is_transmitting(),
+ .recv_error()
+ );
+
+ rot13 rot13_inst (
+ .clock(clock_25mhz),
+ .reset(reset),
+ .in_char(rx_byte),
+ .out_char(tx_byte)
+ );
- always @(posedge SYSTEMCLOCK) begin
+ always @(posedge clock_25mhz) begin
if (reset) begin
- gpio_led <= 7'b1111;
- throb_counter <= 26'd0;
+ throb_counter <= 0;
+ throb_led <= 0;
end else begin
- gpio_led[1:0] <= gpio_switch[1:0];
- gpio_led[2] <= gpio_switch[2] || gpio_switch[3];
- if (throb_counter >= 26'd50_000_000) begin
- gpio_led[3] <= !gpio_led[3];
- throb_counter <= 26'd0;
+ if (throb_counter >= 24'd12_500_000) begin
+ throb_led <= !throb_led;
+ throb_counter <= 24'd0;
end else begin
- throb_counter <= throb_counter + 26'd1;
+ throb_counter <= throb_counter + 24'd1;
end
end
end
+ // Tie off extra signals
+ assign gpio_led[3:2] = 0;
+ assign gpio_header = gpio_switch;
+
endmodule
+