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| author | bryan newbold <bnewbold@leaflabs.com> | 2013-10-08 20:52:46 -0400 | 
|---|---|---|
| committer | bryan newbold <bnewbold@leaflabs.com> | 2013-10-08 20:52:46 -0400 | 
| commit | 06bb61d1163f3cac14a6a4b26dd64f3cfb105c97 (patch) | |
| tree | 6ca055d015d0a699aa284c9c6da641657465fc46 | |
| parent | cd9f42590ce356b868bac76d141300cef085485e (diff) | |
| download | basic-hdl-template-06bb61d1163f3cac14a6a4b26dd64f3cfb105c97.tar.gz basic-hdl-template-06bb61d1163f3cac14a6a4b26dd64f3cfb105c97.zip  | |
don't have outputs depend on makefiles
If the Makefiles are tweaked, it's up to the user to 'make clean' if
necessary.
The way things were previously, the entire project would get rebuilt
after any trivial tweak or fix.
| -rw-r--r-- | contrib/xilinx.mk | 6 | 
1 files changed, 3 insertions, 3 deletions
diff --git a/contrib/xilinx.mk b/contrib/xilinx.mk index a0a4a3c..458d73e 100644 --- a/contrib/xilinx.mk +++ b/contrib/xilinx.mk @@ -167,7 +167,7 @@ build/$(project).prj: $(verilog_files)  optfile += $(wildcard $(project).opt)  top_module ?= $(project) -build/$(project).scr: $(optfile) $(mkfiles) ./$(project).opt +build/$(project).scr: $(optfile) ./$(project).opt  	mkdir -p build  	@echo "run" > $@  	@echo "-p $(part)" >> $@ @@ -186,7 +186,7 @@ build/$(project)_post_par.twr: build/$(project)_par.ncd  	@bash -c "$(xil_env); trce $(unconst_timing) -e $(const_timing_limit) -l $(const_timing_limit) $(project)_par.ncd $(project).pcf -o $(project)_post_par.twr $(colorize)"  	@echo "See $@ for timing analysis details" -tb/simulate_isim.prj: $(tbfiles) $(verilog_files) $(mkfiles) +tb/simulate_isim.prj: $(tbfiles) $(verilog_files)  	@rm -f $@  	@for f in $(verilog_files); do \  		echo "verilog unenclib ../$$f" >> $@; \ @@ -196,7 +196,7 @@ tb/simulate_isim.prj: $(tbfiles) $(verilog_files) $(mkfiles)  	done  	@echo "verilog unenclib $(iseenv)/ISE/verilog/src/glbl.v" >> $@ -tb/isim.compiled: tb/simulate_isim.prj $(tbfiles) $(verilog_files) $(mkfiles) +tb/isim.compiled: tb/simulate_isim.prj $(tbfiles) $(verilog_files)  	@bash -c "$(sim_env); cd ../tb/; vlogcomp -prj simulate_isim.prj $(colorize)"  	@touch tb/isim.compiled  | 
