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authorbryan newbold <bnewbold@robocracy.org>2013-05-17 11:23:32 -0400
committerbryan newbold <bnewbold@robocracy.org>2013-05-17 11:23:32 -0400
commit243685b78ea1bb83b658bded54d62fdb15be5de0 (patch)
tree0ea51750c23d576cc7a7aab6ade7f9220d5fd0e1
parentb387313bc8f7feb184ceaafa6ffc3d3c150233b2 (diff)
downloadpartmom-243685b78ea1bb83b658bded54d62fdb15be5de0.zip
partmom-243685b78ea1bb83b658bded54d62fdb15be5de0.tar.gz
clean up data; -4 speed class for spartan3a
-rw-r--r--xilinx.py4
-rw-r--r--xilinx_data/artix7.csv1
-rw-r--r--xilinx_data/virtex6.csv72
-rw-r--r--xilinx_data/virtex7.csv2
4 files changed, 39 insertions, 40 deletions
diff --git a/xilinx.py b/xilinx.py
index f188276..d7dcf99 100644
--- a/xilinx.py
+++ b/xilinx.py
@@ -37,7 +37,7 @@ def process_csv(data_path, shared_path, speed_grades, temp_grade):
for row_num in range(len(package_table)):
package = package_table[row_num][0]
for cell_num in range(len(package_table[row_num][1:])):
- cell = package_table[row_num][cell_num+1]
+ cell = package_table[row_num][cell_num+1].strip()
if cell:
for speed_grade in speed_grades:
suffix = speed_grade + package + temp_grade
@@ -87,7 +87,7 @@ today = partdb.today
spartan3a_grid = process_csv(
'xilinx_data/spartan3a.csv',
'xilinx_data/spartan3a_shared.csv',
- speed_grades=['-1', '-2'],
+ speed_grades=['-4',],
temp_grade='C')
spartan3a_grid['vendor'] = "Xilinx"
spartan3a_grid['familyname'] = "Spartan3A"
diff --git a/xilinx_data/artix7.csv b/xilinx_data/artix7.csv
index 2e0fc85..7af7145 100644
--- a/xilinx_data/artix7.csv
+++ b/xilinx_data/artix7.csv
@@ -10,7 +10,6 @@ Max Differential I/O Pairs,54,54,72,72,54,54,72,72,144,240
DSP48E1 Slices,60,120,180,240,60,120,180,240,240,740
PCI Express,0,0,0,0,1,1,1,1,1,1
AMS / XADC,1,1,1,1,1,1,1,1,1,1
-Configuration AES / HMAC Blocks,,,,,,,,,,
GTP Transceivers (6.6 Gb/s Max Rate),N/A,N/A,N/A,N/A,4,4,8,8,8,16
###,HR Pins / HD Pins (GTP),,,,,,,,,
CPG236,48/52,48/52, , , , , , , ,
diff --git a/xilinx_data/virtex6.csv b/xilinx_data/virtex6.csv
index e4a2496..c365576 100644
--- a/xilinx_data/virtex6.csv
+++ b/xilinx_data/virtex6.csv
@@ -1,36 +1,36 @@
-Part Number,XC6VLX75T,XC6VLX130T,XC6VLX195T,XC6VLX240T,XC6VLX365T,XC6VLX550T,XC6VLX760,XC6VSX315T,XC6VSX475T,XC6VHX250T,XC6VHX255T,XC6VHX380T,XC6VHX565T,
-Cost Reduction Part,XCE6VLX75T,XCE6VLX130T,XCE6VLX195T,XCE6VLX240T,XCE6VLX365T,XCE6VLX550T,XCE6VLX760,XCE6VSX315T,XCE6VSX475T,XCE6VHX250T,XCE6VHX255T,XCE6VHX380T,XCE6VHX565T,
-Slices,11640,20000,31200,37680,56880,85920,118560,49200,74400,39360,39600,59760,88560,
-Logic Cells,74496,128000,199680,241152,364032,549888,758784,314880,476160,251904,253440,382464,566784,
-CLB Flip-Flops,93120,160000,249600,455040,687360,948480,393600,595200,314880,478080,708480,,,
-Max Distributed RAM (Kb),1045,1740,3040,3650,4130,6200,8280,5090,7640,3040,3050,4570,6370,
-Block RAM/FIFO w/ ECC (36 Kbit),156,264,344,416,416,632,720,704,64,504,516,768,912,
-Total Block RAM (Kbit),5616,9504,12384,14976,14976,22752,25920,25344,38304,18144,18576,27648,32832,
-Mixed-Mode Clock Managers (MMCM),6,10,10,12,12,18,18,12,18,12,12,18,18,
-Max Single-Ended I/O Pins,360,600,600,720,720,1200,1200,720,840,320,480,720,720,
-Max Differential I/O Pairs,180,300,300,360,360,600,600,360,420,160,240,360,360,
-Total I/O Banks,9,15,15,18,18,30,30,18,21,8,12,18,18,
-DSP48E1 Slices,288,480,640,768,576,864,864,1344,2016,576,576,864,864,
-PCI Express Blocks,1,2,2,2,2,2,0,2,2,4,2,4,4,
-10/100/1000 Ethernet MAC Blocks,4,4,4,4,4,4,0,4,4,4,2,4,4,
-GTX Transceivers,12,20,20,24,24,36,0,24,36,48,24,48,48,
-GTH Transceivers,0,0,0,0,0,0,0,0,0,0,24,24,24,
-###, Pins (GTX, GTH) GTX (GTH) Pins,,,,,,,,,,,,
-FF484,"240 (8, 0)","240 (8, 0)", , , , , , , , , , , ,
-FFG484,"240 (8, 0)","240 (8, 0)", , , , , , , , , , , ,
-FF784,"360 (12, 0)","400 (12, 0)","400 (12, 0)","400 (12, 0)",, , , , , , , , ,
-FFG784,"360 (12, 0)","400 (12, 0)","400 (12, 0)","400 (12, 0)",, , , , , , , , ,
-FF1156, ,"600 (20, 0)","600 (20, 0)","600 (20, 0)","600 (20, 0)", , ,"600 (20, 0)","600 (20, 0)", , , , ,
-FFG1156, ,"600 (20, 0)","600 (20, 0)","600 (20, 0)","600 (20, 0)", , ,"600 (20, 0)","600 (20, 0)", , , , ,
-FF1759, , , ,"720 (24, 0)","720 (24, 0)","840 (36, 0)", ,"720 (24, 0)","840 (36, 0)", , , , ,
-FFG1759, , , ,"720 (24, 0)","720 (24, 0)","840 (36, 0)", ,"720 (24, 0)","840 (36, 0)", , , , ,
-FF1760, , , , , ,"1200 (0, 0)","1200 (0, 0)", , , , , , ,
-FFG1760, , , , , ,"1200 (0, 0)","1200 (0, 0)", , , , , , ,
-FF1154, , , , , , , , , ,"320 (48, 0)", ,"320 (48, 0)", ,
-FFG1154, , , , , , , , , ,"320 (48, 0)", ,"320 (48, 0)", ,
-FF1155, , , , , , , , , , ,"440 (24, 12)","440 (24, 12)", ,
-FFG1155, , , , , , , , , , ,"440 (24, 12)","440 (24, 12)", ,
-FF1923, , , , , , , , , , ,"480 (24, 24)","720 (40, 24)","720 (40, 24)",
-FFG1923, , , , , , , , , , ,"480 (24, 24)","720 (40, 24)","720 (40, 24) ",
-FF1924, , , , , , ,,,, ,,"640 (48, 24)","640 (40, 24)",
-FFG1924, , , , , , ,,,, ,,"640 (48, 24)","640 (40, 24)",
+Part Number,XC6VLX75T,XC6VLX130T,XC6VLX195T,XC6VLX240T,XC6VLX365T,XC6VLX550T,XC6VLX760,XC6VSX315T,XC6VSX475T,XC6VHX250T,XC6VHX255T,XC6VHX380T,XC6VHX565T
+Cost Reduction Part,XCE6VLX75T,XCE6VLX130T,XCE6VLX195T,XCE6VLX240T,XCE6VLX365T,XCE6VLX550T,XCE6VLX760,XCE6VSX315T,XCE6VSX475T,XCE6VHX250T,XCE6VHX255T,XCE6VHX380T,XCE6VHX565T
+Slices,11640,20000,31200,37680,56880,85920,118560,49200,74400,39360,39600,59760,88560
+Logic Cells,74496,128000,199680,241152,364032,549888,758784,314880,476160,251904,253440,382464,566784
+CLB Flip-Flops,93120,160000,249600,301440,455040,687360,948480,393600,595200,314880,316800,478080,708480
+Max Distributed RAM (Kb),1045,1740,3040,3650,4130,6200,8280,5090,7640,3040,3050,4570,6370
+Block RAM/FIFO w/ ECC (36 Kbit),156,264,344,416,416,632,720,704,64,504,516,768,912
+Total Block RAM (Kbit),5616,9504,12384,14976,14976,22752,25920,25344,38304,18144,18576,27648,32832
+Mixed-Mode Clock Managers (MMCM),6,10,10,12,12,18,18,12,18,12,12,18,18
+Max Single-Ended I/O Pins,360,600,600,720,720,1200,1200,720,840,320,480,720,720
+Max Differential I/O Pairs,180,300,300,360,360,600,600,360,420,160,240,360,360
+Total I/O Banks,9,15,15,18,18,30,30,18,21,8,12,18,18
+DSP48E1 Slices,288,480,640,768,576,864,864,1344,2016,576,576,864,864
+PCI Express Blocks,1,2,2,2,2,2,0,2,2,4,2,4,4
+10/100/1000 Ethernet MAC Blocks,4,4,4,4,4,4,0,4,4,4,2,4,4
+GTX Transceivers,12,20,20,24,24,36,0,24,36,48,24,48,48
+GTH Transceivers,0,0,0,0,0,0,0,0,0,0,24,24,24
+###," Pins (GTX, GTH)"
+FF484,"240 (8, 0)","240 (8, 0)", , , , , , , , , , ,
+FFG484,"240 (8, 0)","240 (8, 0)", , , , , , , , , , ,
+FF784,"360 (12, 0)","400 (12, 0)","400 (12, 0)","400 (12, 0)",, , , , , , , ,
+FFG784,"360 (12, 0)","400 (12, 0)","400 (12, 0)","400 (12, 0)",, , , , , , , ,
+FF1156, ,"600 (20, 0)","600 (20, 0)","600 (20, 0)","600 (20, 0)", , ,"600 (20, 0)","600 (20, 0)", , , ,
+FFG1156, ,"600 (20, 0)","600 (20, 0)","600 (20, 0)","600 (20, 0)", , ,"600 (20, 0)","600 (20, 0)", , , ,
+FF1759, , , ,"720 (24, 0)","720 (24, 0)","840 (36, 0)", ,"720 (24, 0)","840 (36, 0)", , , ,
+FFG1759, , , ,"720 (24, 0)","720 (24, 0)","840 (36, 0)", ,"720 (24, 0)","840 (36, 0)", , , ,
+FF1760, , , , , ,"1200 (0, 0)","1200 (0, 0)", , , , , ,
+FFG1760, , , , , ,"1200 (0, 0)","1200 (0, 0)", , , , , ,
+FF1154, , , , , , , , , ,"320 (48, 0)", ,"320 (48, 0)",
+FFG1154, , , , , , , , , ,"320 (48, 0)", ,"320 (48, 0)",
+FF1155, , , , , , , , , , ,"440 (24, 12)","440 (24, 12)",
+FFG1155, , , , , , , , , , ,"440 (24, 12)","440 (24, 12)",
+FF1923, , , , , , , , , , ,"480 (24, 24)","720 (40, 24)","720 (40, 24)"
+FFG1923, , , , , , , , , , ,"480 (24, 24)","720 (40, 24)","720 (40, 24)"
+FF1924, , , , , , ,,,, ,,"640 (48, 24)","640 (40, 24)"
+FFG1924, , , , , , ,,,, ,,"640 (48, 24)","640 (40, 24)"
diff --git a/xilinx_data/virtex7.csv b/xilinx_data/virtex7.csv
index d7ddcd3..0222cf1 100644
--- a/xilinx_data/virtex7.csv
+++ b/xilinx_data/virtex7.csv
@@ -17,7 +17,7 @@ GTX 12.5 Gb/s Transceivers,36,36,0,0,56,0,0,0,0,0,0
GTH 13.1 Gb/s Transceivers,0,0,28,48,0,80,80,72,96,48,72
GTZ 28.05 Gb/s Transceivers,0,0,0,0,0,0,0,0,0,8,16
SLRs,n/a,4,n/a,n/a,n/a,n/a,n/a,n/a,4,2,3
-####,"HR, HP (GTX, GTH)",,,,,,,,,,
+###,"HR, HP (GTX, GTH)",,,,,,,,,,
FFG1157,"0, 600 (20, 0)", ,"0, 600 (0, 20)","0, 600 (0, 20)","0, 600 (20, 0)", ,"0, 600 (0, 20)", , ,,
FFG1761,"100, 750 (36, 0)", ,"50, 650 (0, 28)", ,"0, 700 (28, 0)", ,"0, 850 (0, 36)", , ,,
FHG1761, ,"0, 850 (36, 0)", , , , , , , ,,