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authorMarti Bolivar <mbolivar@leaflabs.com>2011-01-26 22:05:41 -0500
committerMarti Bolivar <mbolivar@leaflabs.com>2011-01-26 22:05:41 -0500
commitf1b64e707d8aa7548954b110368a7eb46b827794 (patch)
tree176d7251bd06199ff8ba8a7a9d01745badabbb82 /libmaple/nvic.c
parente9af9d951a0341ea68ce88d7b5ee3b42b68494b6 (diff)
downloadlibrambutan-f1b64e707d8aa7548954b110368a7eb46b827794.tar.gz
librambutan-f1b64e707d8aa7548954b110368a7eb46b827794.zip
[WIP] Code review picked up some bugs/issues.
Diffstat (limited to 'libmaple/nvic.c')
-rw-r--r--libmaple/nvic.c27
1 files changed, 13 insertions, 14 deletions
diff --git a/libmaple/nvic.c b/libmaple/nvic.c
index ad816ba..155da27 100644
--- a/libmaple/nvic.c
+++ b/libmaple/nvic.c
@@ -39,9 +39,8 @@ void nvic_set_vector_table(uint32 addr, uint32 offset) {
* @param n interrupt number
*/
void nvic_irq_enable(uint32 n) {
- /* TODO: bit-banding would be faster */
- uint32 *iser = &((uint32*)NVIC_ISER0)[(n/32)];
- __write(iser, BIT(n % 32));
+ /* TODO: test */
+ __write(BITBAND_PERI(NVIC_ISER0, n), 1);
}
/**
@@ -49,20 +48,20 @@ void nvic_irq_enable(uint32 n) {
* @param n interrupt number
*/
void nvic_irq_disable(uint32 n) {
- /* TODO: bit-banding would be faster */
- uint32 *icer = &((uint32*)NVIC_ICER0)[(n/32)];
- __write(icer, BIT(n % 32));
+ /* TODO: test */
+ __write(BITBAND_PERI(NVIC_ICER0, n), 1);
}
void nvic_irq_disable_all(void) {
- /* TODO why not:
- __write(NVIC_ICER0, 0);
- __write(NVIC_ICER1, 0);
- */
- short n;
- for(n=0; n<65; n++) {
- nvic_irq_disable(n);
- }
+ /* Each ICER register contains 1 bit per interrupt. Writing a 1
+ to that bit disables the corresponding interrupt. So each of
+ the following lines disables up to 32 interrupts at a time.
+ Since low, medium, and high-density devices all have less than
+ 64 interrupts, this suffices. */
+ /* TODO: fix for connectivity line: __write(NVIC_ICER2,1),
+ requires connectivity line support in libmaple.h */
+ __write(NVIC_ICER0, 1);
+ __write(NVIC_ICER1, 1);
}
/**