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authorbryan newbold <bnewbold@leaflabs.com>2013-04-02 10:25:15 -0400
committerbryan newbold <bnewbold@leaflabs.com>2013-04-02 10:25:15 -0400
commit8bf83ef0145d2afe53d4d94f5ff5a4459fbc6637 (patch)
tree4b825dc642cb6eb9a060e54bf8d69288fbee4904 /hdl/project.v
parent0754c0f771c51d48107c5c96d79a512ce56cce0a (diff)
downloadfpga-lube-8bf83ef0145d2afe53d4d94f5ff5a4459fbc6637.tar.gz
fpga-lube-8bf83ef0145d2afe53d4d94f5ff5a4459fbc6637.zip
commit old git move
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diff --git a/hdl/project.v b/hdl/project.v
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-module project
- (
- output wire LED_output_0,
- output wire LED_output_1,
- output wire LED_output_2,
- output wire LED_output_3,
- output wire LED_output_4,
- output wire LED_output_5,
- output wire LED_output_6,
- input wire Switch_input_0,
- input wire Switch_input_1,
- input wire Switch_input_2,
- input wire Switch_input_3,
- input wire SYSTEMCLOCK,
- input wire PUSH_BUTTON_RESET_RAW //Xilinx GTP - this is active low-
- );
-
- assign LED_output_0 = 1'b0;
- assign LED_output_1 = 1'b0;
- assign LED_output_2 = 1'b0;
- assign LED_output_3 = 1'b0;
- assign LED_output_4 = 1'b0;
- assign LED_output_5 = 1'b0;
- assign LED_output_6 = 1'b0;
-
-endmodule \ No newline at end of file