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| author | Sonic Zhang <sonic.zhang@analog.com> | 2013-05-03 00:39:36 +0000 |
|---|---|---|
| committer | Peter Korsgaard <jacmet@sunsite.dk> | 2013-05-05 22:49:50 +0200 |
| commit | 66d41890ec2b76189bcd427a0cc3966ff56f9712 (patch) | |
| tree | 0eaf64a72c090c74a349b3bc55c4610f84ebbc84 /toolchain/gcc | |
| parent | 371e6dc7801cbc52cba1e8501cde3c7cd308f28a (diff) | |
| download | buildroot-novena-66d41890ec2b76189bcd427a0cc3966ff56f9712.tar.gz buildroot-novena-66d41890ec2b76189bcd427a0cc3966ff56f9712.zip | |
arch: toolchain: Introduce target CPU revision.
Adds the possibility to have a free-form CPU revision string and append it
to the target CPU. Only Blackfin actually uses this option.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Diffstat (limited to 'toolchain/gcc')
| -rw-r--r-- | toolchain/gcc/gcc-uclibc-4.x.mk | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/toolchain/gcc/gcc-uclibc-4.x.mk b/toolchain/gcc/gcc-uclibc-4.x.mk index f1803cb66..128b7abe6 100644 --- a/toolchain/gcc/gcc-uclibc-4.x.mk +++ b/toolchain/gcc/gcc-uclibc-4.x.mk @@ -90,7 +90,11 @@ ifneq ($(call qstrip,$(BR2_GCC_TARGET_ABI)),) GCC_WITH_ABI:=--with-abi=$(BR2_GCC_TARGET_ABI) endif ifneq ($(call qstrip,$(BR2_GCC_TARGET_CPU)),) -GCC_WITH_CPU:=--with-cpu=$(BR2_GCC_TARGET_CPU) +ifneq ($(call qstrip,$(BR2_GCC_TARGET_CPU_REVISION)),) +GCC_WITH_CPU:=--with-cpu=$(call qstrip,$(BR2_GCC_TARGET_CPU)-$(BR2_GCC_TARGET_CPU_REVISION)) +else +GCC_WITH_CPU:=--with-cpu=$(call qstrip,$(BR2_GCC_TARGET_CPU)) +endif endif # AVR32 GCC special configuration |