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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2013-06-30 21:29:03 +0200 |
|---|---|---|
| committer | Peter Korsgaard <jacmet@sunsite.dk> | 2013-07-03 23:00:02 +0200 |
| commit | e236fe481e5f8c4cd4984f39dc37dbf19c8d8eda (patch) | |
| tree | 3958b8ade6e50a183eb8f4298a81f495f6420912 /package/gcc/4.4.7-arc | |
| parent | 4d7c13dd5382a56045e54389550b08c32fa94550 (diff) | |
| download | buildroot-novena-e236fe481e5f8c4cd4984f39dc37dbf19c8d8eda.tar.gz buildroot-novena-e236fe481e5f8c4cd4984f39dc37dbf19c8d8eda.zip | |
toolchain: switch to using gcc through package infrastructure
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Diffstat (limited to 'package/gcc/4.4.7-arc')
| -rw-r--r-- | package/gcc/4.4.7-arc/fix_branch_out_of_range.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/package/gcc/4.4.7-arc/fix_branch_out_of_range.patch b/package/gcc/4.4.7-arc/fix_branch_out_of_range.patch new file mode 100644 index 000000000..e39b1cc2d --- /dev/null +++ b/package/gcc/4.4.7-arc/fix_branch_out_of_range.patch @@ -0,0 +1,30 @@ +arc: Fix operand-out-of-range errors + +brcc_s instructions can generate operand-out-of-range errors. While a +better solution is being discussed by the compiler team, this workaround +ensures that the chances of running into this issue are low. + +Signed-off-by: Mischa Jonker <mjonker@synopsys.com> + +diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c +index ff602c0..b3ca4c4 100644 +--- a/gcc/config/arc/arc.c ++++ b/gcc/config/arc/arc.c +@@ -6565,7 +6565,7 @@ estimate required size increase). + rtx *ccp = &XEXP (XVECEXP (pat, 0, 1), 0); + + offset = branch_dest (insn) - INSN_ADDRESSES (INSN_UID (insn)); +- if ((offset >= -140 && offset < 140) ++ if ((offset >= -120 && offset < 120) + && rtx_equal_p (XEXP (op, 1), const0_rtx) + && compact_register_operand (XEXP (op, 0), VOIDmode) + && equality_comparison_operator (op, VOIDmode)) +@@ -6687,7 +6687,7 @@ estimate required size increase). + + if (op0 != cmp0) + cc_clob_rtx = gen_rtx_REG (CC_ZNmode, CC_REG); +- else if ((offset >= -140 && offset < 140) ++ else if ((offset >= -120 && offset < 120) + && rtx_equal_p (op1, const0_rtx) + && compact_register_operand (op0, VOIDmode) + && (GET_CODE (op) == EQ |