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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-11-15 03:53:48 +0000
committerPeter Korsgaard <jacmet@sunsite.dk>2012-11-15 16:12:46 +0100
commit44c04a2b4aa998e9c52c4d30f45b1ded933b966a (patch)
tree1afb81a4dfab41d14a269c8630deab29a33d75eb /arch/Config.in.x86
parent53adfc5f4976704d426681a0404c1643db009552 (diff)
downloadbuildroot-novena-44c04a2b4aa998e9c52c4d30f45b1ded933b966a.tar.gz
buildroot-novena-44c04a2b4aa998e9c52c4d30f45b1ded933b966a.zip
arch: improve definition of gcc mtune, mcpu, etc.
As suggested by Yann E. Morin, there is a better way than our current big Config.in.common to define the gcc mtune, mcpu, march, etc. values. We can split the setting of those values in each architecture file, which makes a lot more sense. Therefore, the Config.in file now creates empty kconfig variables BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH, BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those variables are set by the individual Config.in.<arch> files. This is possible because such files are now only conditionally included depending on the top-level architecture that has been selected. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Diffstat (limited to 'arch/Config.in.x86')
-rw-r--r--arch/Config.in.x8689
1 files changed, 89 insertions, 0 deletions
diff --git a/arch/Config.in.x86 b/arch/Config.in.x86
index 4f32d7458..ef29a71f2 100644
--- a/arch/Config.in.x86
+++ b/arch/Config.in.x86
@@ -144,3 +144,92 @@ config BR2_x86_winchip2
select BR2_X86_CPU_HAS_MMX
depends on !BR2_x86_64
endchoice
+
+config BR2_ARCH
+ default "i386" if BR2_x86_i386
+ default "i486" if BR2_x86_i486
+ default "i586" if BR2_x86_i586
+ default "i586" if BR2_x86_pentium_mmx
+ default "i586" if BR2_x86_geode
+ default "i586" if BR2_x86_c3
+ default "i686" if BR2_x86_c32
+ default "i586" if BR2_x86_winchip_c6
+ default "i586" if BR2_x86_winchip2
+ default "i686" if BR2_x86_i686
+ default "i686" if BR2_x86_pentium2
+ default "i686" if BR2_x86_pentium3
+ default "i686" if BR2_x86_pentium4
+ default "i686" if BR2_x86_pentium_m
+ default "i686" if BR2_x86_pentiumpro
+ default "i686" if BR2_x86_prescott
+ default "i686" if BR2_x86_nocona && BR2_i386
+ default "i686" if BR2_x86_core2 && BR2_i386
+ default "i686" if BR2_x86_atom && BR2_i386
+ default "i686" if BR2_x86_opteron && BR2_i386
+ default "i686" if BR2_x86_opteron_sse3 && BR2_i386
+ default "i686" if BR2_x86_barcelona && BR2_i386
+ default "i686" if BR2_x86_k6
+ default "i686" if BR2_x86_k6_2
+ default "i686" if BR2_x86_athlon
+ default "i686" if BR2_x86_athlon_4
+ default "x86_64" if BR2_x86_64
+
+config BR2_ENDIAN
+ default "LITTLE"
+
+config BR2_GCC_TARGET_TUNE
+ default i386 if BR2_x86_i386
+ default i486 if BR2_x86_i486
+ default i586 if BR2_x86_i586
+ default pentium-mmx if BR2_x86_pentium_mmx
+ default i686 if BR2_x86_i686
+ default pentiumpro if BR2_x86_pentiumpro
+ default pentium-m if BR2_x86_pentium_m
+ default pentium2 if BR2_x86_pentium2
+ default pentium3 if BR2_x86_pentium3
+ default pentium4 if BR2_x86_pentium4
+ default prescott if BR2_x86_prescott
+ default nocona if BR2_x86_nocona
+ default core2 if BR2_x86_core2
+ default atom if BR2_x86_atom
+ default k8 if BR2_x86_opteron
+ default k8-sse3 if BR2_x86_opteron_sse3
+ default barcelona if BR2_x86_barcelona
+ default k6 if BR2_x86_k6
+ default k6-2 if BR2_x86_k6_2
+ default athlon if BR2_x86_athlon
+ default athlon-4 if BR2_x86_athlon_4
+ default winchip-c6 if BR2_x86_winchip_c6
+ default winchip2 if BR2_x86_winchip2
+ default c3 if BR2_x86_c3
+ default c3-2 if BR2_x86_c32
+ default geode if BR2_x86_geode
+ default generic if BR2_x86_generic
+
+config BR2_GCC_TARGET_ARCH
+ default i386 if BR2_x86_i386
+ default i486 if BR2_x86_i486
+ default i586 if BR2_x86_i586
+ default pentium-mmx if BR2_x86_pentium_mmx
+ default i686 if BR2_x86_i686
+ default pentiumpro if BR2_x86_pentiumpro
+ default pentium-m if BR2_x86_pentium_m
+ default pentium2 if BR2_x86_pentium2
+ default pentium3 if BR2_x86_pentium3
+ default pentium4 if BR2_x86_pentium4
+ default prescott if BR2_x86_prescott
+ default nocona if BR2_x86_nocona
+ default core2 if BR2_x86_core2
+ default atom if BR2_x86_atom
+ default k8 if BR2_x86_opteron
+ default k8-sse3 if BR2_x86_opteron_sse3
+ default barcelona if BR2_x86_barcelona
+ default k6 if BR2_x86_k6
+ default k6-2 if BR2_x86_k6_2
+ default athlon if BR2_x86_athlon
+ default athlon-4 if BR2_x86_athlon_4
+ default winchip-c6 if BR2_x86_winchip_c6
+ default winchip2 if BR2_x86_winchip2
+ default c3 if BR2_x86_c3
+ default c3-2 if BR2_x86_c32
+ default geode if BR2_x86_geode