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| author | Mischa Jonker <mischa.jonker@synopsys.com> | 2013-05-02 09:51:23 +0000 |
|---|---|---|
| committer | Peter Korsgaard <jacmet@sunsite.dk> | 2013-05-04 22:58:46 +0200 |
| commit | 14f48861b5cf5c45d81e4dd1130267e8ec86e5f3 (patch) | |
| tree | 10969a2fc513c58795bfedb87b960cd55bfea776 /arch/Config.in.arc | |
| parent | 93e5c7d9f2964dcee6acca94e17075f042ba1751 (diff) | |
| download | buildroot-novena-14f48861b5cf5c45d81e4dd1130267e8ec86e5f3.tar.gz buildroot-novena-14f48861b5cf5c45d81e4dd1130267e8ec86e5f3.zip | |
arc: Add ARC and ARC BE architecture
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs that
can be used from deeply embedded to high performance host applications.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Diffstat (limited to 'arch/Config.in.arc')
| -rw-r--r-- | arch/Config.in.arc | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/Config.in.arc b/arch/Config.in.arc new file mode 100644 index 000000000..60b59f031 --- /dev/null +++ b/arch/Config.in.arc @@ -0,0 +1,14 @@ +config BR2_ARCH + default "arc" if BR2_arcle + default "arceb" if BR2_arceb + +config BR2_arc + bool + default y if BR2_arcle || BR2_arceb + +config BR2_ENDIAN + default "LITTLE" if BR2_arcle + default "BIG" if BR2_arceb + +config BR2_GCC_TARGET_CPU + default "arc700" |