add artix7 and kintex7 data

9 files changed, 104 insertions, 0 deletions

diff --git a/partmom.py b/partmom.py
index 39cc670..1d89eff 100755
--- a/partmom.py
+++ b/partmom.py
@@ -15,6 +15,14 @@ app.config.from_object(__name__)
 def index():
     return render_template('index.html')
 
+@app.route('/xilinx/artix7/', methods=['GET'])
+def xilinx_artix7():
+    return render_template('grid.html', grid=xilinx.artix7_grid)
+
+@app.route('/xilinx/kintex7/', methods=['GET'])
+def xilinx_kintex7():
+    return render_template('grid.html', grid=xilinx.kintex7_grid)
+
 @app.route('/xilinx/spartan6/', methods=['GET'])
 def xilinx_spartan6():
     return render_template('grid.html', grid=xilinx.spartan6_grid)
diff --git a/templates/index.html b/templates/index.html
index cc04491..28d9400 100644
--- a/templates/index.html
+++ b/templates/index.html
@@ -4,5 +4,7 @@ Part families:
 <ul>
  <li><a href="xilinx/spartan6">xilinx/spartan6</a>
  <li><a href="xilinx/zynq7000">xilinx/zynq7000</a>
+ <li><a href="xilinx/artix7">xilinx/artix7</a>
+ <li><a href="xilinx/kintex7">xilinx/kintex7</a>
 </ul>
 {% endblock %}
diff --git a/xilinx.py b/xilinx.py
index 872b3b5..8a8a988 100644
--- a/xilinx.py
+++ b/xilinx.py
@@ -83,6 +83,23 @@ def process_csv(data_path, shared_path, speed_grades, temp_grade):
                 suffix_row=suffix_row)
 
 today = partdb.today
+
+kintex7_grid = process_csv(
+    'xilinx_data/kintex7.csv',
+    'xilinx_data/kintex7_shared.csv',
+    speed_grades=['-1', '-2'],
+    temp_grade='C') # E, I
+kintex7_grid['vendor'] = "Xilinx"
+kintex7_grid['familyname'] = "Kintex7"
+
+artix7_grid = process_csv(
+    'xilinx_data/artix7.csv',
+    'xilinx_data/artix7_shared.csv',
+    speed_grades=['-2', '-3'],
+    temp_grade='C') # E, I
+artix7_grid['vendor'] = "Xilinx"
+artix7_grid['familyname'] = "Artix7"
+
 spartan6_grid = process_csv(
     'xilinx_data/spartan6.csv',
     'xilinx_data/spartan6_shared.csv',
@@ -90,6 +107,7 @@ spartan6_grid = process_csv(
     temp_grade='C')
 spartan6_grid['vendor'] = "Xilinx"
 spartan6_grid['familyname'] = "Spartan6"
+
 zynq7000_grid = process_csv(
     'xilinx_data/zynq7000.csv',
     'xilinx_data/zynq7000_shared.csv',
diff --git a/xilinx_data/artix7.csv b/xilinx_data/artix7.csv
new file mode 100644
index 0000000..2e0fc85
--- /dev/null
+++ b/xilinx_data/artix7.csv
@@ -0,0 +1,30 @@
+Part Number,XC7A20SL,XC7A35SL,XC7A50SL,XC7A75SL,XC7A20SLT,XC7A35SLT,XC7A50SLT,XC7A75SLT,XC7A100T,XC7A200T
+Slices,2500,5142,8200,11194,2500,5142,8200,11194,15850,33650
+Logic Cells,16000,32909,52480,71642,16000,32909,52480,71642,101440,215360
+Max Distributed RAM (Kbits),208,453,688,974,208,453,688,974,1188,2888
+Block RAM/FIFO w/ ECC (36Kbits),30,65,95,125,30,65,95,125,135,365
+Total Block RAM (Kbits),1080,2340,3420,4500,1080,2340,3420,4500,4860,13140
+Clock Management Tiles (1 MMCM + 1 PLL),3,3,4,4,3,3,4,4,6,10
+Max Single-Ended I/O,216,216,300,300,216,216,300,300,300,500
+Max Differential I/O Pairs,54,54,72,72,54,54,72,72,144,240
+DSP48E1 Slices,60,120,180,240,60,120,180,240,240,740
+PCI Express,0,0,0,0,1,1,1,1,1,1
+AMS / XADC,1,1,1,1,1,1,1,1,1,1
+Configuration AES / HMAC Blocks,,,,,,,,,,
+GTP Transceivers (6.6 Gb/s Max Rate),N/A,N/A,N/A,N/A,4,4,8,8,8,16
+###,HR Pins / HD Pins (GTP),,,,,,,,,
+CPG236,48/52,48/52,       ,       ,       ,       ,       ,       ,       ,       
+CSG325,108/108,108/108,         ,         ,         ,         ,         ,         ,         ,         
+CSG484,         ,         ,144/156,144/156,         ,         ,         ,         ,         ,         
+CPG237,       ,       ,       ,       ,48/52 (1),48/52 (1),       ,       ,       ,       
+CSG326,        ,        ,        ,        ,108/77 (4),108/77 (4),108/77 (4),108/77 (4),        ,        
+CSG485,         ,         ,         ,         ,108/108 (4),108/108 (4),126/108 (6),126/108 (6),         ,         
+FGG677,         ,         ,         ,         ,         ,         ,144/156 (8),144/156 (8),         ,         
+CSG324,      ,      ,      ,      ,      ,      ,      ,      ,210/0 ,      
+FTG256,      ,      ,      ,      ,      ,      ,      ,      ,170/0 ,      
+SBG484,      ,      ,      ,      ,      ,      ,      ,      ,      ,285/0 (4)
+FGG484,      ,      ,      ,      ,      ,      ,      ,      ,285/0 (4),      
+FBG484,      ,      ,      ,      ,      ,      ,      ,      ,      ,285/0 (4)
+FGG676,      ,      ,      ,      ,      ,      ,      ,      ,300/0 (8),      
+FBG676,      ,      ,      ,      ,      ,      ,      ,      ,      ,400/0 (8)
+FFG1156,       ,       ,       ,       ,       ,       ,       ,       ,       ,500/0 (16)
diff --git a/xilinx_data/artix7.txt b/xilinx_data/artix7.txt
new file mode 100644
index 0000000..547edb5
--- /dev/null
+++ b/xilinx_data/artix7.txt
@@ -0,0 +1,11 @@
+Device,Logic Cells,Slices,Max Distributed RAM (Kb),DSP48E1 Slices,Block RAM Blocks 18Kb,Block RAM Blocks 36Kb,Block RAM Blocks Max (Kb),Clock Mgmt Tiles (CMTs),PCIe,GTPs,XADC Blocks,Total I/O Banks,Max User I/O
+XC7A20SL,16000,2500,208,60,60,30,1080,3,0,0,1,5,216
+XC7A35SL,32909,5142,453,120,130,65,2340,3,0,0,1,5,216
+XC7A50SL,52480,8200,688,180,190,95,3420,4,0,0,1,6,300
+XC7A75SL,71642,11194,974,240,250,125,4500,4,0,0,1,6,300
+XC7A20SLT,16000,2500,208,60,60,30,1080,3,1,4,1,5,216
+XC7A35SLT,32909,5142,453,120,130,65,2340,3,1,4,1,5,216
+XC7A50SLT,52480,8200,688,180,190,95,3420,4,1,8,1,6,300
+XC7A75SLT,71642,11194,974,240,250,125,4500,4,1,8,1,6,300
+XC7A100T,101440,15850,1188,240,270,135,4860,6,1,8,1,6,300
+XC7A200T,215360,33650,2888,740,730,365,13140,10,1,16,1,10,500
diff --git a/xilinx_data/artix7_shared.csv b/xilinx_data/artix7_shared.csv
new file mode 100644
index 0000000..b42639d
--- /dev/null
+++ b/xilinx_data/artix7_shared.csv
@@ -0,0 +1,2 @@
+AMS / XADC Blocks,1
+Configuration AES / HMAC Blocks,1
diff --git a/xilinx_data/kintex7.csv b/xilinx_data/kintex7.csv
new file mode 100644
index 0000000..c74348d
--- /dev/null
+++ b/xilinx_data/kintex7.csv
@@ -0,0 +1,21 @@
+Part Number,XC7K70T,XC7K160T,XC7K325T,XC7K355T,XC7K410T,XC7K420T,XC7K480T
+Cost Reduced,n/a,n/a,XCE7K325T,XCE7K355T,XCE7K410T,XCE7K420T,XCE7K480T
+Slices,10250,25350,50950,55650,63550,65150,74650
+Logic Cells,65600,162240,326080,356160,406720,416960,477760
+CLB Flip-Flops,82000,202800,407600,445200,508400,521200,597200
+Max Distributed RAM (Kb),838,2188,4000,5088,5663,5938,6788
+Block RAM/FIFO w/ ECC (36Kbit each),135,325,445,715,795,835,955
+Total Block RAM (Kbit),4860,11700,16020,25740,28620,30060,34380
+Clock Mgmt Tiles (1 MMCM + 1 PLL),6,8,10,6,10,8,8
+Max Single-Eded I/O,300,400,500,300,500,400,400
+Max Differential I/O Pairs,144,192,240,144,240,192,192
+DSP48E1 Slices,240,600,840,1440,1540,1680,1920
+GTX 12.5 Gb/s Transceivers (Max),8,8,16,24,16,32,32
+###,3.3v Pins / 1.8v Pins,,,,,,
+FBG484,185/100 (4),185/100 (4),,,,,
+FBG676,200/100 (8),250/150 (8),250/150 (8),,250/150 (8),,
+FFG676,,250/150 (8),250/150 (8),,250/150 (8),,
+FBG900,,,350/150 (16),,350/150 (16),,
+FFG900,,,350/150 (16),,350/150 (16),,
+FFG901,,,,300/0 (24),,380/0 (28),380/0 (28)
+FFG1156,,,,,,400/0 (32),400/0 (32)
diff --git a/xilinx_data/kintex7.txt b/xilinx_data/kintex7.txt
new file mode 100644
index 0000000..8c8e9eb
--- /dev/null
+++ b/xilinx_data/kintex7.txt
@@ -0,0 +1,9 @@
+Device, Logic Cells, Slices, Max Distributed RAM (Kb), DSP48E1 Slices, Block RAM Blocks 18Kb, Block RAM Blocks 36Kb, Block RAM Blocks Max (Kb), Clock Mgmt Tiles (CMTs), PCIe, GTXs XADC Blocks, Total I/O Banks, Max User I/O
+XC7K70T,65600,10250,838,240,270,135,4860,6,1,8,1,6,300
+XC7K160T,162240,25350,2188,600,650,325,11700,8,1,8,1,8,400
+XC7K325T,326080,50950,4000,840,890,445,16020,10,1,16,1,10,500
+XC7K355T,356160,55650,5088,1440,1430,715,25740,6,1,24,1,6,300
+XC7K410T,406720,63550,5663,1540,1590,795,28620,10,1,16,1,10,500
+XC7K420T,416960,65150,5938,1680,1670,835,30060,8,1,32,1,8,400
+XC7K480T,477760,74650,6788,1920,1910,955,34380,8,1,32,1,8,400
+
diff --git a/xilinx_data/kintex7_shared.csv b/xilinx_data/kintex7_shared.csv
new file mode 100644
index 0000000..e6d371c
--- /dev/null
+++ b/xilinx_data/kintex7_shared.csv
@@ -0,0 +1,3 @@
+PCI Express,1
+AMS / XADC Blocks,1
+Configuration AES / HMAC Blocks,1