--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -25,6 +25,21 @@ config SMDK2440_CPU2442
 	depends on ARCH_S3C2440
 	select CPU_S3C2442
 
+config MACH_NEO1973_GTA02
+	bool "Openmoko Freerunner GSM Phone (GTA02 Hardware)"
+	select CPU_S3C2442
+	select MFD_PCF50633
+	select PCF50633_GPIO
+	select I2C
+	select POWER_SUPPLY
+	select MACH_NEO1973
+	select S3C_PWM
+	select FIQ
+	select S3C_DEV_USB_HOST
+	select S3C24XX_GPIO_EXTRA64
+	help
+	   Say Y here if you are using the Openmoko Freerunner GSM Phone
+
 
 endmenu
 
--- a/arch/arm/mach-s3c2442/Makefile
+++ b/arch/arm/mach-s3c2442/Makefile
@@ -9,8 +9,11 @@ obj-m				:=
 obj-n				:=
 obj-				:=
 
+obj-$(CONFIG_S3C2440_C_FIQ)	+= fiq_c_isr.o
+
 obj-$(CONFIG_CPU_S3C2442)	+= s3c2442.o
 obj-$(CONFIG_CPU_S3C2442)	+= clock.o
+obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
 
 # Machine support
 
--- a/arch/arm/mach-s3c2410/include/mach/irqs.h
+++ b/arch/arm/mach-s3c2410/include/mach/irqs.h
@@ -153,9 +153,9 @@
 #define IRQ_S3C2443_AC97	S3C2410_IRQSUB(28)
 
 #ifdef CONFIG_CPU_S3C2443
-#define NR_IRQS (IRQ_S3C2443_AC97+1)
+#define _NR_IRQS (IRQ_S3C2443_AC97+1)
 #else
-#define NR_IRQS (IRQ_S3C2440_AC97+1)
+#define _NR_IRQS (IRQ_S3C2440_AC97+1)
 #endif
 
 /* compatibility define. */
@@ -167,4 +167,33 @@
 /* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */
 #define FIQ_START		IRQ_EINT0
 
+
+/*
+ * The next 16 interrupts are for board specific purposes.  Since
+ * the kernel can only run on one machine at a time, we can re-use
+ * these.  If you need more, increase IRQ_BOARD_END, but keep it
+ * within sensible limits.
+ */
+#define IRQ_BOARD_START         _NR_IRQS
+#define IRQ_BOARD_END           (_NR_IRQS + 10)
+
+#if defined(CONFIG_MACH_NEO1973_GTA02)
+#define NR_IRQS                 (IRQ_BOARD_END)
+#else
+#define NR_IRQS                 (IRQ_BOARD_START)
+#endif
+
+/* Neo1973 GTA02 interrupts */
+#define NEO1973_GTA02_IRQ(x)    (IRQ_BOARD_START + (x))
+#define IRQ_GLAMO(x)            NEO1973_GTA02_IRQ(x)
+#define IRQ_GLAMO_HOSTBUS       IRQ_GLAMO(0)
+#define IRQ_GLAMO_JPEG          IRQ_GLAMO(1)
+#define IRQ_GLAMO_MPEG          IRQ_GLAMO(2)
+#define IRQ_GLAMO_MPROC1        IRQ_GLAMO(3)
+#define IRQ_GLAMO_MPROC0        IRQ_GLAMO(4)
+#define IRQ_GLAMO_CMDQUEUE      IRQ_GLAMO(5)
+#define IRQ_GLAMO_2D            IRQ_GLAMO(6)
+#define IRQ_GLAMO_MMC           IRQ_GLAMO(7)
+#define IRQ_GLAMO_RISC          IRQ_GLAMO(8)
+
 #endif /* __ASM_ARCH_IRQ_H */