From ed225910f0e062d9c28d5cf216f97b3cf457a8c5 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Mon, 21 Nov 2011 00:55:49 +0100 Subject: [PATCH 58/81] MIPS: BCM63XX: wire up the HS SPI controller for BCM6362 Signed-off-by: Jonas Gorski --- arch/mips/bcm63xx/clk.c | 2 ++ arch/mips/bcm63xx/dev-hsspi.c | 7 +++++-- .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 1 + 3 files changed, 8 insertions(+), 2 deletions(-) --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -218,6 +218,8 @@ static void hsspi_set(struct clk *clk, i if (BCMCPU_IS_6328()) mask = CKCTL_6328_HSSPI_EN; + else if (BCMCPU_IS_6362()) + mask = CKCTL_6362_HSSPI_EN; else return; --- a/arch/mips/bcm63xx/dev-hsspi.c +++ b/arch/mips/bcm63xx/dev-hsspi.c @@ -43,7 +43,7 @@ static struct platform_device bcm63xx_hs int __init bcm63xx_hsspi_register(void) { - if (!BCMCPU_IS_6328()) + if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362()) return -ENODEV; spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); @@ -51,7 +51,10 @@ int __init bcm63xx_hsspi_register(void) spi_resources[0].end += RSET_HSSPI_SIZE - 1; spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI); - spi_pdata.speed_hz = HSSPI_PLL_HZ_6328; + if (BCMCPU_IS_6328()) + spi_pdata.speed_hz = HSSPI_PLL_HZ_6328; + else + spi_pdata.speed_hz = HSSPI_PLL_HZ; return platform_device_register(&bcm63xx_hsspi_device); } --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h @@ -16,6 +16,7 @@ struct bcm63xx_hsspi_pdata { #define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o)) #define HSSPI_PLL_HZ_6328 133333333 +#define HSSPI_PLL_HZ 400000000 #define HSSPI_BUFFER_LEN 512