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author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-10-29 17:29:38 +0000 |
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committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-10-29 17:29:38 +0000 |
commit | d126f267d184f7ad25f4b91602d354fb6e984c17 (patch) | |
tree | 22008d1f22874753a2d422ca6ed4ee44bca073b5 /target | |
parent | 3ca4f7b2f149df404d9ea09d8a076d8d8ed29329 (diff) | |
download | openwrt-d126f267d184f7ad25f4b91602d354fb6e984c17.tar.gz openwrt-d126f267d184f7ad25f4b91602d354fb6e984c17.zip |
AA: ar71xx: fix link speed between AR7242 and AR8327 on the RB750GL/RB751G boards
Bacport of r33993.
The default pll_1000 value had to be changed
in order to make it working.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/branches/attitude_adjustment@33994 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target')
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c index bee8bdf9c..71d48679d 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c @@ -186,7 +186,7 @@ static struct ar8327_platform_data rb750gr3_ar8327_data = { .pad0_cfg = &rb750gr3_ar8327_pad0_cfg, .cpuport_cfg = { .force_link = 1, - .speed = AR8327_PORT_SPEED_100, + .speed = AR8327_PORT_SPEED_1000, .duplex = 1, .txpause = 1, .rxpause = 1, @@ -261,6 +261,7 @@ static void __init rb750gr3_setup(void) ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ath79_eth0_data.phy_mask = BIT(0); + ath79_eth0_pll_data.pll_1000 = 0x62000000; ath79_register_eth(0); |