branch Attitude Adjustment

git-svn-id: svn://svn.openwrt.org/openwrt/branches/attitude_adjustment@33625 3c298f89-4303-0410-b956-a3cf2f4a3e73

3 files changed, 358 insertions, 0 deletions

diff --git a/target/linux/mcs814x/files-3.3/arch/arm/boot/dts/dlan-usb-extender.dts b/target/linux/mcs814x/files-3.3/arch/arm/boot/dts/dlan-usb-extender.dts
new file mode 100644
index 000000000..c8611deab
--- /dev/null
+++ b/target/linux/mcs814x/files-3.3/arch/arm/boot/dts/dlan-usb-extender.dts
@@ -0,0 +1,68 @@
+/*
+ * dlan-usb-extender.dts - Device Tree file for Devolo dLAN USB Extender
+ *
+ * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
+ *
+ * Licensed under GPLv2
+ */
+
+/dts-v1/;
+/include/ "mcs8140.dtsi"
+
+/ {
+	model = "Devolo dLAN USB Extender";
+	compatible = "devolo,dlan-usb-extender", "moschip,mcs8140", "moschip,mcs814x";
+
+	chosen {
+		bootargs = "mem=16M console=ttyS0,57600 earlyprintk";
+	};
+
+	ahb {
+		vci {
+
+			adc {
+				sdram: memory@0,0 {
+					reg = <0 0 0x1000000>;
+				};
+
+				nor: flash@7,0 {
+
+					partition@0 {
+						label = "ArmBoot";
+						reg = <0 0x30000>;
+					};
+					partition@30000 {
+						label = "Config1";
+						reg = <0x30000 0x10000>;
+					};
+					partition@40000 {
+						label = "Config2";
+						reg = <0x40000 0x10000>;
+					};
+					partition@50000 {
+						label = "kernel";
+						reg = <0x50000 0x100000>;
+					};
+					partition@150000 {
+						label = "rootfs";
+						reg = <0x150000 0x3C0000>;
+					};
+					partition@50001 {
+						label = "linux";
+						reg = <0x50000 0x4C0000>;
+					};
+				};
+			};
+
+			leds {
+				compatible = "gpio-leds";
+
+				usb {
+					label = "dlan-usb-extender:green:usb";
+					gpios = <&gpio 19 0>;	// gpio 19 active high
+				};
+			};
+		};
+	};
+};
+
diff --git a/target/linux/mcs814x/files-3.3/arch/arm/boot/dts/mcs8140.dtsi b/target/linux/mcs814x/files-3.3/arch/arm/boot/dts/mcs8140.dtsi
new file mode 100644
index 000000000..ad52d9277
--- /dev/null
+++ b/target/linux/mcs814x/files-3.3/arch/arm/boot/dts/mcs8140.dtsi
@@ -0,0 +1,207 @@
+/*
+ * mcs8140.dtsi - Device Tree Include file for Moschip MCS8140 family SoC
+ *
+ * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
+ *
+ * Licensed under GPLv2.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	model = "Moschip MCS8140 family SoC";
+	compatible = "moschip,mcs8140";
+	interrupt-parent = <&intc>;
+
+	aliases {
+		serial0 = &uart0;
+		eth0 = &eth0;
+	};
+
+	cpus {
+		cpu@0 {
+			compatible = "arm,arm926ejs";
+		};
+	};
+
+	ahb {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		vci {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			eth0: ethernet@40084000 {
+				compatible = "moschip,nuport-mac";
+				reg = <0x40084000 0xd8		// mac
+					0x40080000 0x58>;	// dma channels
+				interrupts = <4 5 29>;	/* tx, rx, link */
+				nuport-mac,buffer-shifting;
+				nuport-mac,link-activity = <0>;
+			};
+
+			tso@40088000 {
+				reg = <0x40088000 0x1c>;
+				interrupts = <7>;
+			};
+
+			i2s@4008c000 {
+				compatible = "moschip,mcs814x-i2s";
+				reg = <0x4008c000 0x18>;
+				interrupts = <8>;
+			};
+
+			ipsec@40094000 {
+				compatible = "moschip,mcs814x-ipsec";
+				reg = <0x40094000 0x1d8>;
+				interrupts = <16>;
+			};
+
+			rng@4009c000 {
+				compatible = "moschip,mcs814x-rng";
+				reg = <0x4009c000 0x8>;
+			};
+
+			memc@400a8000 {
+				reg = <0x400a8000 0x58>;
+			};
+
+			list-proc@400ac0c0 {
+				reg = <0x400ac0c0 0x38>;
+				interrupts = <19 27>;		// done, error
+			};
+
+			pci@400b0000 {
+				compatible = "moschip,mcs8140-pci", "moschip,mcs814x-pci";
+				reg = <0x400b0000 0x44		// PCI master
+					0x400d8000 0xe4>;	// EEPROM emulator
+				interrupts = <25>;		// abort interrupt
+				status = "disabled";
+				#address-cells = <3>;
+				#size-cells = <2>;
+
+				ranges = <0x01000000 0 0x80000000 0x80000000 0 0x04000000   // IO
+					  0x42000000 0 0x90000000 0x90000000 0 0x20000000   // non-prefetch
+					  0x02000000 0 0xb0000000 0xb0000000 0 0x10000000>; // prefecth
+
+				#interrupt-cells = <1>;
+				interrupt-map-mask = <>;
+				interrupt-map = <0 0 0 1 &intc 22 0
+						 0 0 0 2 &intc 23 0
+						 0 0 0 3 &intc 24 0
+						 0 0 0 4 &intc 26 0>;
+			};
+
+			gpio: gpio@400d0000 {
+				compatible = "moschip,mcs814x-gpio";
+				reg = <0x400d0000 0x670>;
+				interrupts = <10>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				num-gpios = <20>;
+			};
+
+			eepio: gpio@400d4000 {
+				compatible = "moschip,mcs814x-gpio";
+				reg = <0x400d4000 0x470>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				num-gpios = <4>;
+			};
+
+			uart0: serial@400dc000 {
+				compatible = "ns16550";
+				reg = <0x400dc000 0x20>;
+				clock-frequency = <50000000>;
+				reg-shift = <2>;
+				interrupts = <21>;
+				status = "okay";
+			};
+
+			intc: interrupt-controller@400e4000 {
+				#interrupt-cells = <1>;
+				compatible = "moschip,mcs814x-intc";
+				interrupt-controller;
+				interrupt-parent;
+				reg = <0x400e4000 0x48>;
+			};
+
+			m2m@400e8000 {
+				reg = <0x400e8000 0x24>;
+				interrupts = <17>;
+			};
+
+			eth-filters@400ec000 {
+				reg = <0x400ec000 0x80>;
+			};
+
+			timer: timer@400f800c {
+				compatible = "moschip,mcs814x-timer";
+				interrupts = <0>;
+				reg = <0x400f800c 0x8>;
+			};
+
+			watchdog@400f8014 {
+				compatible = "moschip,mcs814x-wdt";
+				reg = <0x400f8014 0x8>;
+			};
+
+			adc {
+				compatible = "simple-bus";
+				#address-cells = <2>;
+				#size-cells = <1>;
+				// 8 64MB chip-selects
+				ranges = <0 0 0x00000000 0x4000000	// sdram
+					  1 0 0x04000000 0x4000000	// sdram
+					  2 0 0x08000000 0x4000000	// reserved
+					  3 0 0x0c000000 0x4000000	// flash/localbus
+					  4 0 0x10000000 0x4000000	// flash/localbus
+					  5 0 0x14000000 0x4000000	// flash/localbus
+					  6 0 0x18000000 0x4000000	// flash/localbus
+					  7 0 0x1c000000 0x4000000>;	// flash/localbus
+
+				sdram: memory@0,0 {
+					reg = <0 0 0>;
+				};
+
+				nor: flash@7,0 {
+					reg = <7 0 0x4000000>;
+					compatible = "cfi-flash";
+					bank-width = <1>;		// 8-bit external flash
+					#address-cells = <1>;
+					#size-cells = <1>;
+                                };
+                        };
+
+			usb0: ehci@400fc000 {
+				compatible = "moschip,mcs814x-ehci", "usb-ehci";
+				reg = <0x400fc000 0x74>;
+				interrupts = <2>;
+			};
+
+			usb1: ohci@400fd000 {
+				compatible = "moschip,mcs814x-ohci", "ohci-le";
+				reg = <0x400fd000 0x74>;
+				interrupts = <11>;
+			};
+
+			usb2: ohci@400fe000 {
+				compatible = "moschip,mcs814x-ohci", "ohci-le";
+				reg = <0x400fe000 0x74>;
+				interrupts = <12>;
+			};
+
+			usb3: otg@400ff000 {
+				compatible = "moschip,msc814x-otg", "usb-otg";
+				reg = <0x400ff000 0x1000>;
+				interrupts = <13>;
+			};
+		};
+
+	};
+};
diff --git a/target/linux/mcs814x/files-3.3/arch/arm/boot/dts/rbt-832.dts b/target/linux/mcs814x/files-3.3/arch/arm/boot/dts/rbt-832.dts
new file mode 100644
index 000000000..cc7fab8ed
--- /dev/null
+++ b/target/linux/mcs814x/files-3.3/arch/arm/boot/dts/rbt-832.dts
@@ -0,0 +1,83 @@
+/*
+ * rbt-832.dts - Device Tree file for Tigal RBT-832
+ *
+ * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
+ *
+ * Licensed under GPLv2
+ */
+
+/dts-v1/;
+/include/ "mcs8140.dtsi"
+
+/ {
+	model = "Tigal RBT-832";
+	compatible = "tigal,rbt-832", "moschip,mcs8140", "moschip,mcs814x";
+
+	chosen {
+		bootargs = "mem=32M console=ttyS0,115200 earlyprintk";
+	};
+
+	ahb {
+		vci {
+			eth0: ethernet@40084000 {
+				nuport-mac,link-activity = <0x01>;
+			};
+
+			adc {
+				sdram: memory@0,0 {
+					reg = <0 0 0x2000000>;
+				};
+
+				nor: flash@7,0 {
+
+					partition@0 {
+						label = "ArmBoot";
+						reg = <0 0x40000>;
+					};
+					partition@30000 {
+						label = "Enviroment";
+						reg = <0x40000 0x20000>;
+					};
+					partition@50000 {
+						label = "bZimage";
+						reg = <0x60000 0x1a0000>;
+					};
+					partition@150000 {
+						label = "UserFS";
+						reg = <0x200000 0x600000>;
+					};
+				};
+			};
+
+			leds {
+				compatible = "gpio-leds";
+
+				ethernet {
+					label = "rbt-832:red:ethernet";
+					gpios = <&gpio 0 0>;	// gpio 0 active high
+				};
+
+				usb0 {
+					label = "rbt-832:red:usb0";
+					gpios = <&gpio 4 0>;	// gpio 4 active high
+				};
+
+				usb1 {
+					label = "rbt-832:red:usb1";
+					gpios = <&gpio 3 0>;	// gpio 3 active high
+				};
+
+				usb2 {
+					label = "rbt-832:red:usb2";
+					gpios = <&gpio 2 0>;	// gpio 2 active high
+				};
+
+				usb3 {
+					label = "rbt-832:red:usb3";
+					gpios = <&gpio 1 0>;	// gpio 1 active high
+				};
+			};
+		};
+	};
+};
+