branch Attitude Adjustment

git-svn-id: svn://svn.openwrt.org/openwrt/branches/attitude_adjustment@33625 3c298f89-4303-0410-b956-a3cf2f4a3e73

84 files changed, 6230 insertions, 0 deletions

diff --git a/target/linux/adm5120/files/arch/mips/adm5120/Kconfig b/target/linux/adm5120/files/arch/mips/adm5120/Kconfig
new file mode 100644
index 000000000..be35a8f72
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/Kconfig
@@ -0,0 +1,197 @@
+if ADM5120
+
+menu "ADM5120 Board selection"
+
+config ADM5120_MACH_CAS_771
+	bool "Cellvision CAS-771/771W support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_CELLVISION
+	default y
+
+config ADM5120_MACH_NFS_101
+	bool "Cellvision NFS-101U/101WU support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_CELLVISION
+	default y
+
+config ADM5120_MACH_NP27G
+	bool "Compex NP27G support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_COMPEX
+	default y
+
+config ADM5120_MACH_NP28G
+	bool "Compex NP28G support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_COMPEX
+	default y
+
+config ADM5120_MACH_WP54
+	bool "Compex WP54 family support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_COMPEX
+	default y
+
+config ADM5120_MACH_EB_214A
+	bool "EB-214A support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_GENERIC
+	default y
+
+config ADM5120_MACH_BR_6104K
+	bool "Edimax BR-6104K support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_OEM_EDIMAX
+	default y
+
+config ADM5120_MACH_BR_6104KP
+	bool "Edimax BR-6104KP support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_OEM_EDIMAX
+	default y
+
+config ADM5120_MACH_BR_61X4WG
+	bool "Edimax BR-6104WG/6114WG support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_EDIMAX
+	default y
+
+config ADM5120_MACH_EASY5120_RT
+	bool "Infineon EASY 5120-RT Reference Board support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_INFINEON
+	default y
+
+config ADM5120_MACH_EASY5120_WVOIP
+	bool "Infineon EASY 5120-WVoIP Reference Board support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_INFINEON
+	default y
+
+config ADM5120_MACH_EASY5120P_ATA
+	bool "Infineon EASY 5120P-ATA Reference Board support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_OEM_INFINEON
+	default y
+
+config ADM5120_MACH_EASY83000
+	bool "Infineon EASY 83000 Reference Board support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_OEM_INFINEON
+	default y
+
+config ADM5120_MACH_RB_11X
+	bool "MikroTik RouterBOARD 111/112 support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_MIKROTIK
+	default y
+
+config ADM5120_MACH_RB_133
+	bool "MikroTik RouterBOARD 133 support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_MIKROTIK
+	default y
+
+config ADM5120_MACH_RB_133C
+	bool "MikroTik RouterBOARD 133C support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_MIKROTIK
+	default y
+
+config ADM5120_MACH_RB_150
+	bool "MikroTik RouterBOARD 150 support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_OEM_MIKROTIK
+	default y
+
+config ADM5120_MACH_RB_153
+	bool "MikroTik RouterBOARD 153 support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_MIKROTIK
+	default y
+
+config ADM5120_MACH_RB_192
+	bool "MikroTik RouterBOARD 192 support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_MIKROTIK
+	default y
+
+config ADM5120_MACH_PMUGW
+	bool "Motorola Powerline MU Gateway"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_MOTOROLA
+	default y
+
+config ADM5120_MACH_5GXI
+	bool "OSBRiDGE 5GXi/5XLi support"
+	depends on CPU_LITTLE_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_OSBRIDGE
+	default y
+
+config ADM5120_MACH_P_334WT
+	bool "ZyXEL Prestige 334WT"
+	depends on CPU_BIG_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_ZYXEL
+	default y
+
+config ADM5120_MACH_P_335
+	bool "ZyXEL Prestige 335/335WT"
+	depends on CPU_BIG_ENDIAN
+	select ADM5120_SOC_BGA
+	select ADM5120_OEM_ZYXEL
+	default y
+
+endmenu
+
+config ADM5120_SOC_BGA
+	select HW_HAS_PCI
+	def_bool n
+
+config ADM5120_OEM_CELLVISION
+	def_bool n
+
+config ADM5120_OEM_COMPEX
+	def_bool n
+
+config ADM5120_OEM_EDIMAX
+	def_bool n
+
+config ADM5120_OEM_GENERIC
+	def_bool n
+
+config ADM5120_OEM_INFINEON
+	def_bool n
+
+config ADM5120_OEM_MIKROTIK
+	def_bool n
+
+config ADM5120_OEM_MOTOROLA
+	def_bool n
+
+config ADM5120_OEM_OSBRIDGE
+	def_bool n
+
+config ADM5120_OEM_ZYXEL
+	def_bool n
+
+config ARM_AMBA
+	def_bool y
+
+endif
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/Platform b/target/linux/adm5120/files/arch/mips/adm5120/Platform
new file mode 100644
index 000000000..0c9edf218
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/Platform
@@ -0,0 +1,19 @@
+#
+# Infineon/ADMtek ADM5120
+#
+
+platform-$(CONFIG_ADM5120)			+= adm5120/common/
+
+platform-$(CONFIG_ADM5120_OEM_CELLVISION)	+= adm5120/cellvision/
+platform-$(CONFIG_ADM5120_OEM_COMPEX)		+= adm5120/compex/
+platform-$(CONFIG_ADM5120_OEM_EDIMAX)		+= adm5120/edimax/
+platform-$(CONFIG_ADM5120_OEM_GENERIC)		+= adm5120/generic/
+platform-$(CONFIG_ADM5120_OEM_INFINEON)		+= adm5120/infineon/
+platform-$(CONFIG_ADM5120_OEM_MIKROTIK)		+= adm5120/mikrotik/
+platform-$(CONFIG_ADM5120_OEM_MOTOROLA)		+= adm5120/motorola/
+platform-$(CONFIG_ADM5120_OEM_OSBRIDGE)		+= adm5120/osbridge/
+platform-$(CONFIG_ADM5120_OEM_ZYXEL)		+= adm5120/zyxel/
+
+cflags-$(CONFIG_ADM5120)			+= -I$(srctree)/arch/mips/include/asm/mach-adm5120
+libs-$(CONFIG_ADM5120)				+= arch/mips/adm5120/prom/
+load-$(CONFIG_ADM5120)				+= 0xffffffff80001000
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/cellvision/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/Makefile
new file mode 100644
index 000000000..a949fc9f6
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/Makefile
@@ -0,0 +1,4 @@
+obj-y	+= cellvision.o
+
+obj-$(CONFIG_ADM5120_MACH_CAS_771)	+= cas-771.o
+obj-$(CONFIG_ADM5120_MACH_NFS_101)	+= nfs-101.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/cellvision/cas-771.c b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/cas-771.c
new file mode 100644
index 000000000..5033e0246
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/cas-771.c
@@ -0,0 +1,37 @@
+/*
+ *  Cellvision/SparkLAN CAS-771/771W support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "cellvision.h"
+
+static struct adm5120_pci_irq cas771_pci_irqs[] __initdata = {
+	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
+	PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI1),
+	PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2)
+};
+
+static struct gpio_led cas771_gpio_leds[] __initdata = {
+	GPIO_LED_STD(ADM5120_GPIO_PIN0, "cam_flash",	NULL),
+	/* GPIO PIN3 is the reset */
+	GPIO_LED_STD(ADM5120_GPIO_PIN6, "access",	NULL),
+	GPIO_LED_STD(ADM5120_GPIO_P0L1, "status",	NULL),
+	GPIO_LED_STD(ADM5120_GPIO_P0L2, "diag",		NULL),
+};
+
+static void __init cas771_setup(void)
+{
+	cas7xx_setup();
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(cas771_gpio_leds),
+					cas771_gpio_leds);
+	adm5120_pci_set_irq_map(ARRAY_SIZE(cas771_pci_irqs), cas771_pci_irqs);
+}
+
+MIPS_MACHINE(MACH_ADM5120_CAS771, "CAS-771", "Cellvision CAS-771/771W",
+	     cas771_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/cellvision/cellvision.c b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/cellvision.c
new file mode 100644
index 000000000..a7cedf03b
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/cellvision.c
@@ -0,0 +1,147 @@
+/*
+ *  Cellvision/SparkLAN boards
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "cellvision.h"
+
+#include <prom/admboot.h>
+
+#define CELLVISION_GPIO_FLASH_A20	ADM5120_GPIO_PIN5
+#define CELLVISION_GPIO_DEV_MASK	(1 << CELLVISION_GPIO_FLASH_A20)
+
+#define CELLVISION_CONFIG_OFFSET	0x8000
+#define CELLVISION_CONFIG_SIZE		0x1000
+
+static struct mtd_partition cas6xx_partitions[] = {
+	{
+		.name	= "admboot",
+		.offset	= 0,
+		.size	= 32*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "config",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 32*1024,
+	} , {
+		.name	= "nvfs1",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 64*1024,
+	} , {
+		.name	= "nvfs2",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 64*1024,
+	} , {
+		.name	= "firmware",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= MTDPART_SIZ_FULL,
+	}
+};
+
+static struct mtd_partition cas7xx_partitions[] = {
+	{
+		.name	= "admboot",
+		.offset	= 0,
+		.size	= 32*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "config",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 32*1024,
+	} , {
+		.name	= "nvfs",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 128*1024,
+	} , {
+		.name	= "firmware",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= MTDPART_SIZ_FULL,
+	}
+};
+
+static void switch_bank_gpio5(unsigned bank)
+{
+	switch (bank) {
+	case 0:
+		gpio_set_value(CELLVISION_GPIO_FLASH_A20, 0);
+		break;
+	case 1:
+		gpio_set_value(CELLVISION_GPIO_FLASH_A20, 1);
+		break;
+	}
+}
+
+static void __init cellvision_flash_setup(void)
+{
+	/* setup flash A20 line */
+	gpio_request(CELLVISION_GPIO_FLASH_A20, NULL);
+	gpio_direction_output(CELLVISION_GPIO_FLASH_A20, 0);
+
+	adm5120_flash0_data.switch_bank = switch_bank_gpio5;
+	adm5120_add_device_flash(0);
+}
+
+void __init cellvision_mac_setup(void)
+{
+	u8 mac_base[6];
+	int err;
+
+	err = admboot_get_mac_base(CELLVISION_CONFIG_OFFSET,
+				   CELLVISION_CONFIG_SIZE, mac_base);
+
+	if ((err) || !is_valid_ether_addr(mac_base))
+		random_ether_addr(mac_base);
+
+	adm5120_setup_eth_macs(mac_base);
+}
+
+void __init cas6xx_flash_setup(void)
+{
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(cas6xx_partitions);
+	adm5120_flash0_data.parts = cas6xx_partitions;
+
+	cellvision_flash_setup();
+}
+
+void __init cas7xx_flash_setup(void)
+{
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(cas7xx_partitions);
+	adm5120_flash0_data.parts = cas7xx_partitions;
+
+	cellvision_flash_setup();
+}
+
+void __init cas6xx_setup(void)
+{
+	cas6xx_flash_setup();
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+	adm5120_add_device_switch(1, NULL);
+}
+
+MIPS_MACHINE(MACH_ADM5120_CAS630, "CAS-630", "Cellvision CAS-630/630W",
+	     cas6xx_setup);
+MIPS_MACHINE(MACH_ADM5120_CAS670, "CAS-670", "Cellvision CAS-670/670W",
+	     cas6xx_setup);
+
+void __init cas7xx_setup(void)
+{
+	cas7xx_flash_setup();
+	cellvision_mac_setup();
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+	adm5120_add_device_switch(1, NULL);
+}
+
+MIPS_MACHINE(MACH_ADM5120_CAS700, "CAS-700", "Cellvision CAS-700/700W",
+	     cas7xx_setup);
+MIPS_MACHINE(MACH_ADM5120_CAS790, "CAS-790", "Cellvision CAS-790",
+	     cas7xx_setup);
+MIPS_MACHINE(MACH_ADM5120_CAS861, "CAS-861", "Cellvision CAS-861/861W",
+	     cas7xx_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/cellvision/cellvision.h b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/cellvision.h
new file mode 100644
index 000000000..2b55ebf76
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/cellvision.h
@@ -0,0 +1,28 @@
+/*
+ *  Cellvision/SparkLAN boards
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/etherdevice.h>
+
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+
+extern void cellvision_mac_setup(void) __init;
+
+extern void cas6xx_flash_setup(void) __init;
+extern void cas7xx_flash_setup(void) __init;
+extern void cas6xx_setup(void) __init;
+extern void cas7xx_setup(void) __init;
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/cellvision/nfs-101.c b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/nfs-101.c
new file mode 100644
index 000000000..7d214c090
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/cellvision/nfs-101.c
@@ -0,0 +1,47 @@
+/*
+ *  Cellvision/SparkLAN NFS-101U/WU support
+ *
+ *  Copyright (C) 2007-2009 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "cellvision.h"
+
+static struct adm5120_pci_irq nfs101_pci_irqs[] __initdata = {
+	/* miniPCI slot */
+	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
+
+	/* ALi USB controller */
+	PCIIRQ(3, 0, 2, ADM5120_IRQ_PCI2),
+	PCIIRQ(3, 3, 1, ADM5120_IRQ_PCI1),
+
+	/* NEC USB controller */
+	PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI1),
+	PCIIRQ(3, 1, 2, ADM5120_IRQ_PCI2),
+	PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2),
+};
+
+static u8 nfs101_vlans[6] __initdata = {
+	/* FIXME: not tested */
+	0x5f, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static void __init nfs101_setup(void)
+{
+	cas6xx_flash_setup();
+	cellvision_mac_setup();
+
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+	adm5120_add_device_switch(1, nfs101_vlans);
+
+	adm5120_pci_set_irq_map(ARRAY_SIZE(nfs101_pci_irqs),
+				nfs101_pci_irqs);
+}
+
+MIPS_MACHINE(MACH_ADM5120_NFS101U, "NFS-101U", "Cellvision NFS-101U/101WU",
+	     nfs101_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/common/Makefile
new file mode 100644
index 000000000..8d302c593
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for the Infineon/ADMtek ADM5120 SoC specific parts of the kernel
+#
+
+obj-y	:= adm5120.o setup.o prom.o irq.o memory.o clock.o \
+	   gpio.o platform.o
+
+obj-$(CONFIG_EARLY_PRINTK)	+= early-printk.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/adm5120.c b/target/linux/adm5120/files/arch/mips/adm5120/common/adm5120.c
new file mode 100644
index 000000000..28388342c
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/adm5120.c
@@ -0,0 +1,76 @@
+/*
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/addrspace.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_switch.h>
+
+unsigned int adm5120_product_code;
+unsigned int adm5120_revision;
+unsigned int adm5120_package;
+unsigned int adm5120_nand_boot;
+unsigned long adm5120_speed;
+
+/*
+ * CPU settings detection
+ */
+#define CODE_GET_PC(c)		((c) & CODE_PC_MASK)
+#define CODE_GET_REV(c)		(((c) >> CODE_REV_SHIFT) & CODE_REV_MASK)
+#define CODE_GET_PK(c)		(((c) >> CODE_PK_SHIFT) & CODE_PK_MASK)
+#define CODE_GET_CLKS(c)	(((c) >> CODE_CLKS_SHIFT) & CODE_CLKS_MASK)
+#define CODE_GET_NAB(c)		(((c) & CODE_NAB) != 0)
+
+void adm5120_ndelay(u32 ns)
+{
+	u32	t;
+
+	SW_WRITE_REG(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
+	SW_WRITE_REG(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
+
+	t = (ns+640) / 640;
+	t &= TIMER_PERIOD_MASK;
+	SW_WRITE_REG(SWITCH_REG_TIMER, t | TIMER_TE);
+
+	/* wait until the timer expires */
+	do {
+		t = SW_READ_REG(SWITCH_REG_TIMER_INT);
+	} while ((t & TIMER_INT_TOS) == 0);
+
+	/* leave the timer disabled */
+	SW_WRITE_REG(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
+	SW_WRITE_REG(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
+}
+
+void __init adm5120_soc_init(void)
+{
+	u32 code;
+	u32 clks;
+
+	code = SW_READ_REG(SWITCH_REG_CODE);
+
+	adm5120_product_code = CODE_GET_PC(code);
+	adm5120_revision = CODE_GET_REV(code);
+	adm5120_package = (CODE_GET_PK(code) == CODE_PK_BGA) ?
+		ADM5120_PACKAGE_BGA : ADM5120_PACKAGE_PQFP;
+	adm5120_nand_boot = CODE_GET_NAB(code);
+
+	clks = CODE_GET_CLKS(code);
+	adm5120_speed = ADM5120_SPEED_175;
+	if (clks & 1)
+		adm5120_speed += 25000000;
+	if (clks & 2)
+		adm5120_speed += 50000000;
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/clock.c b/target/linux/adm5120/files/arch/mips/adm5120/common/clock.c
new file mode 100644
index 000000000..52ae64c41
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/clock.c
@@ -0,0 +1,65 @@
+/*
+ *  ADM5120 minimal CLK API implementation
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This file was based on the CLK API implementation in:
+ *	arch/mips/tx4938/toshiba_rbtx4938/setup.c
+ *	Copyright (C) 2000-2001 Toshiba Corporation
+ *	2003-2005 (c) MontaVista Software, Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/device.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+
+struct clk {
+	unsigned long rate;
+};
+
+static struct clk uart_clk = {
+	.rate = ADM5120_UART_CLOCK
+};
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+	const char *name = dev_name(dev);
+
+	if (!strcmp(name, "apb:uart0") || !strcmp(name, "apb:uart1"))
+		return &uart_clk;
+
+	return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+	return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+	return clk->rate;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/early-printk.c b/target/linux/adm5120/files/arch/mips/adm5120/common/early-printk.c
new file mode 100644
index 000000000..d90071263
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/early-printk.c
@@ -0,0 +1,31 @@
+/*
+ *  ADM5120 specific early printk support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/addrspace.h>
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_uart.h>
+
+#define UART_READ(r) \
+	__raw_readl((void __iomem *)(KSEG1ADDR(ADM5120_UART0_BASE)+(r)))
+#define UART_WRITE(r, v) \
+	__raw_writel((v), (void __iomem *)(KSEG1ADDR(ADM5120_UART0_BASE)+(r)))
+
+void __init prom_putchar(char ch)
+{
+	while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0)
+		;
+	UART_WRITE(UART_REG_DATA, ch);
+	while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0)
+		;
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/gpio.c b/target/linux/adm5120/files/arch/mips/adm5120/common/gpio.c
new file mode 100644
index 000000000..e60ed7ad0
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/gpio.c
@@ -0,0 +1,330 @@
+/*
+ *  ADM5120 generic GPIO API support via GPIOLIB
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/irq.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <asm/addrspace.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_switch.h>
+
+#define GPIO_REG(r)	(void __iomem *)(KSEG1ADDR(ADM5120_SWITCH_BASE) + r)
+
+struct gpio1_desc {
+	void __iomem	*reg;		/* register address */
+	u8		iv_shift;	/* shift amount for input bit */
+	u8		mode_shift;	/* shift amount for mode bits */
+};
+
+#define GPIO1_DESC(p, l) {						\
+		.reg = GPIO_REG(SWITCH_REG_PORT0_LED + ((p) * 4)),	\
+		.iv_shift = LED0_IV_SHIFT + (l),			\
+		.mode_shift = (l) * 4					\
+	}
+
+static struct gpio1_desc gpio1_table[15] = {
+	GPIO1_DESC(0, 0), GPIO1_DESC(0, 1), GPIO1_DESC(0, 2),
+	GPIO1_DESC(1, 0), GPIO1_DESC(1, 1), GPIO1_DESC(1, 2),
+	GPIO1_DESC(2, 0), GPIO1_DESC(2, 1), GPIO1_DESC(2, 2),
+	GPIO1_DESC(3, 0), GPIO1_DESC(3, 1), GPIO1_DESC(3, 2),
+	GPIO1_DESC(4, 0), GPIO1_DESC(4, 1), GPIO1_DESC(4, 2)
+};
+
+static u32 gpio_conf2;
+
+int adm5120_gpio_to_irq(unsigned gpio)
+{
+	int ret;
+
+	switch (gpio) {
+	case ADM5120_GPIO_PIN2:
+		ret = ADM5120_IRQ_GPIO2;
+		break;
+	case ADM5120_GPIO_PIN4:
+		ret = ADM5120_IRQ_GPIO4;
+		break;
+	default:
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+EXPORT_SYMBOL(adm5120_gpio_to_irq);
+
+int adm5120_irq_to_gpio(unsigned irq)
+{
+	int ret;
+
+	switch (irq) {
+	case ADM5120_IRQ_GPIO2:
+		ret = ADM5120_GPIO_PIN2;
+		break;
+	case ADM5120_IRQ_GPIO4:
+		ret = ADM5120_GPIO_PIN4;
+		break;
+	default:
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+EXPORT_SYMBOL(adm5120_irq_to_gpio);
+
+/*
+ * Helpers for GPIO lines in GPIO_CONF0 register
+ */
+#define PIN_IM(p)	((1 << GPIO_CONF0_IM_SHIFT) << p)
+#define PIN_IV(p)	((1 << GPIO_CONF0_IV_SHIFT) << p)
+#define PIN_OE(p)	((1 << GPIO_CONF0_OE_SHIFT) << p)
+#define PIN_OV(p)	((1 << GPIO_CONF0_OV_SHIFT) << p)
+
+int __adm5120_gpio0_get_value(unsigned offset)
+{
+	void __iomem **reg;
+	u32 t;
+
+	reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
+
+	t = __raw_readl(reg);
+	if ((t & PIN_IM(offset)) != 0)
+		t &= PIN_IV(offset);
+	else
+		t &= PIN_OV(offset);
+
+	return (t) ? 1 : 0;
+}
+EXPORT_SYMBOL(__adm5120_gpio0_get_value);
+
+void __adm5120_gpio0_set_value(unsigned offset, int value)
+{
+	void __iomem **reg;
+	u32 t;
+
+	reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
+
+	t = __raw_readl(reg);
+	if (value == 0)
+		t &= ~(PIN_OV(offset));
+	else
+		t |= PIN_OV(offset);
+
+	__raw_writel(t, reg);
+}
+EXPORT_SYMBOL(__adm5120_gpio0_set_value);
+
+static int adm5120_gpio0_get_value(struct gpio_chip *chip, unsigned offset)
+{
+	return __adm5120_gpio0_get_value(offset);
+}
+
+static void adm5120_gpio0_set_value(struct gpio_chip *chip,
+				    unsigned offset, int value)
+{
+	__adm5120_gpio0_set_value(offset, value);
+}
+
+static int adm5120_gpio0_direction_input(struct gpio_chip *chip,
+					 unsigned offset)
+{
+	void __iomem **reg;
+	u32 t;
+
+	reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
+
+	t = __raw_readl(reg);
+	t &= ~(PIN_OE(offset));
+	t |= PIN_IM(offset);
+	__raw_writel(t, reg);
+
+	return 0;
+}
+
+static int adm5120_gpio0_direction_output(struct gpio_chip *chip,
+					  unsigned offset, int value)
+{
+	void __iomem **reg;
+	u32 t;
+
+	reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
+
+	t = __raw_readl(reg);
+	t &= ~(PIN_IM(offset) | PIN_OV(offset));
+	t |= PIN_OE(offset);
+
+	if (value)
+		t |= PIN_OV(offset);
+
+	__raw_writel(t, reg);
+
+	return 0;
+}
+
+static struct gpio_chip adm5120_gpio0_chip = {
+	.label			= "adm5120 gpio0",
+	.get			= adm5120_gpio0_get_value,
+	.set			= adm5120_gpio0_set_value,
+	.direction_input	= adm5120_gpio0_direction_input,
+	.direction_output	= adm5120_gpio0_direction_output,
+	.base			= ADM5120_GPIO_PIN0,
+	.ngpio			= ADM5120_GPIO_PIN7 - ADM5120_GPIO_PIN0 + 1,
+};
+
+int __adm5120_gpio1_get_value(unsigned offset)
+{
+	void __iomem **reg;
+	u32 t, m;
+
+	reg = gpio1_table[offset].reg;
+
+	t = __raw_readl(reg);
+	m = (t >> gpio1_table[offset].mode_shift) & LED_MODE_MASK;
+	if (m == LED_MODE_INPUT)
+		return (t >> gpio1_table[offset].iv_shift) & 1;
+
+	if (m == LED_MODE_OUT_LOW)
+		return 0;
+
+	return 1;
+}
+EXPORT_SYMBOL(__adm5120_gpio1_get_value);
+
+void __adm5120_gpio1_set_value(unsigned offset, int value)
+{
+	void __iomem **reg;
+	u32 t, s;
+
+	reg = gpio1_table[offset].reg;
+	s = gpio1_table[offset].mode_shift;
+
+	t = __raw_readl(reg);
+	t &= ~(LED_MODE_MASK << s);
+
+	switch (value) {
+	case ADM5120_GPIO_LOW:
+		t |= (LED_MODE_OUT_LOW << s);
+		break;
+	case ADM5120_GPIO_FLASH:
+	case ADM5120_GPIO_LINK:
+	case ADM5120_GPIO_SPEED:
+	case ADM5120_GPIO_DUPLEX:
+	case ADM5120_GPIO_ACT:
+	case ADM5120_GPIO_COLL:
+	case ADM5120_GPIO_LINK_ACT:
+	case ADM5120_GPIO_DUPLEX_COLL:
+	case ADM5120_GPIO_10M_ACT:
+	case ADM5120_GPIO_100M_ACT:
+		t |= ((value & LED_MODE_MASK) << s);
+		break;
+	default:
+		t |= (LED_MODE_OUT_HIGH << s);
+		break;
+	}
+
+	__raw_writel(t, reg);
+}
+EXPORT_SYMBOL(__adm5120_gpio1_set_value);
+
+static int adm5120_gpio1_get_value(struct gpio_chip *chip, unsigned offset)
+{
+	return __adm5120_gpio1_get_value(offset);
+}
+
+static void adm5120_gpio1_set_value(struct gpio_chip *chip,
+				    unsigned offset, int value)
+{
+	__adm5120_gpio1_set_value(offset, value);
+}
+
+static int adm5120_gpio1_direction_input(struct gpio_chip *chip,
+					 unsigned offset)
+{
+	void __iomem **reg;
+	u32 t;
+
+	reg = gpio1_table[offset].reg;
+	t = __raw_readl(reg);
+	t &= ~(LED_MODE_MASK << gpio1_table[offset].mode_shift);
+	__raw_writel(t, reg);
+
+	return 0;
+}
+
+static int adm5120_gpio1_direction_output(struct gpio_chip *chip,
+					  unsigned offset, int value)
+{
+	__adm5120_gpio1_set_value(offset, value);
+	return 0;
+}
+
+static struct gpio_chip adm5120_gpio1_chip = {
+	.label			= "adm5120 gpio1",
+	.get			= adm5120_gpio1_get_value,
+	.set			= adm5120_gpio1_set_value,
+	.direction_input	= adm5120_gpio1_direction_input,
+	.direction_output	= adm5120_gpio1_direction_output,
+	.base			= ADM5120_GPIO_P0L0,
+	.ngpio			= ADM5120_GPIO_P4L2 - ADM5120_GPIO_P0L0 + 1,
+};
+
+void __init adm5120_gpio_csx0_enable(void)
+{
+	gpio_conf2 |= GPIO_CONF2_CSX0;
+	SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
+
+	gpio_request(ADM5120_GPIO_PIN1, "CSX0");
+}
+
+void __init adm5120_gpio_csx1_enable(void)
+{
+	gpio_conf2 |= GPIO_CONF2_CSX1;
+	SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
+
+	gpio_request(ADM5120_GPIO_PIN3, "CSX1");
+}
+
+void __init adm5120_gpio_ew_enable(void)
+{
+	gpio_conf2 |= GPIO_CONF2_EW;
+	SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
+
+	gpio_request(ADM5120_GPIO_PIN0, "EW");
+}
+
+void __init adm5120_gpio_init(void)
+{
+	int err;
+
+	SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
+
+	if (adm5120_package_pqfp()) {
+		gpiochip_reserve(ADM5120_GPIO_PIN4, 4);
+		adm5120_gpio0_chip.ngpio = 4;
+	}
+
+	err = gpiochip_add(&adm5120_gpio0_chip);
+	if (err)
+		panic("cannot add ADM5120 GPIO0 chip, error=%d", err);
+
+	err = gpiochip_add(&adm5120_gpio1_chip);
+	if (err)
+		panic("cannot add ADM5120 GPIO1 chip, error=%d", err);
+
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/irq.c b/target/linux/adm5120/files/arch/mips/adm5120/common/irq.c
new file mode 100644
index 000000000..a26e65176
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/irq.c
@@ -0,0 +1,171 @@
+/*
+ *  ADM5120 specific interrupt handlers
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/bitops.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/mipsregs.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+
+static void adm5120_intc_irq_unmask(struct irq_data *d);
+static void adm5120_intc_irq_mask(struct irq_data *d);
+static int  adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type);
+
+static inline void intc_write_reg(unsigned int reg, u32 val)
+{
+	void __iomem *base = (void __iomem *)KSEG1ADDR(ADM5120_INTC_BASE);
+
+	__raw_writel(val, base + reg);
+}
+
+static inline u32 intc_read_reg(unsigned int reg)
+{
+	void __iomem *base = (void __iomem *)KSEG1ADDR(ADM5120_INTC_BASE);
+
+	return __raw_readl(base + reg);
+}
+
+static struct irq_chip adm5120_intc_irq_chip = {
+	.name		= "INTC",
+	.irq_unmask	= adm5120_intc_irq_unmask,
+	.irq_mask	= adm5120_intc_irq_mask,
+	.irq_mask_ack	= adm5120_intc_irq_mask,
+	.irq_set_type	= adm5120_intc_irq_set_type
+};
+
+static struct irqaction adm5120_intc_irq_action = {
+	.handler	= no_action,
+	.name		= "cascade [INTC]"
+};
+
+static void adm5120_intc_irq_unmask(struct irq_data *d)
+{
+	intc_write_reg(INTC_REG_IRQ_ENABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
+}
+
+static void adm5120_intc_irq_mask(struct irq_data *d)
+{
+	intc_write_reg(INTC_REG_IRQ_DISABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
+}
+
+static int adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type)
+{
+	unsigned int irq = d->irq;
+	unsigned int sense;
+	unsigned long mode;
+	int err = 0;
+
+	sense = flow_type & (IRQ_TYPE_SENSE_MASK);
+	switch (sense) {
+	case IRQ_TYPE_NONE:
+	case IRQ_TYPE_LEVEL_HIGH:
+		break;
+	case IRQ_TYPE_LEVEL_LOW:
+		switch (irq) {
+		case ADM5120_IRQ_GPIO2:
+		case ADM5120_IRQ_GPIO4:
+			break;
+		default:
+			err = -EINVAL;
+			break;
+		}
+		break;
+	default:
+		err = -EINVAL;
+		break;
+	}
+
+	if (err)
+		return err;
+
+	switch (irq) {
+	case ADM5120_IRQ_GPIO2:
+	case ADM5120_IRQ_GPIO4:
+		mode = intc_read_reg(INTC_REG_INT_MODE);
+		if (sense == IRQ_TYPE_LEVEL_LOW)
+			mode |= (1 << (irq - ADM5120_INTC_IRQ_BASE));
+		else
+			mode &= ~(1 << (irq - ADM5120_INTC_IRQ_BASE));
+
+		intc_write_reg(INTC_REG_INT_MODE, mode);
+		break;
+	}
+
+	return 0;
+}
+
+static void adm5120_intc_irq_dispatch(void)
+{
+	unsigned long status;
+	int irq;
+
+	status = intc_read_reg(INTC_REG_IRQ_STATUS) & INTC_INT_ALL;
+	if (status) {
+		irq = ADM5120_INTC_IRQ_BASE + fls(status) - 1;
+		do_IRQ(irq);
+	} else
+		spurious_interrupt();
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+	unsigned long pending;
+
+	pending = read_c0_status() & read_c0_cause() & ST0_IM;
+
+	if (pending & STATUSF_IP7)
+		do_IRQ(ADM5120_IRQ_COUNTER);
+	else if (pending & STATUSF_IP2)
+		adm5120_intc_irq_dispatch();
+	else
+		spurious_interrupt();
+}
+
+#define INTC_IRQ_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH | IRQ_DISABLED)
+static void __init adm5120_intc_irq_init(void)
+{
+	int i;
+
+	/* disable all interrupts */
+	intc_write_reg(INTC_REG_IRQ_DISABLE, INTC_INT_ALL);
+
+	/* setup all interrupts to generate IRQ instead of FIQ */
+	intc_write_reg(INTC_REG_INT_MODE, 0);
+
+	/* set active level for all external interrupts to HIGH */
+	intc_write_reg(INTC_REG_INT_LEVEL, 0);
+
+	/* disable usage of the TEST_SOURCE register */
+	intc_write_reg(INTC_REG_IRQ_SOURCE_SELECT, 0);
+
+	for (i = ADM5120_INTC_IRQ_BASE;
+		i <= ADM5120_INTC_IRQ_BASE + INTC_IRQ_LAST;
+		i++) {
+		irq_set_chip_and_handler(i, &adm5120_intc_irq_chip,
+			handle_level_irq);
+	}
+
+	setup_irq(ADM5120_IRQ_INTC, &adm5120_intc_irq_action);
+}
+
+void __init arch_init_irq(void)
+{
+	mips_cpu_irq_init();
+	adm5120_intc_irq_init();
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/memory.c b/target/linux/adm5120/files/arch/mips/adm5120/common/memory.c
new file mode 100644
index 000000000..d07266fa3
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/memory.c
@@ -0,0 +1,149 @@
+/*
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_switch.h>
+#include <asm/mach-adm5120/adm5120_mpmc.h>
+
+#ifdef DEBUG
+#  define mem_dbg(f, a...)	printk(KERN_INFO "mem_detect: " f, ## a)
+#else
+#  define mem_dbg(f, a...)
+#endif
+
+unsigned long adm5120_memsize;
+
+#define MEM_READL(a)		__raw_readl((void __iomem *)(a))
+#define MEM_WRITEL(a, v)	__raw_writel((v), (void __iomem *)(a))
+
+static int __init mem_check_pattern(u8 *addr, unsigned long offs)
+{
+	u32 *p1 = (u32 *)addr;
+	u32 *p2 = (u32 *)(addr+offs);
+	u32 t, u, v;
+
+	/* save original value */
+	t = MEM_READL(p1);
+
+	u = MEM_READL(p2);
+	if (t != u)
+		return 0;
+
+	v = 0x55555555;
+	if (u == v)
+		v = 0xAAAAAAAA;
+
+	mem_dbg("write 0x%08X to 0x%08lX\n", v, (unsigned long)p1);
+
+	MEM_WRITEL(p1, v);
+	adm5120_ndelay(1000);
+	u = MEM_READL(p2);
+
+	mem_dbg("pattern at 0x%08lX is 0x%08X\n", (unsigned long)p2, u);
+
+	/* restore original value */
+	MEM_WRITEL(p1, t);
+
+	return (v == u);
+}
+
+static void __init adm5120_detect_memsize(void)
+{
+	u32	memctrl;
+	u32	size, maxsize;
+	u8	*p;
+
+	memctrl = SW_READ_REG(SWITCH_REG_MEMCTRL);
+	switch (memctrl & MEMCTRL_SDRS_MASK) {
+	case MEMCTRL_SDRS_4M:
+		maxsize = 4 << 20;
+		break;
+	case MEMCTRL_SDRS_8M:
+		maxsize = 8 << 20;
+		break;
+	case MEMCTRL_SDRS_16M:
+		maxsize = 16 << 20;
+		break;
+	default:
+		maxsize = 64 << 20;
+		break;
+	}
+
+	mem_dbg("checking for %uMB chip in 1st bank\n", maxsize >> 20);
+
+	/* detect size of the 1st SDRAM bank */
+	p = (u8 *)KSEG1ADDR(0);
+	for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
+		if (mem_check_pattern(p, size)) {
+			/* mirrored address */
+			mem_dbg("mirrored data found at offset 0x%08X\n", size);
+			break;
+		}
+	}
+
+	mem_dbg("chip size in 1st bank is %uMB\n", size >> 20);
+	adm5120_memsize = size;
+
+	if (size != maxsize)
+		/* 2nd bank is not supported */
+		goto out;
+
+	if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
+		/* 2nd bank is disabled */
+		goto out;
+
+	/*
+	 * some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
+	 * are missing.
+	 */
+	mem_dbg("check presence of 2nd bank\n");
+
+	p = (u8 *)KSEG1ADDR(maxsize+size-4);
+	if (mem_check_pattern(p, 0))
+		adm5120_memsize += size;
+
+	if (maxsize != size) {
+		/* adjusting MECTRL register */
+		memctrl &= ~(MEMCTRL_SDRS_MASK);
+		switch (size>>20) {
+		case 4:
+			memctrl |= MEMCTRL_SDRS_4M;
+			break;
+		case 8:
+			memctrl |= MEMCTRL_SDRS_8M;
+			break;
+		case 16:
+			memctrl |= MEMCTRL_SDRS_16M;
+			break;
+		default:
+			memctrl |= MEMCTRL_SDRS_64M;
+			break;
+		}
+		SW_WRITE_REG(SWITCH_REG_MEMCTRL, memctrl);
+	}
+
+out:
+	mem_dbg("%dx%uMB memory found\n", (adm5120_memsize == size) ? 1 : 2 ,
+		size>>20);
+}
+
+void __init adm5120_mem_init(void)
+{
+	adm5120_detect_memsize();
+	add_memory_region(0, adm5120_memsize, BOOT_MEM_RAM);
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/platform.c b/target/linux/adm5120/files/arch/mips/adm5120/common/platform.c
new file mode 100644
index 000000000..809d77b8a
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/platform.c
@@ -0,0 +1,395 @@
+/*
+ *  ADM5120 generic platform devices
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/slab.h>
+#include <linux/export.h>
+
+#include <asm/bootinfo.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_switch.h>
+#include <asm/mach-adm5120/adm5120_nand.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+
+#if 1
+/*
+ * TODO:remove global adm5120_eth* variables when the switch driver will be
+ *	converted into a real platform driver
+ */
+unsigned int adm5120_eth_num_ports = 6;
+EXPORT_SYMBOL_GPL(adm5120_eth_num_ports);
+
+unsigned char adm5120_eth_macs[6][6] = {
+	{'\00', 'A', 'D', 'M', '\x51', '\x20' },
+	{'\00', 'A', 'D', 'M', '\x51', '\x21' },
+	{'\00', 'A', 'D', 'M', '\x51', '\x22' },
+	{'\00', 'A', 'D', 'M', '\x51', '\x23' },
+	{'\00', 'A', 'D', 'M', '\x51', '\x24' },
+	{'\00', 'A', 'D', 'M', '\x51', '\x25' }
+};
+EXPORT_SYMBOL_GPL(adm5120_eth_macs);
+
+unsigned char adm5120_eth_vlans[6] = {
+	0x41, 0x42, 0x44, 0x48, 0x50, 0x60
+};
+EXPORT_SYMBOL_GPL(adm5120_eth_vlans);
+#endif
+
+void __init adm5120_setup_eth_macs(u8 *mac_base)
+{
+	u32 t;
+	int i, j;
+
+	t = ((u32) mac_base[3] << 16) | ((u32) mac_base[4] << 8)
+		| ((u32) mac_base[5]);
+
+	for (i = 0; i < ARRAY_SIZE(adm5120_eth_macs); i++) {
+		for (j = 0; j < 3; j++)
+			adm5120_eth_macs[i][j] = mac_base[j];
+
+		adm5120_eth_macs[i][3] = (t >> 16) & 0xff;
+		adm5120_eth_macs[i][4] = (t >> 8) & 0xff;
+		adm5120_eth_macs[i][5] = t & 0xff;
+
+		t++;
+	}
+}
+
+/*
+ * Built-in ethernet switch
+ */
+struct resource adm5120_switch_resources[] = {
+	[0] = {
+		.start	= ADM5120_SWITCH_BASE,
+		.end	= ADM5120_SWITCH_BASE+ADM5120_SWITCH_SIZE-1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= ADM5120_IRQ_SWITCH,
+		.end	= ADM5120_IRQ_SWITCH,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+struct adm5120_switch_platform_data adm5120_switch_data;
+struct platform_device adm5120_switch_device = {
+	.name		= "adm5120-switch",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(adm5120_switch_resources),
+	.resource	= adm5120_switch_resources,
+	.dev.platform_data = &adm5120_switch_data,
+};
+
+void __init adm5120_add_device_switch(unsigned num_ports, u8 *vlan_map)
+{
+	if (num_ports > 0)
+		adm5120_eth_num_ports = num_ports;
+
+	if (vlan_map)
+		memcpy(adm5120_eth_vlans, vlan_map, sizeof(adm5120_eth_vlans));
+
+	platform_device_register(&adm5120_switch_device);
+}
+
+/*
+ * USB Host Controller
+ */
+struct resource adm5120_hcd_resources[] = {
+	[0] = {
+		.start	= ADM5120_USBC_BASE,
+		.end	= ADM5120_USBC_BASE+ADM5120_USBC_SIZE-1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= ADM5120_IRQ_USBC,
+		.end	= ADM5120_IRQ_USBC,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static u64 adm5120_hcd_dma_mask = DMA_BIT_MASK(24);
+struct platform_device adm5120_hcd_device = {
+	.name		= "adm5120-hcd",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(adm5120_hcd_resources),
+	.resource	= adm5120_hcd_resources,
+	.dev = {
+		.dma_mask		= &adm5120_hcd_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(24),
+	}
+};
+
+void __init adm5120_add_device_usb(void)
+{
+	platform_device_register(&adm5120_hcd_device);
+}
+
+/*
+ * NOR flash devices
+ */
+struct adm5120_flash_platform_data adm5120_flash0_data;
+struct platform_device adm5120_flash0_device =	{
+	.name			= "adm5120-flash",
+	.id			= 0,
+	.dev.platform_data	= &adm5120_flash0_data,
+};
+
+struct adm5120_flash_platform_data adm5120_flash1_data;
+struct platform_device adm5120_flash1_device =	{
+	.name			= "adm5120-flash",
+	.id			= 1,
+	.dev.platform_data	= &adm5120_flash1_data,
+};
+
+void __init adm5120_add_device_flash(unsigned id)
+{
+	struct platform_device *pdev;
+
+	switch (id) {
+	case 0:
+		pdev = &adm5120_flash0_device;
+		break;
+	case 1:
+		pdev = &adm5120_flash1_device;
+		break;
+	default:
+		pdev = NULL;
+		break;
+	}
+
+	if (pdev)
+		platform_device_register(pdev);
+}
+
+/*
+ * built-in UARTs
+ */
+static void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base,
+		unsigned int mctrl)
+{
+}
+
+struct amba_pl010_data adm5120_uart0_data = {
+	.set_mctrl = adm5120_uart_set_mctrl
+};
+
+struct amba_device adm5120_uart0_device = {
+	.dev		= {
+		.init_name = "apb:uart0",
+		.platform_data = &adm5120_uart0_data,
+	},
+	.res		= {
+		.start	= ADM5120_UART0_BASE,
+		.end	= ADM5120_UART0_BASE + ADM5120_UART_SIZE - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	.irq		= { ADM5120_IRQ_UART0, -1 },
+	.periphid	= 0x0041010,
+};
+
+struct amba_pl010_data adm5120_uart1_data = {
+	.set_mctrl = adm5120_uart_set_mctrl
+};
+
+struct amba_device adm5120_uart1_device = {
+	.dev		= {
+		.init_name = "apb:uart1",
+		.platform_data = &adm5120_uart1_data,
+	},
+	.res		= {
+		.start	= ADM5120_UART1_BASE,
+		.end	= ADM5120_UART1_BASE + ADM5120_UART_SIZE - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	.irq		= { ADM5120_IRQ_UART1, -1 },
+	.periphid	= 0x0041010,
+};
+
+void __init adm5120_add_device_uart(unsigned id)
+{
+	struct amba_device *dev;
+
+	switch (id) {
+	case 0:
+		dev = &adm5120_uart0_device;
+		break;
+	case 1:
+		dev = &adm5120_uart1_device;
+		break;
+	default:
+		dev = NULL;
+		break;
+	}
+
+	if (dev)
+		amba_device_register(dev, &iomem_resource);
+}
+
+/*
+ * GPIO buttons
+ */
+void __init adm5120_register_gpio_buttons(int id,
+					  unsigned poll_interval,
+					  unsigned nbuttons,
+					  struct gpio_keys_button *buttons)
+{
+	struct platform_device *pdev;
+	struct gpio_keys_platform_data pdata;
+	struct gpio_keys_button *p;
+	int err;
+
+	p = kmemdup(buttons, nbuttons * sizeof(*p), GFP_KERNEL);
+	if (!p)
+		return;
+
+	pdev = platform_device_alloc("gpio-keys-polled", id);
+	if (!pdev)
+		goto err_free_buttons;
+
+	memset(&pdata, 0, sizeof(pdata));
+	pdata.poll_interval = poll_interval;
+	pdata.nbuttons = nbuttons;
+	pdata.buttons = p;
+
+	err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+	if (err)
+		goto err_put_pdev;
+
+	err = platform_device_add(pdev);
+	if (err)
+		goto err_put_pdev;
+
+	return;
+
+err_put_pdev:
+	platform_device_put(pdev);
+
+err_free_buttons:
+	kfree(p);
+}
+
+/*
+ * GPIO LEDS
+ */
+struct gpio_led_platform_data adm5120_gpio_leds_data;
+struct platform_device adm5120_gpio_leds_device = {
+	.name		= "leds-gpio",
+	.id		= -1,
+	.dev.platform_data = &adm5120_gpio_leds_data,
+};
+
+void __init adm5120_add_device_gpio_leds(unsigned num_leds,
+				    struct gpio_led *leds)
+{
+	struct gpio_led *p;
+
+	p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
+	if (!p)
+		return;
+
+	memcpy(p, leds, num_leds * sizeof(*p));
+	adm5120_gpio_leds_data.num_leds = num_leds;
+	adm5120_gpio_leds_data.leds = p;
+
+	platform_device_register(&adm5120_gpio_leds_device);
+}
+
+/*
+ * GPIO device
+ */
+static struct resource adm5120_gpio_resource[] __initdata = {
+	{
+		.start	= 0x3fffff,
+	},
+};
+
+void __init adm5120_add_device_gpio(u32 disable_mask)
+{
+	if (adm5120_package_pqfp())
+		disable_mask |= 0xf0;
+
+	adm5120_gpio_resource[0].start &= ~disable_mask;
+	platform_device_register_simple("GPIODEV", -1,
+			adm5120_gpio_resource,
+			ARRAY_SIZE(adm5120_gpio_resource));
+}
+
+/*
+ * NAND flash
+ */
+struct resource adm5120_nand_resources[] = {
+	[0] = {
+		.start	= ADM5120_NAND_BASE,
+		.end	= ADM5120_NAND_BASE + ADM5120_NAND_SIZE-1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static int adm5120_nand_ready(struct mtd_info *mtd)
+{
+	return ((adm5120_nand_get_status() & ADM5120_NAND_STATUS_READY) != 0);
+}
+
+static void adm5120_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+					unsigned int ctrl)
+{
+	if (ctrl & NAND_CTRL_CHANGE) {
+		adm5120_nand_set_cle(ctrl & NAND_CLE);
+		adm5120_nand_set_ale(ctrl & NAND_ALE);
+		adm5120_nand_set_cen(ctrl & NAND_NCE);
+	}
+
+	if (cmd != NAND_CMD_NONE)
+		NAND_WRITE_REG(NAND_REG_DATA, cmd);
+}
+
+void __init adm5120_add_device_nand(struct platform_nand_data *pdata)
+{
+	struct platform_device *pdev;
+	int err;
+
+	pdev = platform_device_alloc("gen_nand", -1);
+	if (!pdev)
+		goto err_out;
+
+	err = platform_device_add_resources(pdev, adm5120_nand_resources,
+					ARRAY_SIZE(adm5120_nand_resources));
+	if (err)
+		goto err_put;
+
+	err = platform_device_add_data(pdev, pdata, sizeof(*pdata));
+	if (err)
+		goto err_put;
+
+	pdata = pdev->dev.platform_data;
+	pdata->ctrl.dev_ready = adm5120_nand_ready;
+	pdata->ctrl.cmd_ctrl = adm5120_nand_cmd_ctrl;
+
+	err = platform_device_add(pdev);
+	if (err)
+		goto err_put;
+
+	return;
+
+err_put:
+	platform_device_put(pdev);
+err_out:
+	return;
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/prom.c b/target/linux/adm5120/files/arch/mips/adm5120/common/prom.c
new file mode 100644
index 000000000..5c52ea27e
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/prom.c
@@ -0,0 +1,264 @@
+/*
+ *  ADM5120 specific prom routines
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+
+#include <asm/bootinfo.h>
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+
+#include <prom/cfe.h>
+#include <prom/generic.h>
+#include <prom/routerboot.h>
+#include <prom/myloader.h>
+#include <prom/zynos.h>
+
+unsigned int adm5120_prom_type	= ADM5120_PROM_GENERIC;
+
+struct board_desc {
+	unsigned long	mach_type;
+	char		*name;
+};
+
+#define DEFBOARD(n, mt) { .mach_type = (mt), .name = (n)}
+static struct board_desc common_boards[] __initdata = {
+	/* Cellvision/SparkLAN boards */
+	DEFBOARD("CAS-630",	MACH_ADM5120_CAS630),
+	DEFBOARD("CAS-670",	MACH_ADM5120_CAS670),
+	DEFBOARD("CAS-700",	MACH_ADM5120_CAS700),
+	DEFBOARD("CAS-771",	MACH_ADM5120_CAS771),
+	DEFBOARD("CAS-790",	MACH_ADM5120_CAS790),
+	DEFBOARD("CAS-861",	MACH_ADM5120_CAS861),
+	DEFBOARD("NFS-101U",	MACH_ADM5120_NFS101U),
+	/* Compex boards */
+	DEFBOARD("WP54G-WRT",	MACH_ADM5120_WP54G_WRT),
+	/* Edimax boards */
+	DEFBOARD("BR-6104K",	MACH_ADM5120_BR6104K),
+	DEFBOARD("BR-6104KP",	MACH_ADM5120_BR6104KP),
+	DEFBOARD("BR-6104WG",	MACH_ADM5120_BR61X4WG),
+	DEFBOARD("BR-6114WG",	MACH_ADM5120_BR61X4WG),
+	/* Infineon boards */
+	DEFBOARD("EASY 5120P-ATA",	MACH_ADM5120_EASY5120PATA),
+	DEFBOARD("EASY 5120-RT",	MACH_ADM5120_EASY5120RT),
+	DEFBOARD("EASY 5120-WVoIP",	MACH_ADM5120_EASY5120WVOIP),
+	DEFBOARD("EASY 83000",		MACH_ADM5120_EASY83000),
+	/* Mikrotik RouterBOARDs */
+	DEFBOARD("111",		MACH_ADM5120_RB_11X),
+	DEFBOARD("112",		MACH_ADM5120_RB_11X),
+	DEFBOARD("133",		MACH_ADM5120_RB_133),
+	DEFBOARD("133C",	MACH_ADM5120_RB_133C),
+	DEFBOARD("133C3",	MACH_ADM5120_RB_133C),
+	DEFBOARD("150",		MACH_ADM5120_RB_153), /* it's intentional */
+	DEFBOARD("153",		MACH_ADM5120_RB_153),
+	DEFBOARD("192",		MACH_ADM5120_RB_192),
+	DEFBOARD("miniROUTER",	MACH_ADM5120_RB_150),
+	/* OSBRiDGE boards */
+	DEFBOARD("OSBRiDGE 5GXi",	MACH_ADM5120_5GXI),
+	/* Motorola boards */
+	DEFBOARD("Powerline MU Gateway", MACH_ADM5120_PMUGW),
+	/* Generic EB-214A */
+	DEFBOARD("ADM5120",	MACH_ADM5120_EB_214A),
+};
+
+static unsigned long __init find_machtype_byname(char *name)
+{
+	unsigned long ret;
+	int i;
+
+	ret = MACH_ADM5120_GENERIC;
+	if (name == NULL)
+		goto out;
+
+	if (*name == '\0')
+		goto out;
+
+	for (i = 0; i < ARRAY_SIZE(common_boards); i++) {
+		if (strcmp(common_boards[i].name, name) == 0) {
+			ret = common_boards[i].mach_type;
+			break;
+		}
+	}
+
+out:
+	return ret;
+}
+
+static unsigned long __init detect_machtype_routerboot(void)
+{
+	char *name;
+
+	name = routerboot_get_boardname();
+	return find_machtype_byname(name);
+}
+
+static unsigned long __init detect_machtype_generic(void)
+{
+	char *name;
+
+	name = generic_prom_getenv("board_name");
+	return find_machtype_byname(name);
+}
+
+unsigned long __init detect_machtype_cfe(void)
+{
+	char *name;
+
+	name = cfe_getenv("BOARD_NAME");
+	return find_machtype_byname(name);
+}
+
+static struct {
+	unsigned long	mach_type;
+	u16		vendor_id;
+	u16		board_id;
+} zynos_boards[] __initdata = {
+#define ZYNOS_BOARD(vi, bi, mt) \
+	{.vendor_id = (vi), .board_id = (bi), .mach_type = (mt)}
+
+#define ZYXEL_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_ZYXEL, bi, mt)
+#define DLINK_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_DLINK, bi, mt)
+#define LUCENT_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_LUCENT, bi, mt)
+	ZYXEL_BOARD(ZYNOS_BOARD_HS100,	MACH_ADM5120_HS100),
+	ZYXEL_BOARD(ZYNOS_BOARD_P334U,	MACH_ADM5120_P334U),
+	ZYXEL_BOARD(ZYNOS_BOARD_P334W,	MACH_ADM5120_P334W),
+	ZYXEL_BOARD(ZYNOS_BOARD_P334WH,	MACH_ADM5120_P334WH),
+	ZYXEL_BOARD(ZYNOS_BOARD_P334WHD, MACH_ADM5120_P334WHD),
+	ZYXEL_BOARD(ZYNOS_BOARD_P334WT,	MACH_ADM5120_P334WT),
+	ZYXEL_BOARD(ZYNOS_BOARD_P334WT_ALT,	MACH_ADM5120_P334WT),
+	ZYXEL_BOARD(ZYNOS_BOARD_P335,	MACH_ADM5120_P335),
+	ZYXEL_BOARD(ZYNOS_BOARD_P335PLUS, MACH_ADM5120_P335PLUS),
+	ZYXEL_BOARD(ZYNOS_BOARD_P335U,	MACH_ADM5120_P335U)
+};
+
+static unsigned long __init detect_machtype_bootbase(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(zynos_boards); i++) {
+		if (zynos_boards[i].vendor_id == bootbase_info.vendor_id &&
+			zynos_boards[i].board_id == bootbase_info.board_id) {
+			return zynos_boards[i].mach_type;
+			break;
+		}
+	}
+
+	printk(KERN_WARNING "Unknown ZyXEL model (%u)\n",
+				bootbase_info.board_id);
+	return MACH_ADM5120_GENERIC;
+}
+
+static struct {
+	unsigned long	mach_type;
+	u16	vid;
+	u16	did;
+	u16	svid;
+	u16	sdid;
+} mylo_boards[]  __initdata = {
+#define MYLO_BOARD(v, d, sv, sd, mt) \
+	{.vid = (v), .did = (d), .svid = (sv), .sdid = (sd), .mach_type = (mt)}
+#define COMPEX_BOARD(d, mt) \
+	MYLO_BOARD(VENID_COMPEX, (d), VENID_COMPEX, (d), (mt))
+
+	COMPEX_BOARD(DEVID_COMPEX_NP27G, MACH_ADM5120_NP27G),
+	COMPEX_BOARD(DEVID_COMPEX_NP28G, MACH_ADM5120_NP28G),
+	COMPEX_BOARD(DEVID_COMPEX_NP28GHS, MACH_ADM5120_NP28GHS),
+	COMPEX_BOARD(DEVID_COMPEX_WP54G, MACH_ADM5120_WP54),
+	COMPEX_BOARD(DEVID_COMPEX_WP54Gv1C, MACH_ADM5120_WP54Gv1C),
+	COMPEX_BOARD(DEVID_COMPEX_WP54AG, MACH_ADM5120_WP54),
+	COMPEX_BOARD(DEVID_COMPEX_WPP54G, MACH_ADM5120_WP54),
+	COMPEX_BOARD(DEVID_COMPEX_WPP54AG, MACH_ADM5120_WP54),
+};
+
+static unsigned long __init detect_machtype_myloader(void)
+{
+	unsigned long ret;
+	int i;
+
+	ret = MACH_ADM5120_GENERIC;
+	for (i = 0; i < ARRAY_SIZE(mylo_boards); i++) {
+		if (mylo_boards[i].vid == myloader_info.vid &&
+			mylo_boards[i].did == myloader_info.did &&
+			mylo_boards[i].svid == myloader_info.svid &&
+			mylo_boards[i].sdid == myloader_info.sdid) {
+			ret = mylo_boards[i].mach_type;
+			break;
+		}
+	}
+
+	return ret;
+}
+
+static void __init prom_detect_machtype(void)
+{
+	if (bootbase_present()) {
+		adm5120_prom_type = ADM5120_PROM_BOOTBASE;
+		mips_machtype = detect_machtype_bootbase();
+		return;
+	}
+
+	if (cfe_present()) {
+		adm5120_prom_type = ADM5120_PROM_CFE;
+		mips_machtype = detect_machtype_cfe();
+		return;
+	}
+
+	if (myloader_present()) {
+		adm5120_prom_type = ADM5120_PROM_MYLOADER;
+		mips_machtype = detect_machtype_myloader();
+		return;
+	}
+
+	if (routerboot_present()) {
+		adm5120_prom_type = ADM5120_PROM_ROUTERBOOT;
+		mips_machtype = detect_machtype_routerboot();
+		return;
+	}
+
+	if (generic_prom_present()) {
+		adm5120_prom_type = ADM5120_PROM_GENERIC;
+		mips_machtype = detect_machtype_generic();
+		return;
+	}
+
+	mips_machtype = MACH_ADM5120_GENERIC;
+}
+
+#ifdef CONFIG_IMAGE_CMDLINE_HACK
+extern char __image_cmdline[];
+
+static void __init prom_init_cmdline(void)
+{
+	char *cmd;
+
+	/* init command line, register a default kernel command line */
+	cmd = __image_cmdline;
+	if (strlen(cmd) > 0)
+		strlcpy(arcs_cmdline, cmd, sizeof(arcs_cmdline));
+
+}
+#else
+static inline void prom_init_cmdline(void) {}
+#endif /* CONFIG_IMAGE_CMDLINE_HACK */
+
+void __init prom_init(void)
+{
+	prom_detect_machtype();
+	prom_init_cmdline();
+}
+
+void __init prom_free_prom_memory(void)
+{
+	/* We do not have to prom memory to free */
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/common/setup.c b/target/linux/adm5120/files/arch/mips/adm5120/common/setup.c
new file mode 100644
index 000000000..c4be84517
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/common/setup.c
@@ -0,0 +1,128 @@
+/*
+ *  ADM5120 specific setup
+ *
+ *  Copyright (C) 2007-2009 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This code was based on the ADM5120 specific port of the Linux 2.6.10 kernel
+ *  done by Jeroen Vreeken
+ *	Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
+ *
+ *  Jeroen's code was based on the Linux 2.4.xx source codes found in various
+ *  tarballs released by Edimax for it's ADM5120 based devices
+ *	Copyright (C) ADMtek Incorporated
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/reboot.h>
+#include <linux/time.h>
+
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/bootinfo.h>
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_switch.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+
+#define ADM5120_SYS_TYPE_LEN	64
+
+unsigned char adm5120_sys_type[ADM5120_SYS_TYPE_LEN];
+void (*adm5120_board_reset)(void);
+
+static char *prom_names[ADM5120_PROM_LAST+1] __initdata = {
+	[ADM5120_PROM_GENERIC]		= "Generic",
+	[ADM5120_PROM_CFE]		= "CFE",
+	[ADM5120_PROM_UBOOT]		= "U-Boot",
+	[ADM5120_PROM_MYLOADER]		= "MyLoader",
+	[ADM5120_PROM_ROUTERBOOT]	= "RouterBOOT",
+	[ADM5120_PROM_BOOTBASE]		= "Bootbase"
+};
+
+static void __init adm5120_report(void)
+{
+	printk(KERN_INFO "SoC      : %s\n", adm5120_sys_type);
+	printk(KERN_INFO "Bootdev  : %s flash\n",
+		adm5120_nand_boot ? "NAND" : "NOR");
+	printk(KERN_INFO "Prom     : %s\n", prom_names[adm5120_prom_type]);
+}
+
+const char *get_system_type(void)
+{
+	return adm5120_sys_type;
+}
+
+static void adm5120_restart(char *command)
+{
+	/* TODO: stop switch before reset */
+
+	if (adm5120_board_reset)
+		adm5120_board_reset();
+
+	SW_WRITE_REG(SWITCH_REG_SOFT_RESET, 1);
+}
+
+static void adm5120_halt(void)
+{
+	local_irq_disable();
+
+	while (1) {
+		if (cpu_wait)
+			cpu_wait();
+	}
+}
+
+void __init plat_time_init(void)
+{
+	mips_hpt_frequency = adm5120_speed / 2;
+}
+
+void __init plat_mem_setup(void)
+{
+	adm5120_soc_init();
+	adm5120_mem_init();
+
+	sprintf(adm5120_sys_type, "ADM%04X%s rev %u, running at %lu.%03lu MHz",
+		adm5120_product_code,
+		adm5120_package_bga() ? "" : "P",
+		adm5120_revision,
+		(adm5120_speed / 1000000), (adm5120_speed / 1000) % 1000);
+
+	adm5120_report();
+
+	_machine_restart = adm5120_restart;
+	_machine_halt = adm5120_halt;
+	pm_power_off = adm5120_halt;
+
+	set_io_port_base(KSEG1);
+}
+
+static int __init adm5120_board_setup(void)
+{
+	adm5120_gpio_init();
+
+	mips_machine_setup();
+
+	return 0;
+}
+arch_initcall(adm5120_board_setup);
+
+static void __init adm5120_generic_board_setup(void)
+{
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+
+	adm5120_add_device_flash(0);
+	adm5120_add_device_switch(6, NULL);
+}
+
+MIPS_MACHINE(MACH_ADM5120_GENERIC, "Generic", "Generic ADM5120 board",
+	     adm5120_generic_board_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/compex/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/compex/Makefile
new file mode 100644
index 000000000..8c66c171e
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/compex/Makefile
@@ -0,0 +1,5 @@
+obj-y	+= compex.o
+
+obj-$(CONFIG_ADM5120_MACH_NP27G)	+= np27g.o
+obj-$(CONFIG_ADM5120_MACH_NP28G)	+= np28g.o
+obj-$(CONFIG_ADM5120_MACH_WP54)		+= wp54.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/compex/compex.c b/target/linux/adm5120/files/arch/mips/adm5120/compex/compex.c
new file mode 100644
index 000000000..c14655ada
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/compex/compex.c
@@ -0,0 +1,64 @@
+/*
+ *  Compex boards
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "compex.h"
+
+#include <asm/mach-adm5120/prom/myloader.h>
+
+#define COMPEX_GPIO_DEV_MASK	(1 << ADM5120_GPIO_PIN5)
+
+static void switch_bank_gpio5(unsigned bank)
+{
+	switch (bank) {
+	case 0:
+		gpio_set_value(ADM5120_GPIO_PIN5, 0);
+		break;
+	case 1:
+		gpio_set_value(ADM5120_GPIO_PIN5, 1);
+		break;
+	}
+}
+
+void __init compex_mac_setup(void)
+{
+	if (myloader_present()) {
+		int i;
+
+		for (i = 0; i < 6; i++) {
+			if (is_valid_ether_addr(myloader_info.macs[i]))
+				memcpy(adm5120_eth_macs[i],
+					myloader_info.macs[i], ETH_ALEN);
+			else
+				random_ether_addr(adm5120_eth_macs[i]);
+		}
+	} else {
+		u8 mac[ETH_ALEN];
+
+		random_ether_addr(mac);
+		adm5120_setup_eth_macs(mac);
+	}
+}
+
+void __init compex_generic_setup(void)
+{
+	gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
+	gpio_direction_output(ADM5120_GPIO_PIN5, 0);
+
+	adm5120_flash0_data.switch_bank = switch_bank_gpio5;
+	adm5120_add_device_flash(0);
+
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+
+	adm5120_add_device_gpio(COMPEX_GPIO_DEV_MASK);
+
+	compex_mac_setup();
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/compex/compex.h b/target/linux/adm5120/files/arch/mips/adm5120/compex/compex.h
new file mode 100644
index 000000000..124e67697
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/compex/compex.h
@@ -0,0 +1,23 @@
+/*
+ *  Compex boards
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/etherdevice.h>
+
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+
+extern void compex_generic_setup(void) __init;
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/compex/np27g.c b/target/linux/adm5120/files/arch/mips/adm5120/compex/np27g.c
new file mode 100644
index 000000000..82da46d1c
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/compex/np27g.c
@@ -0,0 +1,28 @@
+/*
+ *  Compex NP27G board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "compex.h"
+
+static u8 np27g_vlans[6] __initdata = {
+	/* FIXME: untested */
+	0x41, 0x42, 0x44, 0x48, 0x50, 0x00
+};
+
+static void __init np27g_setup(void)
+{
+	compex_generic_setup();
+	adm5120_add_device_switch(5, np27g_vlans);
+	adm5120_add_device_usb();
+
+	/* TODO: add PCI IRQ map */
+}
+
+MIPS_MACHINE(MACH_ADM5120_NP27G, "NP27G", "Compex NetPassage 27G", np27g_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/compex/np28g.c b/target/linux/adm5120/files/arch/mips/adm5120/compex/np28g.c
new file mode 100644
index 000000000..a54143999
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/compex/np28g.c
@@ -0,0 +1,63 @@
+/*
+ *  Compex NP28G board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "compex.h"
+
+static struct adm5120_pci_irq np28g_pci_irqs[] __initdata = {
+	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
+	PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI0),
+	PCIIRQ(3, 1, 2, ADM5120_IRQ_PCI1),
+	PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2)
+};
+
+static struct gpio_led np28g_gpio_leds[] __initdata = {
+	GPIO_LED_INV(ADM5120_GPIO_PIN2, "diag",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_PIN3, "power",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_PIN6, "wan_cond",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_PIN7, "wifi",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L2, "usb1",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan1",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L2, "usb2",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan2",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L2, "usb3",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan3",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L2, "usb4",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L0, "wan",		NULL),
+};
+
+static u8 np28g_vlans[6] __initdata = {
+	0x50, 0x42, 0x44, 0x48, 0x00, 0x00
+};
+
+static void np28g_reset(void)
+{
+	gpio_set_value(ADM5120_GPIO_PIN4, 0);
+}
+
+static void __init np28g_setup(void)
+{
+	compex_generic_setup();
+
+	/* setup reset line */
+	gpio_request(ADM5120_GPIO_PIN4, NULL);
+	gpio_direction_output(ADM5120_GPIO_PIN4, 1);
+	adm5120_board_reset = np28g_reset;
+
+	adm5120_add_device_switch(4, np28g_vlans);
+	adm5120_add_device_usb();
+
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(np28g_gpio_leds),
+					np28g_gpio_leds);
+
+	adm5120_pci_set_irq_map(ARRAY_SIZE(np28g_pci_irqs), np28g_pci_irqs);
+}
+
+MIPS_MACHINE(MACH_ADM5120_NP28G, "NP28G", "Compex NetPassage 28G", np28g_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/compex/wp54.c b/target/linux/adm5120/files/arch/mips/adm5120/compex/wp54.c
new file mode 100644
index 000000000..8aa35c555
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/compex/wp54.c
@@ -0,0 +1,95 @@
+/*
+ *  Compex WP54 board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "compex.h"
+
+#define WP54_KEYS_POLL_INTERVAL		20
+#define WP54_KEYS_DEBOUNCE_INTERVAL	(3 * WP54_KEYS_POLL_INTERVAL)
+
+static struct mtd_partition wp54g_wrt_partitions[] = {
+	{
+		.name	= "cfe",
+		.offset	= 0,
+		.size	= 0x050000,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "trx",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 0x3A0000,
+	} , {
+		.name	= "nvram",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 0x010000,
+	}
+};
+
+static struct adm5120_pci_irq wp54_pci_irqs[] __initdata = {
+	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
+};
+
+static struct gpio_keys_button wp54_gpio_buttons[] __initdata = {
+	{
+		.desc		= "reset_button",
+		.type		= EV_KEY,
+		.code           = KEY_RESTART,
+		.debounce_interval = WP54_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= ADM5120_GPIO_PIN4,
+	}
+};
+
+static struct gpio_led wp54_gpio_leds[] __initdata = {
+	GPIO_LED_INV(ADM5120_GPIO_PIN2, "diag",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_PIN6, "wlan",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_PIN7, "wan",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan2",	NULL),
+};
+
+static u8 wp54_vlans[6] __initdata = {
+	0x41, 0x42, 0x00, 0x00, 0x00, 0x00
+};
+
+static void wp54_reset(void)
+{
+	gpio_set_value(ADM5120_GPIO_PIN3, 0);
+}
+
+static void __init wp54_setup(void)
+{
+	compex_generic_setup();
+
+	/* setup reset line */
+	gpio_request(ADM5120_GPIO_PIN3, NULL);
+	gpio_direction_output(ADM5120_GPIO_PIN3, 1);
+	adm5120_board_reset = wp54_reset;
+
+	adm5120_add_device_switch(2, wp54_vlans);
+	adm5120_register_gpio_buttons(-1, WP54_KEYS_POLL_INTERVAL,
+				      ARRAY_SIZE(wp54_gpio_buttons),
+				      wp54_gpio_buttons);
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(wp54_gpio_leds),
+					wp54_gpio_leds);
+
+	adm5120_pci_set_irq_map(ARRAY_SIZE(wp54_pci_irqs), wp54_pci_irqs);
+}
+
+MIPS_MACHINE(MACH_ADM5120_WP54, "WP54", "Compex WP54 family", wp54_setup);
+
+static void __init wp54_wrt_setup(void)
+{
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(wp54g_wrt_partitions);
+	adm5120_flash0_data.parts = wp54g_wrt_partitions;
+
+	wp54_setup();
+}
+
+MIPS_MACHINE(MACH_ADM5120_WP54G_WRT, "WP54G-WRT", "Compex WP54G-WRT",
+	     wp54_wrt_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/edimax/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/edimax/Makefile
new file mode 100644
index 000000000..1286ed4c1
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/edimax/Makefile
@@ -0,0 +1,5 @@
+obj-y	:= br-61xx.o
+
+obj-$(CONFIG_ADM5120_MACH_BR_6104K)	+= br-6104k.o
+obj-$(CONFIG_ADM5120_MACH_BR_6104KP)	+= br-6104kp.o
+obj-$(CONFIG_ADM5120_MACH_BR_61X4WG)	+= br-61x4wg.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-6104k.c b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-6104k.c
new file mode 100644
index 000000000..8b2b44550
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-6104k.c
@@ -0,0 +1,36 @@
+/*
+ *  Edimax BR-6104K board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "br-61xx.h"
+
+static struct gpio_led br6104k_gpio_leds[] __initdata = {
+	GPIO_LED_STD(ADM5120_GPIO_PIN0, "power",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L1, "wan_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "wan_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan1_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan1_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan2_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan2_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L1, "lan3_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan3_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L1, "lan4_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L0, "lan4_lnkact",	NULL),
+};
+
+static void __init br6104k_setup(void)
+{
+	br61xx_generic_setup();
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(br6104k_gpio_leds),
+					br6104k_gpio_leds);
+}
+
+MIPS_MACHINE(MACH_ADM5120_BR6104K, "BR-6104K", "Edimax BR-6104K",
+	     br6104k_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-6104kp.c b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-6104kp.c
new file mode 100644
index 000000000..034575d6b
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-6104kp.c
@@ -0,0 +1,39 @@
+/*
+ *  Edimax BR-6104KP board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "br-61xx.h"
+
+static struct gpio_led br6104kp_gpio_leds[] __initdata = {
+	GPIO_LED_STD(ADM5120_GPIO_PIN0, "power",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_PIN3, "usb1",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_PIN1, "usb2",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L1, "wan_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "wan_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan1_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan1_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan2_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan2_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L1, "lan3_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan3_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L1, "lan4_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L0, "lan4_lnkact",	NULL),
+};
+
+static void __init br6104kp_setup(void)
+{
+	br61xx_generic_setup();
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(br6104kp_gpio_leds),
+					br6104kp_gpio_leds);
+	adm5120_add_device_usb();
+}
+
+MIPS_MACHINE(MACH_ADM5120_BR6104KP, "BR-6104KP", "Edimax BR-6104KP",
+	     br6104kp_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-61x4wg.c b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-61x4wg.c
new file mode 100644
index 000000000..5d5750710
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-61x4wg.c
@@ -0,0 +1,43 @@
+/*
+ *  Edimax BR-6104Wg/6114WG board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "br-61xx.h"
+
+static struct adm5120_pci_irq br61x4wg_pci_irqs[] __initdata = {
+	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
+};
+
+static struct gpio_led br61x4wg_gpio_leds[] __initdata = {
+	GPIO_LED_STD(ADM5120_GPIO_PIN0, "power",	NULL),
+	GPIO_LED_STD(ADM5120_GPIO_PIN5, "wlan",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L1, "wan_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "wan_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan1_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan1_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan2_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan2_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L1, "lan3_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan3_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L1, "lan4_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L0, "lan4_lnkact",	NULL),
+};
+
+static void __init br61x4wg_setup(void)
+{
+	br61xx_generic_setup();
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(br61x4wg_gpio_leds),
+					br61x4wg_gpio_leds);
+	adm5120_pci_set_irq_map(ARRAY_SIZE(br61x4wg_pci_irqs),
+					br61x4wg_pci_irqs);
+}
+
+MIPS_MACHINE(MACH_ADM5120_BR61X4WG, "BR-6104WG", "Edimax BR-6104WG/6114WG",
+	     br61x4wg_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-61xx.c b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-61xx.c
new file mode 100644
index 000000000..cc64ccba2
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-61xx.c
@@ -0,0 +1,88 @@
+/*
+ *  Edimax BR-61xx support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "br-61xx.h"
+
+#include <prom/admboot.h>
+
+#define BR61XX_GPIO_DEV_MASK	0
+
+#define BR61XX_CONFIG_OFFSET	0x8000
+#define BR61XX_CONFIG_SIZE		0x1000
+
+#define BR61XX_KEYS_POLL_INTERVAL	20
+#define BR61XX_KEYS_DEBOUNCE_INTERVAL	(3 * BR61XX_KEYS_POLL_INTERVAL)
+
+static struct mtd_partition br61xx_partitions[] = {
+	{
+		.name	= "admboot",
+		.offset	= 0,
+		.size	= 32*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "config",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 32*1024,
+	} , {
+		.name	= "firmware",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= MTDPART_SIZ_FULL,
+	}
+};
+
+static struct gpio_keys_button br61xx_gpio_buttons[] __initdata = {
+	{
+		.desc		= "reset_button",
+		.type		= EV_KEY,
+		.code           = KEY_RESTART,
+		.debounce_interval = BR61XX_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= ADM5120_GPIO_PIN2,
+	}
+};
+
+static u8 br61xx_vlans[6] __initdata = {
+	0x41, 0x42, 0x44, 0x48, 0x50, 0x00
+};
+
+static void __init br61xx_mac_setup(void)
+{
+	u8 mac_base[6];
+	int err;
+
+	err = admboot_get_mac_base(BR61XX_CONFIG_OFFSET,
+				   BR61XX_CONFIG_SIZE, mac_base);
+
+	if ((err) || !is_valid_ether_addr(mac_base))
+		random_ether_addr(mac_base);
+
+	adm5120_setup_eth_macs(mac_base);
+}
+
+void __init br61xx_generic_setup(void)
+{
+
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(br61xx_partitions);
+	adm5120_flash0_data.parts = br61xx_partitions;
+	adm5120_add_device_flash(0);
+
+	adm5120_add_device_gpio(BR61XX_GPIO_DEV_MASK);
+
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+
+	adm5120_add_device_switch(5, br61xx_vlans);
+
+	adm5120_register_gpio_buttons(-1, BR61XX_KEYS_POLL_INTERVAL,
+				      ARRAY_SIZE(br61xx_gpio_buttons),
+				      br61xx_gpio_buttons);
+
+	br61xx_mac_setup();
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-61xx.h b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-61xx.h
new file mode 100644
index 000000000..c4a9eced5
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/edimax/br-61xx.h
@@ -0,0 +1,23 @@
+/*
+ *  Edimax BR-61xx board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/etherdevice.h>
+
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+
+extern void __init br61xx_generic_setup(void) __init;
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/generic/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/generic/Makefile
new file mode 100644
index 000000000..0c032e3a5
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/generic/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ADM5120_MACH_EB_214A)	+= eb-214a.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/generic/eb-214a.c b/target/linux/adm5120/files/arch/mips/adm5120/generic/eb-214a.c
new file mode 100644
index 000000000..c62c147c5
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/generic/eb-214a.c
@@ -0,0 +1,123 @@
+/*
+ *  EB-214A board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2010 Cezary Jackiewicz <cezary@eko.one.pl>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <asm/addrspace.h>
+#include <asm/byteorder.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/etherdevice.h>
+
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+#include <asm/mach-adm5120/adm5120_defs.h>
+
+
+#define EB214A_GPIO_DEV_MASK	0
+#define EB214A_CONFIG_OFFSET	0x4000
+
+#define EB214A_KEYS_POLL_INTERVAL	20
+#define EB214A_KEYS_DEBOUNCE_INTERVAL	(3 * EB214A_KEYS_POLL_INTERVAL)
+
+static struct mtd_partition eb214a_partitions[] = {
+	{
+		.name	= "bootloader",
+		.offset	= 0,
+		.size	= 32*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "config",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 32*1024,
+	} , {
+		.name	= "firmware",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= MTDPART_SIZ_FULL,
+	}
+};
+
+static struct adm5120_pci_irq eb214a_pci_irqs[] __initdata = {
+	PCIIRQ(4, 0, 1, ADM5120_IRQ_PCI0),
+	PCIIRQ(4, 1, 2, ADM5120_IRQ_PCI0),
+	PCIIRQ(4, 2, 3, ADM5120_IRQ_PCI0),
+};
+
+static struct gpio_led eb214a_gpio_leds[] __initdata = {
+	GPIO_LED_INV(ADM5120_GPIO_PIN7, "power",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L0, "usb1",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L1, "usb2",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L2, "usb3",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L0, "usb4",		NULL),
+};
+
+static struct gpio_keys_button eb214a_gpio_buttons[] __initdata = {
+	{
+		.desc		= "reset",
+		.type		= EV_KEY,
+		.code           = KEY_RESTART,
+		.debounce_interval = EB214A_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= ADM5120_GPIO_PIN1,
+	}
+};
+
+static u8 eb214a_vlans[6] __initdata = {
+	0x41, 0x42, 0x44, 0x48, 0x50, 0x00
+};
+
+static void __init eb214a_mac_setup(void)
+{
+	u8 mac_base[6];
+	u8 *cfg;
+	int i;
+
+	cfg = (u8 *) KSEG1ADDR(ADM5120_SRAM0_BASE + EB214A_CONFIG_OFFSET);
+	for (i = 0; i < 6; i++)
+		mac_base[i] = cfg[i];
+
+	if (!is_valid_ether_addr(mac_base))
+		random_ether_addr(mac_base);
+
+	adm5120_setup_eth_macs(mac_base);
+}
+
+static void __init eb214a_setup(void)
+{
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(eb214a_partitions);
+	adm5120_flash0_data.parts = eb214a_partitions;
+	adm5120_add_device_flash(0);
+
+	adm5120_add_device_gpio(EB214A_GPIO_DEV_MASK);
+
+	adm5120_add_device_uart(0);
+	/* adm5120_add_device_uart(1); */
+
+	adm5120_add_device_switch(5, eb214a_vlans);
+
+	eb214a_mac_setup();
+
+	adm5120_register_gpio_buttons(-1, EB214A_KEYS_POLL_INTERVAL,
+				      ARRAY_SIZE(eb214a_gpio_buttons),
+				      eb214a_gpio_buttons);
+
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(eb214a_gpio_leds),
+					eb214a_gpio_leds);
+
+	adm5120_pci_set_irq_map(ARRAY_SIZE(eb214a_pci_irqs),
+					eb214a_pci_irqs);
+	/* adm5120_add_device_usb(); */
+}
+
+MIPS_MACHINE(MACH_ADM5120_EB_214A, "EB-214A", "Generic EB-214A", eb214a_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/infineon/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/infineon/Makefile
new file mode 100644
index 000000000..49453cba9
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/infineon/Makefile
@@ -0,0 +1,6 @@
+obj-y	+= infineon.o
+
+obj-$(CONFIG_ADM5120_MACH_EASY5120_RT)		+= easy5120-rt.o
+obj-$(CONFIG_ADM5120_MACH_EASY5120_WVOIP)	+= easy5120-wvoip.o
+obj-$(CONFIG_ADM5120_MACH_EASY5120P_ATA)	+= easy5120p-ata.o
+obj-$(CONFIG_ADM5120_MACH_EASY83000)		+= easy83000.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy5120-rt.c b/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy5120-rt.c
new file mode 100644
index 000000000..31eaee772
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy5120-rt.c
@@ -0,0 +1,48 @@
+/*
+ *  Infineon EASY 5120-RT Reference Board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "infineon.h"
+
+static struct gpio_led easy5120_rt_gpio_leds[] __initdata = {
+	GPIO_LED_INV(ADM5120_GPIO_PIN6, "user",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan0_led1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L1, "lan0_led2",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan1_led1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan1_led2",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan2_led1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan2_led2",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan3_led1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L1, "lan3_led2",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L0, "wan",		NULL),
+};
+
+static struct adm5120_pci_irq easy5120_rt_pci_irqs[] __initdata = {
+	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
+};
+
+static u8 easy5120_rt_vlans[6] __initdata = {
+	0x41, 0x42, 0x44, 0x48, 0x50, 0x00
+};
+
+static void __init easy5120_rt_setup(void)
+{
+	easy_setup_bga();
+
+	adm5120_add_device_switch(5, easy5120_rt_vlans);
+	adm5120_add_device_usb();
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(easy5120_rt_gpio_leds),
+					easy5120_rt_gpio_leds);
+	adm5120_pci_set_irq_map(ARRAY_SIZE(easy5120_rt_pci_irqs),
+				easy5120_rt_pci_irqs);
+}
+
+MIPS_MACHINE(MACH_ADM5120_EASY5120RT, "EASY5120-RT",
+	     "Infineon EASY 5120-RT Reference Board", easy5120_rt_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy5120-wvoip.c b/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy5120-wvoip.c
new file mode 100644
index 000000000..0bf404cc2
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy5120-wvoip.c
@@ -0,0 +1,24 @@
+/*
+ *  Infineon EASY 5120-WVoIP Reference Board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "infineon.h"
+
+static void __init easy5120wvoip_setup(void)
+{
+	easy_setup_bga();
+	adm5120_add_device_switch(6, NULL);
+
+	/* TODO: add VINETIC2 device */
+	/* TODO: setup PCI IRQ map */
+}
+
+MIPS_MACHINE(MACH_ADM5120_EASY5120WVOIP, "EASY5120WVoIP",
+	     "Infineon EASY 5120-WVoIP Reference Board", easy5120wvoip_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy5120p-ata.c b/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy5120p-ata.c
new file mode 100644
index 000000000..fafe0238b
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy5120p-ata.c
@@ -0,0 +1,22 @@
+/*
+ *  Infineon EASY 5120P-ATA Reference Board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "infineon.h"
+
+static void __init easy5120pata_setup(void)
+{
+	easy_setup_pqfp();
+
+	adm5120_add_device_switch(6, NULL);
+}
+
+MIPS_MACHINE(MACH_ADM5120_EASY5120PATA, "EASY5120P-ATA",
+	     "Infineon EASY 5120P-ATA Reference Board", easy5120pata_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy83000.c b/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy83000.c
new file mode 100644
index 000000000..051b85274
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/infineon/easy83000.c
@@ -0,0 +1,23 @@
+/*
+ *  Infineon EASY 83000 Reference Board support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "infineon.h"
+
+static void __init easy83000_setup(void)
+{
+	easy_setup_pqfp();
+	adm5120_add_device_switch(6, NULL);
+
+	/* TODO: add VINAX device */
+}
+
+MIPS_MACHINE(MACH_ADM5120_EASY83000, "EASY8300",
+	     "Infineon EASY 83000 Reference Board", easy83000_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/infineon/infineon.c b/target/linux/adm5120/files/arch/mips/adm5120/infineon/infineon.c
new file mode 100644
index 000000000..5c441da90
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/infineon/infineon.c
@@ -0,0 +1,108 @@
+/*
+ *  Infineon Reference Boards
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "infineon.h"
+
+#include <prom/admboot.h>
+
+#define EASY_CONFIG_OFFSET	0x10000
+#define EASY_CONFIG_SIZE	0x1000
+
+static struct mtd_partition easy_partitions[] = {
+	{
+		.name	= "admboot",
+		.offset	= 0,
+		.size	= 64*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "boardcfg",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 64*1024,
+	} , {
+		.name	= "firmware",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= MTDPART_SIZ_FULL,
+	}
+};
+
+static __init void easy_setup_mac(void)
+{
+	u8 mac_base[6];
+	int err;
+
+	err = admboot_get_mac_base(EASY_CONFIG_OFFSET,
+				   EASY_CONFIG_SIZE, mac_base);
+
+	if ((err) || !is_valid_ether_addr(mac_base))
+		random_ether_addr(mac_base);
+
+	adm5120_setup_eth_macs(mac_base);
+}
+
+static void switch_bank_gpio3(unsigned bank)
+{
+	switch (bank) {
+	case 0:
+		gpio_set_value(ADM5120_GPIO_PIN3, 0);
+		break;
+	case 1:
+		gpio_set_value(ADM5120_GPIO_PIN3, 1);
+		break;
+	}
+}
+
+void __init easy_setup_pqfp(void)
+{
+	/* setup flash A20 line */
+	gpio_request(ADM5120_GPIO_PIN3, NULL);
+	gpio_direction_output(ADM5120_GPIO_PIN3, 0);
+	adm5120_flash0_data.switch_bank = switch_bank_gpio3;
+
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(easy_partitions);
+	adm5120_flash0_data.parts = easy_partitions;
+
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+
+	adm5120_add_device_flash(0);
+
+	easy_setup_mac();
+}
+
+static void switch_bank_gpio5(unsigned bank)
+{
+	switch (bank) {
+	case 0:
+		gpio_set_value(ADM5120_GPIO_PIN5, 0);
+		break;
+	case 1:
+		gpio_set_value(ADM5120_GPIO_PIN5, 1);
+		break;
+	}
+}
+
+void __init easy_setup_bga(void)
+{
+	/* setup flash A20 line */
+	gpio_request(ADM5120_GPIO_PIN5, NULL);
+	gpio_direction_output(ADM5120_GPIO_PIN5, 0);
+	adm5120_flash0_data.switch_bank = switch_bank_gpio5;
+
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(easy_partitions);
+	adm5120_flash0_data.parts = easy_partitions;
+
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+
+	adm5120_add_device_flash(0);
+
+	easy_setup_mac();
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/infineon/infineon.h b/target/linux/adm5120/files/arch/mips/adm5120/infineon/infineon.h
new file mode 100644
index 000000000..a5f28b4fe
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/infineon/infineon.h
@@ -0,0 +1,25 @@
+/*
+ *  Infineon Reference Boards
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/etherdevice.h>
+
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+#include <asm/mach-adm5120/adm5120_info.h>
+
+extern void easy_setup_pqfp(void) __init;
+extern void easy_setup_bga(void) __init;
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/Makefile
new file mode 100644
index 000000000..34ea0a3d8
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/Makefile
@@ -0,0 +1,8 @@
+obj-y	+= rb-1xx.o
+
+obj-${CONFIG_ADM5120_MACH_RB_11X}	+= rb-11x.o
+obj-${CONFIG_ADM5120_MACH_RB_133}	+= rb-133.o
+obj-${CONFIG_ADM5120_MACH_RB_133C}	+= rb-133c.o
+obj-${CONFIG_ADM5120_MACH_RB_150}	+= rb-150.o
+obj-${CONFIG_ADM5120_MACH_RB_153}	+= rb-153.o
+obj-${CONFIG_ADM5120_MACH_RB_192}	+= rb-192.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-11x.c b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-11x.c
new file mode 100644
index 000000000..30625c920
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-11x.c
@@ -0,0 +1,36 @@
+/*
+ *  Mikrotik RouterBOARD 111/112 support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "rb-1xx.h"
+
+static struct gpio_led rb11x_gpio_leds[] __initdata = {
+	GPIO_LED_STD(ADM5120_GPIO_PIN3, "user",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L1,	"lan_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan_lnkact",	NULL),
+};
+
+static u8 rb11x_vlans[6] __initdata = {
+	0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static void __init rb11x_setup(void)
+{
+	rb1xx_generic_setup();
+	rb1xx_add_device_nand();
+
+	adm5120_add_device_switch(1, rb11x_vlans);
+	adm5120_add_device_gpio(0);
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(rb11x_gpio_leds),
+					rb11x_gpio_leds);
+}
+
+MIPS_MACHINE(MACH_ADM5120_RB_11X, "11x", "Mikrotik RouterBOARD 111/112",
+	     rb11x_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-133.c b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-133.c
new file mode 100644
index 000000000..4d8fae011
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-133.c
@@ -0,0 +1,41 @@
+/*
+ *  Mikrotik RouterBOARD 133 support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "rb-1xx.h"
+
+static struct gpio_led rb133_gpio_leds[] __initdata = {
+	GPIO_LED_STD(ADM5120_GPIO_PIN6, "power",	NULL),
+	GPIO_LED_STD(ADM5120_GPIO_PIN5, "user",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L1,	"lan1_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0,	"lan1_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L1,	"lan2_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0,	"lan2_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L1,	"lan3_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0,	"lan3_lnkact",	NULL),
+};
+
+static u8 rb133_vlans[6] __initdata = {
+	0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static void __init rb133_setup(void)
+{
+	rb1xx_generic_setup();
+	rb1xx_add_device_nand();
+
+	adm5120_add_device_switch(3, rb133_vlans);
+	adm5120_add_device_gpio(0);
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(rb133_gpio_leds),
+					rb133_gpio_leds);
+}
+
+MIPS_MACHINE(MACH_ADM5120_RB_133, "133", "Mikrotik RouterBOARD 133",
+	     rb133_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-133c.c b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-133c.c
new file mode 100644
index 000000000..11924c132
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-133c.c
@@ -0,0 +1,37 @@
+/*
+ *  Mikrotik RouterBOARD 133C support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "rb-1xx.h"
+
+static struct gpio_led rb133c_gpio_leds[] __initdata = {
+	GPIO_LED_STD(ADM5120_GPIO_PIN6, "power",	NULL),
+	GPIO_LED_STD(ADM5120_GPIO_PIN5, "user",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L1,	"lan1_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0,	"lan1_lnkact",	NULL),
+};
+
+static u8 rb133c_vlans[6] __initdata = {
+	0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static void __init rb133c_setup(void)
+{
+	rb1xx_generic_setup();
+	rb1xx_add_device_nand();
+
+	adm5120_add_device_switch(1, rb133c_vlans);
+	adm5120_add_device_gpio(0);
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(rb133c_gpio_leds),
+					rb133c_gpio_leds);
+}
+
+MIPS_MACHINE(MACH_ADM5120_RB_133C, "133C", "Mikrotik RouterBOARD 133C",
+	     rb133c_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-150.c b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-150.c
new file mode 100644
index 000000000..af9525635
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-150.c
@@ -0,0 +1,137 @@
+/*
+ *  Mikrotik RouterBOARD 150 support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "rb-1xx.h"
+
+#define RB150_NAND_BASE		0x1FC80000
+#define RB150_NAND_SIZE		1
+
+#define RB150_GPIO_NAND_READY	ADM5120_GPIO_PIN0
+#define RB150_GPIO_NAND_NCE	ADM5120_GPIO_PIN1
+#define RB150_GPIO_NAND_CLE	ADM5120_GPIO_P2L2
+#define RB150_GPIO_NAND_ALE	ADM5120_GPIO_P3L2
+#define RB150_GPIO_RESET_BUTTON	ADM5120_GPIO_PIN1 /* FIXME */
+
+#define RB150_GPIO_DEV_MASK	(1 << RB150_GPIO_NAND_READY	\
+				| 1 << RB150_GPIO_NAND_NCE	\
+				| 1 << RB150_GPIO_NAND_CLE	\
+				| 1 << RB150_GPIO_NAND_ALE)
+
+#define RB150_NAND_DELAY	100
+
+#define RB150_NAND_WRITE(v) \
+	writeb((v), (void __iomem *)KSEG1ADDR(RB150_NAND_BASE))
+
+static struct resource rb150_nand_resources[] __initdata = {
+	[0] = {
+		.start	= RB150_NAND_BASE,
+		.end	= RB150_NAND_BASE + RB150_NAND_SIZE-1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct gpio_led rb150_gpio_leds[] __initdata = {
+	GPIO_LED_STD(ADM5120_GPIO_P0L2, "user",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L1, "lan1_led1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan1_led2",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan5_led1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan5_led2",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan4_led1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan4_led2",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L1, "lan3_led1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan3_led2",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L1, "lan2_led1",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L0, "lan2_led2",	NULL),
+};
+
+static u8 rb150_vlans[6] __initdata = {
+	0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static int rb150_nand_dev_ready(struct mtd_info *mtd)
+{
+	return gpio_get_value(RB150_GPIO_NAND_READY);
+}
+
+static void rb150_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+		unsigned int ctrl)
+{
+	if (ctrl & NAND_CTRL_CHANGE) {
+		gpio_set_value(RB150_GPIO_NAND_CLE, (ctrl & NAND_CLE) ? 1 : 0);
+		gpio_set_value(RB150_GPIO_NAND_ALE, (ctrl & NAND_ALE) ? 1 : 0);
+		gpio_set_value(RB150_GPIO_NAND_NCE, (ctrl & NAND_NCE) ? 0 : 1);
+	}
+
+	udelay(RB150_NAND_DELAY);
+
+	if (cmd != NAND_CMD_NONE)
+		RB150_NAND_WRITE(cmd);
+}
+
+static void __init rb150_add_device_nand(void)
+{
+	struct platform_device *pdev;
+	int err;
+
+	/* setup GPIO pins for NAND flash chip */
+	gpio_request(RB150_GPIO_NAND_READY, "nand-ready");
+	gpio_direction_input(RB150_GPIO_NAND_READY);
+	gpio_request(RB150_GPIO_NAND_NCE, "nand-nce");
+	gpio_direction_output(RB150_GPIO_NAND_NCE, 1);
+	gpio_request(RB150_GPIO_NAND_CLE, "nand-cle");
+	gpio_direction_output(RB150_GPIO_NAND_CLE, 0);
+	gpio_request(RB150_GPIO_NAND_ALE, "nand-ale");
+	gpio_direction_output(RB150_GPIO_NAND_ALE, 0);
+
+	pdev = platform_device_alloc("gen_nand", -1);
+	if (!pdev)
+		goto err_out;
+
+	err = platform_device_add_resources(pdev, rb150_nand_resources,
+					ARRAY_SIZE(rb150_nand_resources));
+	if (err)
+		goto err_put;
+
+
+	rb1xx_nand_data.ctrl.cmd_ctrl = rb150_nand_cmd_ctrl;
+	rb1xx_nand_data.ctrl.dev_ready = rb150_nand_dev_ready;
+
+	err = platform_device_add_data(pdev, &rb1xx_nand_data,
+					sizeof(rb1xx_nand_data));
+	if (err)
+		goto err_put;
+
+	err = platform_device_add(pdev);
+	if (err)
+		goto err_put;
+
+	return;
+
+err_put:
+	platform_device_put(pdev);
+err_out:
+	return;
+}
+
+static void __init rb150_setup(void)
+{
+	rb1xx_gpio_buttons[0].gpio = RB150_GPIO_RESET_BUTTON;
+	rb1xx_generic_setup();
+	rb150_add_device_nand();
+
+	adm5120_add_device_gpio(RB150_GPIO_DEV_MASK);
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(rb150_gpio_leds),
+					rb150_gpio_leds);
+	adm5120_add_device_switch(5, rb150_vlans);
+}
+
+MIPS_MACHINE(MACH_ADM5120_RB_150, "miniROUTER", "Mikrotik RouterBOARD 150",
+	     rb150_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-153.c b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-153.c
new file mode 100644
index 000000000..b2ebdc7c1
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-153.c
@@ -0,0 +1,75 @@
+/*
+ *  Mikrotik RouterBOARD 153 support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "rb-1xx.h"
+
+#define RB153_GPIO_DEV_MASK	(1 << ADM5120_GPIO_PIN0 \
+				| 1 << ADM5120_GPIO_PIN3 \
+				| 1 << ADM5120_GPIO_PIN4)
+
+static struct resource rb153_cf_resources[] __initdata = {
+	{
+		.name	= "cf_membase",
+		.start	= ADM5120_EXTIO1_BASE,
+		.end	= ADM5120_EXTIO1_BASE + ADM5120_EXTIO1_SIZE-1 ,
+		.flags	= IORESOURCE_MEM
+	}, {
+		.name	= "cf_irq",
+		.start	= ADM5120_IRQ_GPIO4,
+		.end	= ADM5120_IRQ_GPIO4,
+		.flags	= IORESOURCE_IRQ
+	}
+};
+
+static struct gpio_led rb153_gpio_leds[] __initdata = {
+	GPIO_LED_STD(ADM5120_GPIO_PIN5, "user",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L1, "lan1_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan1_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan5_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan5_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan4_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan4_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L1, "lan3_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan3_lnkact",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L1, "lan2_speed",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L0, "lan2_lnkact",	NULL),
+};
+
+static u8 rb153_vlans[6] __initdata = {
+	0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static void __init rb153_add_device_cf(void)
+{
+	/* enable CSX1:INTX1 on GPIO[3:4] for the CF slot */
+	adm5120_gpio_csx1_enable();
+
+	/* enable the wait state pin GPIO[0] for external I/O control */
+	adm5120_gpio_ew_enable();
+
+	platform_device_register_simple("pata-rb153-cf", -1,
+			rb153_cf_resources, ARRAY_SIZE(rb153_cf_resources));
+}
+
+static void __init rb153_setup(void)
+{
+	rb1xx_generic_setup();
+	rb1xx_add_device_nand();
+	rb153_add_device_cf();
+
+	adm5120_add_device_gpio(RB153_GPIO_DEV_MASK);
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(rb153_gpio_leds),
+					rb153_gpio_leds);
+	adm5120_add_device_switch(5, rb153_vlans);
+}
+
+MIPS_MACHINE(MACH_ADM5120_RB_153, "150", "Mikrotik RouterBOARD 153",
+	     rb153_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-192.c b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-192.c
new file mode 100644
index 000000000..8cf8941b7
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-192.c
@@ -0,0 +1,28 @@
+/*
+ *  Mikrotik RouterBOARD 192 support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "rb-1xx.h"
+
+static u8 rb192_vlans[6] __initdata = {
+	0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static void __init rb192_setup(void)
+{
+	rb1xx_generic_setup();
+	rb1xx_add_device_nand();
+
+	adm5120_add_device_gpio(0);
+	adm5120_add_device_switch(6, rb192_vlans);
+}
+
+MIPS_MACHINE(MACH_ADM5120_RB_192, "192", "Mikrotik RouterBOARD 192",
+	     rb192_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-1xx.c b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-1xx.c
new file mode 100644
index 000000000..2ad8c4220
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-1xx.c
@@ -0,0 +1,150 @@
+/*
+ *  Mikrotik RouterBOARD 1xx series support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  NAND initialization code was based on a driver for Linux 2.6.19+ which
+ *  was derived from the driver for Linux 2.4.xx published by Mikrotik for
+ *  their RouterBoard 1xx and 5xx series boards.
+ *    Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
+ *    Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "rb-1xx.h"
+
+#define RB1XX_NAND_CHIP_DELAY	25
+
+#define RB1XX_KEYS_POLL_INTERVAL	20
+#define RB1XX_KEYS_DEBOUNCE_INTERVAL	(3 * RB1XX_KEYS_POLL_INTERVAL)
+
+static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
+	PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0),
+	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1),
+	PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2)
+};
+
+static struct mtd_partition rb1xx_nor_parts[] = {
+	{
+		.name	= "booter",
+		.offset	= 0,
+		.size	= 64*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "firmware",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= MTDPART_SIZ_FULL,
+	}
+};
+
+static struct mtd_partition rb1xx_nand_parts[] = {
+	{
+		.name	= "kernel",
+		.offset	= 0,
+		.size	= 4 * 1024 * 1024,
+	} , {
+		.name	= "rootfs",
+		.offset	= MTDPART_OFS_NXTBLK,
+		.size	= MTDPART_SIZ_FULL
+	}
+};
+
+/*
+ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
+ * will not be able to find the kernel that we load.  So set the oobinfo
+ * when creating the partitions
+ */
+static struct nand_ecclayout rb1xx_nand_ecclayout = {
+	.eccbytes	= 6,
+	.eccpos		= { 8, 9, 10, 13, 14, 15 },
+	.oobavail	= 9,
+	.oobfree	= { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
+};
+
+/*--------------------------------------------------------------------------*/
+
+static int rb1xx_nand_fixup(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd->priv;
+
+	if (mtd->writesize == 512)
+		chip->ecc.layout = &rb1xx_nand_ecclayout;
+
+	return 0;
+}
+
+struct platform_nand_data rb1xx_nand_data __initdata = {
+	.chip = {
+		.nr_chips	= 1,
+		.nr_partitions	= ARRAY_SIZE(rb1xx_nand_parts),
+		.partitions	= rb1xx_nand_parts,
+		.chip_delay	= RB1XX_NAND_CHIP_DELAY,
+		.options	= NAND_NO_AUTOINCR,
+		.chip_fixup	= rb1xx_nand_fixup,
+	},
+};
+
+struct gpio_keys_button rb1xx_gpio_buttons[] __initdata = {
+	{
+		.desc		= "reset_button",
+		.type		= EV_KEY,
+		.code           = KEY_RESTART,
+		.debounce_interval = RB1XX_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= ADM5120_GPIO_PIN7,
+	}
+};
+
+static void __init rb1xx_mac_setup(void)
+{
+	if (rb_hs.mac_base != NULL && is_valid_ether_addr(rb_hs.mac_base)) {
+		adm5120_setup_eth_macs(rb_hs.mac_base);
+	} else {
+		u8 mac[ETH_ALEN];
+
+		random_ether_addr(mac);
+		adm5120_setup_eth_macs(mac);
+	}
+}
+
+void __init rb1xx_add_device_flash(void)
+{
+	/* setup data for flash0 device */
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_nor_parts);
+	adm5120_flash0_data.parts = rb1xx_nor_parts;
+	adm5120_flash0_data.window_size = 128*1024;
+
+	adm5120_add_device_flash(0);
+}
+
+void __init rb1xx_add_device_nand(void)
+{
+	/* enable NAND flash interface */
+	adm5120_nand_enable();
+
+	/* initialize NAND chip */
+	adm5120_nand_set_spn(1);
+	adm5120_nand_set_wpn(0);
+
+	adm5120_add_device_nand(&rb1xx_nand_data);
+}
+
+void __init rb1xx_generic_setup(void)
+{
+	if (adm5120_package_bga())
+		adm5120_pci_set_irq_map(ARRAY_SIZE(rb1xx_pci_irqs),
+					rb1xx_pci_irqs);
+
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+
+	adm5120_register_gpio_buttons(-1, RB1XX_KEYS_POLL_INTERVAL,
+				      ARRAY_SIZE(rb1xx_gpio_buttons),
+				      rb1xx_gpio_buttons);
+
+	rb1xx_add_device_flash();
+	rb1xx_mac_setup();
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-1xx.h b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-1xx.h
new file mode 100644
index 000000000..05e68bd0a
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/mikrotik/rb-1xx.h
@@ -0,0 +1,33 @@
+/*
+ *  Mikrotik RouterBOARD 1xx series support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/etherdevice.h>
+
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_nand.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+#include <asm/mach-adm5120/adm5120_info.h>
+
+#include <prom/routerboot.h>
+
+extern struct platform_nand_data rb1xx_nand_data __initdata;
+extern struct gpio_keys_button rb1xx_gpio_buttons[] __initdata;
+
+extern void rb1xx_add_device_flash(void) __init;
+extern void rb1xx_add_device_nand(void) __init;
+extern void rb1xx_generic_setup(void) __init;
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/motorola/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/motorola/Makefile
new file mode 100644
index 000000000..239d5a088
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/motorola/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ADM5120_MACH_PMUGW)		+= pmugw.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/motorola/pmugw.c b/target/linux/adm5120/files/arch/mips/adm5120/motorola/pmugw.c
new file mode 100644
index 000000000..a706e573c
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/motorola/pmugw.c
@@ -0,0 +1,96 @@
+/*
+ *  Motorola Powerline MU Gateway board
+ *
+ *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/etherdevice.h>
+
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+#include <asm/mach-adm5120/adm5120_info.h>
+
+#include <prom/admboot.h>
+
+#define PMUGW_CONFIG_OFFSET	0x10000
+#define PMUGW_CONFIG_SIZE	0x1000
+
+static struct mtd_partition pmugw_partitions[] = {
+	{
+		.name	= "admboot",
+		.offset	= 0,
+		.size	= 64*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "boardcfg",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 64*1024,
+	} , {
+		.name	= "firmware",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= MTDPART_SIZ_FULL,
+	}
+};
+
+static u8 pmugw_vlans[6] __initdata = {
+	0x41, 0x42, 0x44, 0x48, 0x50, 0x00
+};
+
+static __init void pmugw_setup_mac(void)
+{
+	u8 mac_base[6];
+	int err;
+
+	err = admboot_get_mac_base(PMUGW_CONFIG_OFFSET,
+				   PMUGW_CONFIG_SIZE, mac_base);
+
+	if ((err) || !is_valid_ether_addr(mac_base))
+		random_ether_addr(mac_base);
+
+	adm5120_setup_eth_macs(mac_base);
+}
+
+static void switch_bank_gpio5(unsigned bank)
+{
+	switch (bank) {
+	case 0:
+		gpio_set_value(ADM5120_GPIO_PIN5, 0);
+		break;
+	case 1:
+		gpio_set_value(ADM5120_GPIO_PIN5, 1);
+		break;
+	}
+}
+
+void __init pmugw_setup(void)
+{
+	/* setup flash A20 line */
+	gpio_request(ADM5120_GPIO_PIN5, NULL);
+	gpio_direction_output(ADM5120_GPIO_PIN5, 0);
+	adm5120_flash0_data.switch_bank = switch_bank_gpio5;
+
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(pmugw_partitions);
+	adm5120_flash0_data.parts = pmugw_partitions;
+
+	adm5120_add_device_uart(1); /* ttyS0 */
+	adm5120_add_device_uart(0); /* ttyS1 */
+
+	adm5120_add_device_flash(0);
+
+	pmugw_setup_mac();
+	adm5120_add_device_switch(5, pmugw_vlans);
+}
+
+MIPS_MACHINE(MACH_ADM5120_PMUGW, "PMUGW", "Motorola Powerline MU Gateway",
+	     pmugw_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/osbridge/5gxi.c b/target/linux/adm5120/files/arch/mips/adm5120/osbridge/5gxi.c
new file mode 100644
index 000000000..a5c2c3653
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/osbridge/5gxi.c
@@ -0,0 +1,71 @@
+/*
+ *  OSBRiDGE 5GXi/5XLi board support
+ *
+ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/etherdevice.h>
+
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+#include <asm/mach-adm5120/adm5120_info.h>
+
+static struct mtd_partition osbridge_5gxi_partitions[] = {
+	{
+		.name	= "bootloader",
+		.offset	= 0,
+		.size	= 64*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "boardcfg",
+		.offset	= 64*1024,
+		.size	= 64*1024,
+	} , {
+		.name	= "firmware",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= MTDPART_SIZ_FULL,
+	}
+};
+
+static struct gpio_led osbridge_5gxi_gpio_leds[] __initdata = {
+	GPIO_LED_INV(ADM5120_GPIO_PIN6, "5gxi:green:user",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "5gxi:yellow:lan",	NULL),
+};
+
+static struct adm5120_pci_irq osbridge_5gxi_pci_irqs[] __initdata = {
+	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
+};
+
+static u8 osbridge_5gxi_vlans[6] __initdata = {
+	0x41, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static void __init osbridge_5gxi_setup(void)
+{
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(osbridge_5gxi_partitions);
+	adm5120_flash0_data.parts = osbridge_5gxi_partitions;
+
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+
+	adm5120_add_device_flash(0);
+
+	adm5120_add_device_switch(1, osbridge_5gxi_vlans);
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(osbridge_5gxi_gpio_leds),
+					osbridge_5gxi_gpio_leds);
+	adm5120_pci_set_irq_map(ARRAY_SIZE(osbridge_5gxi_pci_irqs),
+				osbridge_5gxi_pci_irqs);
+}
+
+MIPS_MACHINE(MACH_ADM5120_5GXI, "5GXi", "OSBRiDGE 5GXi/5XLi board",
+	     osbridge_5gxi_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/osbridge/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/osbridge/Makefile
new file mode 100644
index 000000000..34946c5e5
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/osbridge/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ADM5120_MACH_5GXI)	+= 5gxi.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/prom/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/prom/Makefile
new file mode 100644
index 000000000..650be4077
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/prom/Makefile
@@ -0,0 +1,10 @@
+#
+# Makefile for the ADMtek ADM5120 SoC specific parts of the kernel
+#
+
+lib-y	+= admboot.o
+lib-y	+= bootbase.o
+lib-y	+= cfe.o
+lib-y	+= generic.o
+lib-y	+= myloader.o
+lib-y	+= routerboot.o
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/prom/admboot.c b/target/linux/adm5120/files/arch/mips/adm5120/prom/admboot.c
new file mode 100644
index 000000000..b655390c1
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/prom/admboot.c
@@ -0,0 +1,55 @@
+/*
+ *  ADMBoot specific prom routines
+ *
+ *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+
+#include <asm/addrspace.h>
+#include <asm/byteorder.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <prom/admboot.h>
+#include "prom_read.h"
+
+#define ADMBOOT_MAGIC_MAC_BASE		0x636D676D	/* 'mgmc' */
+#define ADMBOOT_MAGIC_MAC_BASE_BR6104XX 0x31305348	/* 'HS01' */
+
+int __init admboot_get_mac_base(u32 offset, u32 len, u8 *mac)
+{
+	u8 *cfg;
+	int i;
+
+	cfg = (u8 *) KSEG1ADDR(ADM5120_SRAM0_BASE + offset);
+	for (i = 0; i < len; i += 4) {
+		u32 magic;
+
+		magic = prom_read_le32(cfg + i);
+		if (magic == ADMBOOT_MAGIC_MAC_BASE) {
+			int j;
+
+			for (j = 0; j < 6; j++)
+				mac[j] = cfg[i + 4 + j];
+
+			return 0;
+		}
+		if (magic == ADMBOOT_MAGIC_MAC_BASE_BR6104XX) {
+			int j;
+
+			for (j = 0; j < 6; j++)
+				mac[j] = cfg[i + 7 + j];
+
+			return 0;
+		}
+	}
+
+	return -ENXIO;
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/prom/bootbase.c b/target/linux/adm5120/files/arch/mips/adm5120/prom/bootbase.c
new file mode 100644
index 000000000..063281e3f
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/prom/bootbase.c
@@ -0,0 +1,119 @@
+/*
+ *  ZyXEL's Bootbase specific prom routines
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+#include <asm/byteorder.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <prom/zynos.h>
+#include "prom_read.h"
+
+#define ZYNOS_INFO_ADDR		KSEG1ADDR(ADM5120_SRAM0_BASE+0x3F90)
+#define ZYNOS_HDBG_ADDR		KSEG1ADDR(ADM5120_SRAM0_BASE+0x4000)
+#define BOOTEXT_ADDR_MIN	KSEG1ADDR(ADM5120_SRAM0_BASE)
+#define BOOTEXT_ADDR_MAX	(BOOTEXT_ADDR_MIN + (2*1024*1024))
+
+static int bootbase_found;
+static struct zynos_board_info *board_info;
+
+struct bootbase_info bootbase_info;
+
+static inline int bootbase_dbgarea_present(u8 *data)
+{
+	u32 t;
+
+	t = prom_read_be32(data+5);
+	if (t != ZYNOS_MAGIC_DBGAREA1)
+		return 0;
+
+	t = prom_read_be32(data+9);
+	if (t != ZYNOS_MAGIC_DBGAREA2)
+		return 0;
+
+	return 1;
+}
+
+static inline u32 bootbase_get_bootext_addr(void)
+{
+	return prom_read_be32(&board_info->bootext_addr);
+}
+
+static inline void bootbase_get_mac(u8 *mac)
+{
+	int	i;
+
+	for (i = 0; i < 6; i++)
+		mac[i] = board_info->mac[i];
+}
+
+static inline u16 bootbase_get_vendor_id(void)
+{
+#define CHECK_VENDOR(n) (strnicmp(board_info->vendor, (n), strlen(n)) == 0)
+	unsigned char vendor[ZYNOS_NAME_LEN];
+	int i;
+
+	for (i = 0; i < ZYNOS_NAME_LEN; i++)
+		vendor[i] = board_info->vendor[i];
+
+	if CHECK_VENDOR(ZYNOS_VENDOR_ZYXEL)
+		return ZYNOS_VENDOR_ID_ZYXEL;
+
+	if CHECK_VENDOR(ZYNOS_VENDOR_DLINK)
+		return ZYNOS_VENDOR_ID_DLINK;
+
+	if CHECK_VENDOR(ZYNOS_VENDOR_LUCENT)
+		return ZYNOS_VENDOR_ID_LUCENT;
+
+	if CHECK_VENDOR(ZYNOS_VENDOR_NETGEAR)
+		return ZYNOS_VENDOR_ID_NETGEAR;
+
+	return ZYNOS_VENDOR_ID_OTHER;
+}
+
+static inline u16 bootbase_get_board_id(void)
+{
+	return prom_read_be16(&board_info->board_id);
+}
+
+int __init bootbase_present(void)
+{
+	u32	t;
+
+	if (bootbase_found)
+		goto out;
+
+	/* check presence of the dbgarea */
+	if (bootbase_dbgarea_present((u8 *)ZYNOS_HDBG_ADDR) == 0)
+		goto out;
+
+	board_info = (struct zynos_board_info *)(ZYNOS_INFO_ADDR);
+
+	/* check for a valid BootExt address */
+	t = bootbase_get_bootext_addr();
+	if ((t < BOOTEXT_ADDR_MIN) || (t > BOOTEXT_ADDR_MAX))
+		goto out;
+
+	bootbase_info.vendor_id = bootbase_get_vendor_id();
+	bootbase_info.board_id = bootbase_get_board_id();
+	bootbase_get_mac(bootbase_info.mac);
+
+	bootbase_found = 1;
+
+out:
+	return bootbase_found;
+}
+
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/prom/cfe.c b/target/linux/adm5120/files/arch/mips/adm5120/prom/cfe.c
new file mode 100644
index 000000000..5a343cd7e
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/prom/cfe.c
@@ -0,0 +1,69 @@
+/*
+ *  Broadcom's CFE specific prom routines
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+
+#include <prom/cfe.h>
+#include "prom_read.h"
+
+/*
+ * CFE based boards
+ */
+#define CFE_EPTSEAL	0x43464531 /* CFE1 is the magic number to recognize CFE
+from other bootloaders */
+
+static int cfe_found;
+
+static u32 cfe_handle;
+static u32 cfe_entry;
+static u32 cfe_seal;
+
+int __init cfe_present(void)
+{
+	/*
+	 * This method only works, when we are booted directly from the CFE.
+	 */
+	u32 a1 = (u32) fw_arg1;
+
+	if (cfe_found)
+		return 1;
+
+	cfe_handle = (u32) fw_arg0;
+	cfe_entry = (u32) fw_arg2;
+	cfe_seal = (u32) fw_arg3;
+
+	/* Check for CFE by finding the CFE magic number */
+	if (cfe_seal != CFE_EPTSEAL)
+		return 0;
+
+	/* cfe_a1_val must be 0, because only one CPU present in the ADM5120 */
+	if (a1 != 0)
+		return 0;
+
+	/* The cfe_handle, and the cfe_entry must be kernel mode addresses */
+	if ((cfe_handle < KSEG0) || (cfe_entry < KSEG0))
+		return 0;
+
+	cfe_found = 1;
+	return 1;
+}
+
+char *cfe_getenv(char *envname)
+{
+	if (cfe_found == 0)
+		return NULL;
+
+	return NULL;
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/prom/generic.c b/target/linux/adm5120/files/arch/mips/adm5120/prom/generic.c
new file mode 100644
index 000000000..4d4caa847
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/prom/generic.c
@@ -0,0 +1,47 @@
+/*
+ *  Generic PROM routines
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+
+#include <prom/generic.h>
+
+static int *_prom_argc;
+static char **_prom_argv;
+static char **_prom_envp;
+
+char *generic_prom_getenv(char *envname)
+{
+	char **env;
+	char *ret;
+
+	ret = NULL;
+	for (env = _prom_envp; *env != NULL; env++) {
+		if (strcmp(envname, *env++) == 0) {
+			ret = *env;
+			break;
+		}
+	}
+
+	return ret;
+}
+
+int generic_prom_present(void)
+{
+	_prom_argc = (int *)fw_arg0;
+	_prom_argv = (char **)fw_arg1;
+	_prom_envp = (char **)fw_arg2;
+
+	return 1;
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/prom/myloader.c b/target/linux/adm5120/files/arch/mips/adm5120/prom/myloader.c
new file mode 100644
index 000000000..5357db511
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/prom/myloader.c
@@ -0,0 +1,68 @@
+/*
+ *  Compex's MyLoader specific prom routines
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+#include <asm/byteorder.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <prom/myloader.h>
+#include "prom_read.h"
+
+#define SYS_PARAMS_ADDR		KSEG1ADDR(ADM5120_SRAM0_BASE+0x0F000)
+#define BOARD_PARAMS_ADDR	KSEG1ADDR(ADM5120_SRAM0_BASE+0x0F800)
+#define PART_TABLE_ADDR		KSEG1ADDR(ADM5120_SRAM0_BASE+0x10000)
+
+static int myloader_found;
+
+struct myloader_info myloader_info;
+
+int __init myloader_present(void)
+{
+	struct mylo_system_params *sysp;
+	struct mylo_board_params *boardp;
+	struct mylo_partition_table *parts;
+	int i;
+
+	if (myloader_found)
+		goto out;
+
+	sysp = (struct mylo_system_params *)(SYS_PARAMS_ADDR);
+	boardp = (struct mylo_board_params *)(BOARD_PARAMS_ADDR);
+	parts = (struct mylo_partition_table *)(PART_TABLE_ADDR);
+
+	/* Check for some magic numbers */
+	if ((le32_to_cpu(sysp->magic) != MYLO_MAGIC_SYS_PARAMS) ||
+	   (le32_to_cpu(boardp->magic) != MYLO_MAGIC_BOARD_PARAMS) ||
+	   (le32_to_cpu(parts->magic) != MYLO_MAGIC_PARTITIONS))
+		goto out;
+
+	myloader_info.vid = le32_to_cpu(sysp->vid);
+	myloader_info.did = le32_to_cpu(sysp->did);
+	myloader_info.svid = le32_to_cpu(sysp->svid);
+	myloader_info.sdid = le32_to_cpu(sysp->sdid);
+
+	for (i = 0; i < MYLO_ETHADDR_COUNT; i++) {
+		int j;
+		for (j = 0; j < 6; j++)
+			myloader_info.macs[i][j] = boardp->addr[i].mac[j];
+	}
+
+	myloader_found = 1;
+
+out:
+	return myloader_found;
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/prom/prom_read.h b/target/linux/adm5120/files/arch/mips/adm5120/prom/prom_read.h
new file mode 100644
index 000000000..1a6ea110c
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/prom/prom_read.h
@@ -0,0 +1,50 @@
+/*
+ *  Generic prom definitions
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _ADM5120_PROM_H_
+#define _ADM5120_PROM_H_
+
+/*
+ * Helper routines
+ */
+static inline u16 prom_read_le16(void *buf)
+{
+	u8 *p = buf;
+
+	return ((u16)p[0] + ((u16)p[1] << 8));
+}
+
+static inline u32 prom_read_le32(void *buf)
+{
+	u8 *p = buf;
+
+	return ((u32)p[0] + ((u32)p[1] << 8) + ((u32)p[2] << 16) +
+		((u32)p[3] << 24));
+}
+
+static inline u16 prom_read_be16(void *buf)
+{
+	u8 *p = buf;
+
+	return (((u16)p[0] << 8) + (u16)p[1]);
+}
+
+static inline u32 prom_read_be32(void *buf)
+{
+	u8 *p = buf;
+
+	return (((u32)p[0] << 24) + ((u32)p[1] << 16) + ((u32)p[2] << 8) +
+		((u32)p[3]));
+}
+
+#endif /* _ADM5120_PROM_H_ */
+
+
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/prom/routerboot.c b/target/linux/adm5120/files/arch/mips/adm5120/prom/routerboot.c
new file mode 100644
index 000000000..d9a06d968
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/prom/routerboot.c
@@ -0,0 +1,121 @@
+/*
+ *  Mikrotik's RouterBOOT specific prom routines
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/module.h>
+#include <linux/routerboot.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <prom/routerboot.h>
+#include "prom_read.h"
+
+struct rb_hard_settings rb_hs;
+static int rb_found;
+
+static int __init routerboot_load_hs(u8 *buf, u16 buflen)
+{
+	u16 id, len;
+
+	memset(&rb_hs, 0, sizeof(rb_hs));
+
+	if (buflen < 4)
+		return -1;
+
+	if (prom_read_le32(buf) != RB_MAGIC_HARD)
+		return -1;
+
+	/* skip magic value */
+	buf += 4;
+	buflen -= 4;
+
+	while (buflen > 2) {
+		id = prom_read_le16(buf);
+		buf += 2;
+		buflen -= 2;
+		if (id == RB_ID_TERMINATOR || buflen < 2)
+			break;
+
+		len = prom_read_le16(buf);
+		buf += 2;
+		buflen -= 2;
+
+		if (buflen < len)
+			break;
+
+		switch (id) {
+		case RB_ID_BIOS_VERSION:
+			rb_hs.bios_ver = (char *)buf;
+			break;
+		case RB_ID_BOARD_NAME:
+			rb_hs.name = (char *)buf;
+			break;
+		case RB_ID_MEMORY_SIZE:
+			rb_hs.mem_size = prom_read_le32(buf);
+			break;
+		case RB_ID_MAC_ADDRESS_COUNT:
+			rb_hs.mac_count = prom_read_le32(buf);
+			break;
+		case RB_ID_MAC_ADDRESS_PACK:
+			if ((len / RB_MAC_SIZE) > 0)
+				rb_hs.mac_base = buf;
+			break;
+		}
+
+		buf += len;
+		buflen -= len;
+
+	}
+
+	return 0;
+}
+
+#define RB_BS_OFFS	0x14
+#define RB_OFFS_MAX	(128*1024)
+
+int __init routerboot_present(void)
+{
+	struct rb_bios_settings	*bs;
+	u8 *base;
+	u32 off, len;
+
+	if (rb_found)
+		goto out;
+
+	base = (u8 *)KSEG1ADDR(ADM5120_SRAM0_BASE);
+	bs = (struct rb_bios_settings *)(base + RB_BS_OFFS);
+
+	off = prom_read_le32(&bs->hs_offs);
+	len = prom_read_le32(&bs->hs_size);
+	if (off > RB_OFFS_MAX)
+		goto out;
+
+	if (routerboot_load_hs(base+off, len) != 0)
+		goto out;
+
+	rb_found = 1;
+
+out:
+	return rb_found;
+}
+
+char *routerboot_get_boardname(void)
+{
+	if (rb_found == 0)
+		return NULL;
+
+	return rb_hs.name;
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/zyxel/Makefile b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/Makefile
new file mode 100644
index 000000000..e8325a1b1
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/Makefile
@@ -0,0 +1,4 @@
+obj-y	+= p-33x.o
+
+obj-${CONFIG_ADM5120_MACH_P_334WT}	+= p-334wt.o
+obj-${CONFIG_ADM5120_MACH_P_335}	+= p-335.o
\ No newline at end of file
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-334wt.c b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-334wt.c
new file mode 100644
index 000000000..6cc9aee85
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-334wt.c
@@ -0,0 +1,34 @@
+/*
+ *  ZyXEL Prestige P-334WT support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "p-33x.h"
+
+static struct gpio_led p334wt_gpio_leds[] __initdata = {
+	GPIO_LED_INV(ADM5120_GPIO_PIN2, "power",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan1",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan2",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan3",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan4",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L0, "wan",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P4L2, "wlan",		NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P2L2, "otist",	NULL),
+	GPIO_LED_INV(ADM5120_GPIO_P1L2, "hidden",	NULL),
+};
+
+static void __init p334wt_setup(void)
+{
+	p33x_generic_setup();
+	adm5120_add_device_gpio_leds(ARRAY_SIZE(p334wt_gpio_leds),
+					p334wt_gpio_leds);
+}
+
+MIPS_MACHINE(MACH_ADM5120_P334WT, "P-334WT", "ZyXEL Prestige 334WT",
+	     p334wt_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-335.c b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-335.c
new file mode 100644
index 000000000..6ac2b0915
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-335.c
@@ -0,0 +1,21 @@
+/*
+ *  ZyXEL Prestige P-335/335WT support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "p-33x.h"
+
+static void __init p335_setup(void)
+{
+	p33x_generic_setup();
+	adm5120_add_device_usb();
+}
+
+MIPS_MACHINE(MACH_ADM5120_P335, "P-335", "ZyXEL Prestige 335/335WT",
+	     p335_setup);
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-33x.c b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-33x.c
new file mode 100644
index 000000000..7f86cab85
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-33x.c
@@ -0,0 +1,89 @@
+/*
+ *  ZyXEL Prestige P-33x boards support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include "p-33x.h"
+
+#include <prom/zynos.h>
+
+#define P33X_GPIO_FLASH_A20	ADM5120_GPIO_PIN5
+#define P33X_GPIO_DEV_MASK	(1 << P33X_GPIO_FLASH_A20)
+
+static struct mtd_partition p33x_partitions[] = {
+	{
+		.name	= "bootbase",
+		.offset	= 0,
+		.size	= 16*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "rom",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 16*1024,
+		.mask_flags = MTD_WRITEABLE,
+	} , {
+		.name	= "bootext1",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 32*1024,
+	} , {
+		.name	= "bootext2",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= 64*1024,
+	} , {
+		.name	= "trx",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= MTDPART_SIZ_FULL,
+	} , {
+		.name	= "firmware",
+		.offset	= 32*1024,
+		.size	= MTDPART_SIZ_FULL,
+	}
+};
+
+static struct adm5120_pci_irq p33x_pci_irqs[] __initdata = {
+	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
+};
+
+static u8 p33x_vlans[6] __initdata = {
+	/* FIXME: untested */
+	0x50, 0x48, 0x44, 0x42, 0x41, 0x00
+};
+
+static void switch_bank_gpio5(unsigned bank)
+{
+	switch (bank) {
+	case 0:
+		gpio_set_value(P33X_GPIO_FLASH_A20, 0);
+		break;
+	case 1:
+		gpio_set_value(P33X_GPIO_FLASH_A20, 1);
+		break;
+	}
+}
+
+void __init p33x_generic_setup(void)
+{
+	/* setup data for flash0 device */
+	gpio_request(P33X_GPIO_FLASH_A20, NULL); /* for flash A20 line */
+	gpio_direction_output(P33X_GPIO_FLASH_A20, 0);
+	adm5120_flash0_data.switch_bank = switch_bank_gpio5;
+	adm5120_flash0_data.nr_parts = ARRAY_SIZE(p33x_partitions);
+	adm5120_flash0_data.parts = p33x_partitions;
+	adm5120_add_device_flash(0);
+
+	adm5120_add_device_uart(0);
+	adm5120_add_device_uart(1);
+
+	adm5120_add_device_gpio(P33X_GPIO_DEV_MASK);
+
+	adm5120_setup_eth_macs(bootbase_info.mac);
+	adm5120_add_device_switch(6, p33x_vlans);
+
+	adm5120_pci_set_irq_map(ARRAY_SIZE(p33x_pci_irqs), p33x_pci_irqs);
+}
diff --git a/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-33x.h b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-33x.h
new file mode 100644
index 000000000..8a7340cb5
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/adm5120/zyxel/p-33x.h
@@ -0,0 +1,22 @@
+/*
+ *  ZyXEL Prestige P-33x boards support
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+
+#include <asm/mips_machine.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+
+extern void p33x_generic_setup(void) __init;
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_defs.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_defs.h
new file mode 100644
index 000000000..bf220ff4d
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_defs.h
@@ -0,0 +1,53 @@
+/*
+ *  ADM5120 SoC definitions
+ *
+ *  This file defines some constants specific to the ADM5120 SoC
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef _ASM_MIPS_MACH_ADM5120_DEFS_H
+#define _ASM_MIPS_MACH_ADM5120_DEFS_H
+
+#define ADM5120_SDRAM0_BASE	0x00000000
+#define ADM5120_SDRAM1_BASE	0x01000000
+#define ADM5120_SRAM1_BASE	0x10000000
+#define ADM5120_EXTIO0_BASE	0x10C00000
+#define ADM5120_EXTIO0_SIZE	0x00200000
+#define ADM5120_EXTIO1_BASE	0x10E00000
+#define ADM5120_EXTIO1_SIZE	0x00200000
+#define ADM5120_MPMC_BASE	0x11000000
+#define ADM5120_MPMC_SIZE	0x00200000
+#define ADM5120_USBC_BASE	0x11200000
+#define ADM5120_USBC_SIZE	0x00200000
+#define ADM5120_PCIMEM_BASE	0x11400000
+#define ADM5120_PCIMEM_SIZE	0x00100000
+#define ADM5120_PCIIO_BASE	0x11500000
+#define ADM5120_PCIIO_SIZE	0x000FFFF0
+#define ADM5120_PCICFG_ADDR	0x115FFFF0
+#define ADM5120_PCICFG_DATA	0x115FFFF8
+#define ADM5120_PCICFG_SIZE	0x00000010
+#define ADM5120_SWITCH_BASE	0x12000000
+#define ADM5120_SWITCH_SIZE	0x00200000
+#define ADM5120_INTC_BASE	0x12200000
+#define ADM5120_INTC_SIZE	0x00200000
+#define ADM5120_UART0_BASE	0x12600000
+#define ADM5120_UART1_BASE	0x12800000
+#define ADM5120_UART_SIZE	0x00200000
+#define ADM5120_SRAM0_BASE	0x1FC00000
+
+#define ADM5120_NAND_BASE	ADM5120_SRAM1_BASE
+#define ADM5120_NAND_SIZE	0xB
+
+#define ADM5120_CLK_175		175000000
+#define ADM5120_CLK_200		200000000
+#define ADM5120_CLK_225		225000000
+#define ADM5120_CLK_250		250000000
+
+#define ADM5120_UART_CLOCK	62500000
+
+#endif /* _ASM_MIPS_MACH_ADM5120_DEFS_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_info.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_info.h
new file mode 100644
index 000000000..1d34d80ee
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_info.h
@@ -0,0 +1,129 @@
+/*
+ *  Copyright (C) 2007-2009 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MACH_ADM5120_INFO_H
+#define _MACH_ADM5120_INFO_H
+
+#include <linux/types.h>
+
+extern unsigned int adm5120_prom_type;
+#define ADM5120_PROM_GENERIC	0
+#define ADM5120_PROM_CFE	1
+#define ADM5120_PROM_MYLOADER	2
+#define ADM5120_PROM_ROUTERBOOT	3
+#define ADM5120_PROM_BOOTBASE	4
+#define ADM5120_PROM_UBOOT	5
+#define ADM5120_PROM_LAST	5
+
+extern unsigned int adm5120_product_code;
+extern unsigned int adm5120_revision;
+extern unsigned int adm5120_nand_boot;
+
+extern unsigned long adm5120_speed;
+#define ADM5120_SPEED_175	175000000
+#define ADM5120_SPEED_200	200000000
+#define ADM5120_SPEED_225	225000000
+#define ADM5120_SPEED_250	250000000
+
+extern unsigned int adm5120_package;
+#define ADM5120_PACKAGE_PQFP	0
+#define ADM5120_PACKAGE_BGA	1
+
+extern unsigned long adm5120_memsize;
+
+enum {
+	MACH_ADM5120_GENERIC = 0,	/* Generic board */
+	MACH_ADM5120_5GXI,		/* OSBRiDGE 5GXi/5XLi */
+	MACH_ADM5120_BR6104K,		/* Edimax BR-6104K */
+	MACH_ADM5120_BR6104KP,		/* Edimax BR-6104KP */
+	MACH_ADM5120_BR61X4WG,		/* Edimax BR-6104Wg/BR-6114WG */
+	MACH_ADM5120_CAS630,		/* Cellvision CAS-630/630W */
+	MACH_ADM5120_CAS670,		/* Cellvision CAS-670/670W */
+	MACH_ADM5120_CAS700,		/* Cellvision CAS-700/700W */
+	MACH_ADM5120_CAS771,		/* Cellvision CAS-771/771W */
+	MACH_ADM5120_CAS790,		/* Cellvision CAS-790 */
+	MACH_ADM5120_CAS861,		/* Cellvision CAS-861/861W */
+	MACH_ADM5120_EASY5120PATA,	/* Infineon EASY 5120P-ATA */
+	MACH_ADM5120_EASY5120RT,	/* Infineon EASY 5120-RT */
+	MACH_ADM5120_EASY5120WVOIP,	/* Infineon EASY 5120-WVoIP */
+	MACH_ADM5120_EASY83000,		/* Infineon EASY-83000 */
+	MACH_ADM5120_ES2108,		/* ZyXEL Ethernet Switch 2108 */
+	MACH_ADM5120_ES2108F,		/* ZyXEL Ethernet Switch 2108-F */
+	MACH_ADM5120_ES2108G,		/* ZyXEL Ethernet Switch 2108-G */
+	MACH_ADM5120_ES2108LC,		/* ZyXEL Ethernet Switch 2108-LC */
+	MACH_ADM5120_ES2108PWR,		/* ZyXEL Ethernet Switch 2108-PWR */
+	MACH_ADM5120_ES2024A,		/* ZyXEL Ethernet Switch 2024A */
+	MACH_ADM5120_ES2024PWR,		/* ZyXEL Ethernet Switch 2024PWR */
+	MACH_ADM5120_HS100,		/* ZyXEL HomeSafe 100/100W */
+	MACH_ADM5120_NFS101U,		/* Cellvision NFS-101U/101WU */
+	MACH_ADM5120_NFS202U,		/* Cellvision NFS-202U/202WU */
+	MACH_ADM5120_NP28G,		/* Compex NP28G */
+	MACH_ADM5120_NP28GHS,		/* Compex NP28G HotSpot */
+	MACH_ADM5120_NP27G,		/* Compex NP27G */
+	MACH_ADM5120_RB_11X,		/* Mikrotik RouterBOARD 111/112 */
+	MACH_ADM5120_RB_133,		/* Mikrotik RouterBOARD 133 */
+	MACH_ADM5120_RB_133C,		/* Mikrotik RouterBOARD 133c */
+	MACH_ADM5120_RB_150,		/* Mikrotik RouterBOARD 150 */
+	MACH_ADM5120_RB_153,		/* Mikrotik RouterBOARD 153 */
+	MACH_ADM5120_RB_192,		/* Mikrotik RouterBOARD 192 */
+	MACH_ADM5120_P334U,		/* ZyXEL Prestige 334U */
+	MACH_ADM5120_P334W,		/* ZyXEL Prestige 334W */
+	MACH_ADM5120_P334WH,		/* ZyXEL Prestige 334WH */
+	MACH_ADM5120_P334WHD,		/* ZyXEL Prestige 334WHD */
+	MACH_ADM5120_P334WT,		/* ZyXEL Prestige 334WT */
+	MACH_ADM5120_P335,		/* ZyXEL Prestige 335/335WT */
+	MACH_ADM5120_P335PLUS,		/* ZyXEL Prestige 335Plus */
+	MACH_ADM5120_P335U,		/* ZyXEL Prestige 335U */
+	MACH_ADM5120_PMUGW,		/* Motorola Powerline MU Gateway */
+	MACH_ADM5120_WP54,		/* Compex WP54G/WP54AG/WPP54G/WPP54AG */
+	MACH_ADM5120_WP54G_WRT,		/* Compex WP54G-WRT */
+	MACH_ADM5120_WP54Gv1C,		/* Compex WP54G version 1C */
+	MACH_ADM5120_EB_214A,		/* Generic EB-214A */
+};
+
+/*
+ * TODO:remove adm5120_eth* variables when the switch driver will be
+ *	converted into a real platform driver
+ */
+extern unsigned int adm5120_eth_num_ports;
+extern unsigned char adm5120_eth_macs[6][6];
+extern unsigned char adm5120_eth_vlans[6];
+
+extern void adm5120_soc_init(void) __init;
+extern void adm5120_mem_init(void) __init;
+extern void adm5120_ndelay(u32 ns);
+
+extern void (*adm5120_board_reset)(void);
+
+extern void adm5120_gpio_init(void) __init;
+extern void adm5120_gpio_csx0_enable(void) __init;
+extern void adm5120_gpio_csx1_enable(void) __init;
+extern void adm5120_gpio_ew_enable(void) __init;
+
+static inline int adm5120_package_pqfp(void)
+{
+	return (adm5120_package == ADM5120_PACKAGE_PQFP);
+}
+
+static inline int adm5120_package_bga(void)
+{
+	return (adm5120_package == ADM5120_PACKAGE_BGA);
+}
+
+static inline int adm5120_has_pci(void)
+{
+	return (adm5120_package == ADM5120_PACKAGE_BGA);
+}
+
+static inline int adm5120_has_gmii(void)
+{
+	return (adm5120_package == ADM5120_PACKAGE_BGA);
+}
+
+#endif /* _MACH_ADM5120_INFO_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_intc.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_intc.h
new file mode 100644
index 000000000..70dd6bbe8
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_intc.h
@@ -0,0 +1,63 @@
+/*
+ *  ADM5120 interrupt controller definitions
+ *
+ *  This header file defines the hardware registers of the ADM5120 SoC
+ *  built-in interrupt controller.
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MACH_ADM5120_INTC_H
+#define _MACH_ADM5120_INTC_H
+
+/*
+ * INTC register offsets
+ */
+#define INTC_REG_IRQ_STATUS		0x00 /* Interrupt status after masking */
+#define INTC_REG_IRQ_RAW_STATUS		0x04 /* Interrupt status before masking */
+#define INTC_REG_IRQ_ENABLE		0x08 /* Used to enable the interrupt sources */
+#define INTC_REG_IRQ_ENABLE_CLEAR	0x0C /* Used to disable the interrupt sources */
+#define INTC_REG_IRQ_DISABLE		INTC_REG_IRQ_ENABLE_CLEAR
+#define INTC_REG_INT_MODE		0x14 /* The interrupt mode of the sources */
+#define INTC_REG_FIQ_STATUS		0x18 /* FIQ status */
+#define INTC_REG_IRQ_TEST_SOURCE	0x1C
+#define INTC_REG_IRQ_SOURCE_SELECT	0x20
+#define INTC_REG_INT_LEVEL		0x24
+
+/*
+ * INTC IRQ numbers
+ */
+#define INTC_IRQ_TIMER	0	/* built in timer */
+#define INTC_IRQ_UART0	1	/* built-in UART0 */
+#define INTC_IRQ_UART1	2	/* built-in UART1 */
+#define INTC_IRQ_USBC	3	/* USB Host Controller */
+#define INTC_IRQ_GPIO2	4	/* GPIO line 2 */
+#define INTC_IRQ_GPIO4	5	/* GPIO line 4 */
+#define INTC_IRQ_PCI0	6	/* PCI slot 2 */
+#define INTC_IRQ_PCI1	7	/* PCI slot 3 */
+#define INTC_IRQ_PCI2	8	/* PCI slot 4 */
+#define INTC_IRQ_SWITCH	9	/* built-in ethernet switch */
+#define INTC_IRQ_LAST	INTC_IRQ_SWITCH
+#define INTC_IRQ_COUNT	10
+
+/*
+ * INTC register bits
+ */
+#define INTC_INT_TIMER	(1 << INTC_IRQ_TIMER)
+#define INTC_INT_UART0	(1 << INTC_IRQ_UART0)
+#define INTC_INT_UART1	(1 << INTC_IRQ_UART1)
+#define INTC_INT_USBC	(1 << INTC_IRQ_USBC)
+#define INTC_INT_INTX0	(1 << INTC_IRQ_INTX0)
+#define INTC_INT_INTX1	(1 << INTC_IRQ_INTX1)
+#define INTC_INT_PCI0	(1 << INTC_IRQ_PCI0)
+#define INTC_INT_PCI1	(1 << INTC_IRQ_PCI1)
+#define INTC_INT_PCI2	(1 << INTC_IRQ_PCI2)
+#define INTC_INT_SWITCH	(1 << INTC_IRQ_SWITCH)
+#define INTC_INT_ALL	((1 << INTC_IRQ_COUNT) - 1)
+
+#endif /* _MACH_ADM5120_INTC_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_mpmc.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_mpmc.h
new file mode 100644
index 000000000..c4e9591fb
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_mpmc.h
@@ -0,0 +1,92 @@
+/*
+ *  ADM5120 MPMC (Multiport Memory Controller) register definitions
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MACH_ADM5120_MPMC_H
+#define _MACH_ADM5120_MPMC_H
+
+#define MPMC_READ_REG(r)	__raw_readl( \
+	(void __iomem *)KSEG1ADDR(ADM5120_MPMC_BASE) + MPMC_REG_ ## r)
+#define MPMC_WRITE_REG(r, v)	__raw_writel((v), \
+	(void __iomem *)KSEG1ADDR(ADM5120_MPMC_BASE) + MPMC_REG_ ## r)
+
+#define MPMC_REG_CTRL	0x0000
+#define MPMC_REG_STATUS	0x0004
+#define MPMC_REG_CONF	0x0008
+#define MPMC_REG_DC	0x0020
+#define MPMC_REG_DR	0x0024
+#define MPMC_REG_DRP	0x0030
+
+#define MPMC_REG_DC0	0x0100
+#define MPMC_REG_DRC0	0x0104
+#define MPMC_REG_DC1	0x0120
+#define MPMC_REG_DRC1	0x0124
+#define MPMC_REG_DC2	0x0140
+#define MPMC_REG_DRC2	0x0144
+#define MPMC_REG_DC3	0x0160
+#define MPMC_REG_DRC3	0x0164
+#define MPMC_REG_SC0	0x0200  /* for F_CS1_N */
+#define MPMC_REG_SC1	0x0220  /* for F_CS0_N */
+#define MPMC_REG_SC2    0x0240
+#define MPMC_REG_WEN2	0x0244
+#define MPMC_REG_OEN2	0x0248
+#define MPMC_REG_RD2	0x024C
+#define MPMC_REG_PG2	0x0250
+#define MPMC_REG_WR2	0x0254
+#define MPMC_REG_TN2	0x0258
+#define MPMC_REG_SC3    0x0260
+
+/* Control register bits */
+#define MPMC_CTRL_AM		(1 << 1)	/* Address Mirror */
+#define MPMC_CTRL_LPM		(1 << 2)	/* Low Power Mode */
+#define MPMC_CTRL_DWB		(1 << 3)	/* Drain Write Buffers */
+
+/* Status register bits */
+#define MPMC_STATUS_BUSY	(1 << 0)	/* Busy */
+#define MPMC_STATUS_WBS		(1 << 1)	/* Write Buffer Status */
+#define MPMC_STATUS_SRA		(1 << 2)	/* Self-Refresh Acknowledge*/
+
+/* Dynamic Control register bits */
+#define MPMC_DC_CE		(1 << 0)
+#define MPMC_DC_DMC		(1 << 1)
+#define MPMC_DC_SRR		(1 << 2)
+#define MPMC_DC_SI_SHIFT	7
+#define MPMC_DC_SI_MASK		(3 << 7)
+#define MPMC_DC_SI_NORMAL	(0 << 7)
+#define MPMC_DC_SI_MODE		(1 << 7)
+#define MPMC_DC_SI_PALL		(2 << 7)
+#define MPMC_DC_SI_NOP		(3 << 7)
+
+#define SRAM_REG_CONF	0x00
+#define SRAM_REG_WWE	0x04
+#define SRAM_REG_WOE	0x08
+#define SRAM_REG_WRD    0x0C
+#define SRAM_REG_WPG    0x10
+#define SRAM_REG_WWR    0x14
+#define SRAM_REG_WTR    0x18
+
+/* Dynamic Configuration register bits */
+#define DC_BE		(1 << 19) /* buffer enable */
+#define DC_RW_SHIFT	28	/* shift for number of rows */
+#define DC_RW_MASK	0x03
+#define DC_NB_SHIFT	26	/* shift for number of banks */
+#define DC_NB_MASK	0x01
+#define DC_CW_SHIFT	22	/* shift for number of columns */
+#define DC_CW_MASK	0x07
+#define DC_DW_SHIFT	7	/* shift for device width */
+#define DC_DW_MASK	0x03
+
+/* Static Configuration register bits */
+#define SC_MW_MASK	0x03	/* memory width mask */
+#define SC_MW_8		0x00	/* 8 bit memory width */
+#define SC_MW_16	0x01	/* 16 bit memory width */
+#define SC_MW_32	0x02	/* 32 bit memory width */
+
+#endif /* _MACH_ADM5120_MPMC_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_nand.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_nand.h
new file mode 100644
index 000000000..1e2f3bd15
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_nand.h
@@ -0,0 +1,89 @@
+/*
+ *  ADM5120 NAND interface definitions
+ *
+ *  This header file defines the hardware registers of the ADM5120 SoC
+ *  built-in NAND interface.
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  NAND interface routines was based on a driver for Linux 2.6.19+ which
+ *  was derived from the driver for Linux 2.4.xx published by Mikrotik for
+ *  their RouterBoard 1xx and 5xx series boards.
+ *    Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
+ *    Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MACH_ADM5120_NAND_H
+#define _MACH_ADM5120_NAND_H
+
+#include <linux/types.h>
+#include <linux/io.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_switch.h>
+
+/* NAND control registers */
+#define NAND_REG_DATA		0x0 /* data register */
+#define NAND_REG_SET_CEn	0x1 /* CE# low */
+#define NAND_REG_CLR_CEn	0x2 /* CE# high */
+#define NAND_REG_CLR_CLE	0x3 /* CLE low */
+#define NAND_REG_SET_CLE	0x4 /* CLE high */
+#define NAND_REG_CLR_ALE	0x5 /* ALE low */
+#define NAND_REG_SET_ALE	0x6 /* ALE high */
+#define NAND_REG_SET_SPn	0x7 /* SP# low (use spare area) */
+#define NAND_REG_CLR_SPn	0x8 /* SP# high (do not use spare area) */
+#define NAND_REG_SET_WPn	0x9 /* WP# low */
+#define NAND_REG_CLR_WPn	0xA /* WP# high */
+#define NAND_REG_STATUS		0xB /* Status register */
+
+#define ADM5120_NAND_STATUS_READY	0x80
+
+#define NAND_READ_REG(r) \
+	readb((void __iomem *)KSEG1ADDR(ADM5120_NAND_BASE) + (r))
+#define NAND_WRITE_REG(r, v) \
+	writeb((v), (void __iomem *)KSEG1ADDR(ADM5120_NAND_BASE) + (r))
+
+/*-------------------------------------------------------------------------*/
+
+static inline void adm5120_nand_enable(void)
+{
+	SW_WRITE_REG(SWITCH_REG_BW_CNTL1, BW_CNTL1_NAND_ENABLE);
+	SW_WRITE_REG(SWITCH_REG_BOOT_DONE, 1);
+}
+
+static inline void adm5120_nand_set_wpn(unsigned int set)
+{
+	NAND_WRITE_REG((set) ? NAND_REG_SET_WPn : NAND_REG_CLR_WPn, 1);
+}
+
+static inline void adm5120_nand_set_spn(unsigned int set)
+{
+	NAND_WRITE_REG((set) ? NAND_REG_SET_SPn : NAND_REG_CLR_SPn, 1);
+}
+
+static inline void adm5120_nand_set_cle(unsigned int set)
+{
+	NAND_WRITE_REG((set) ? NAND_REG_SET_CLE : NAND_REG_CLR_CLE, 1);
+}
+
+static inline void adm5120_nand_set_ale(unsigned int set)
+{
+	NAND_WRITE_REG((set) ? NAND_REG_SET_ALE : NAND_REG_CLR_ALE, 1);
+}
+
+static inline void adm5120_nand_set_cen(unsigned int set)
+{
+	NAND_WRITE_REG((set) ? NAND_REG_SET_CEn : NAND_REG_CLR_CEn, 1);
+}
+
+static inline u8 adm5120_nand_get_status(void)
+{
+	return NAND_READ_REG(NAND_REG_STATUS);
+}
+
+#endif /* _MACH_ADM5120_NAND_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_platform.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_platform.h
new file mode 100644
index 000000000..952c7adc8
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_platform.h
@@ -0,0 +1,88 @@
+/*
+ *  ADM5120 specific platform definitions
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _ASM_MIPS_MACH_ADM5120_PLATFORM_H
+#define _ASM_MIPS_MACH_ADM5120_PLATFORM_H
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/leds.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/serial.h>
+
+struct adm5120_flash_platform_data {
+	void			(*set_vpp)(struct map_info *, int);
+	void			(*switch_bank)(unsigned);
+	u32			window_size;
+	unsigned int		nr_parts;
+	struct mtd_partition	*parts;
+};
+
+struct adm5120_switch_platform_data {
+	/* TODO: not yet implemented */
+};
+
+struct adm5120_pci_irq {
+	u8	slot;
+	u8	func;
+	u8	pin;
+	unsigned irq;
+};
+
+#define PCIIRQ(s, f, p, i) {.slot = (s), .func = (f), .pin  = (p), .irq  = (i)}
+
+#ifdef CONFIG_PCI
+extern void adm5120_pci_set_irq_map(unsigned int nr_irqs,
+		struct adm5120_pci_irq *map) __init;
+#else
+static inline void adm5120_pci_set_irq_map(unsigned int nr_irqs,
+		struct adm5120_pci_irq *map)
+{
+}
+#endif
+
+extern void adm5120_setup_eth_macs(u8 *mac_base) __init;
+
+extern struct adm5120_flash_platform_data adm5120_flash0_data;
+extern struct adm5120_flash_platform_data adm5120_flash1_data;
+
+extern void adm5120_add_device_flash(unsigned id) __init;
+extern void adm5120_add_device_usb(void) __init;
+extern void adm5120_add_device_uart(unsigned id) __init;
+extern void adm5120_add_device_nand(struct platform_nand_data *pdata) __init;
+extern void adm5120_add_device_switch(unsigned num_ports, u8 *vlan_map) __init;
+extern void adm5120_add_device_gpio(u32 disable_mask) __init;
+extern void adm5120_register_gpio_buttons(int id,
+					  unsigned poll_interval,
+					  unsigned nbuttons,
+					  struct gpio_keys_button *buttons);
+
+#define GPIO_LED_DEF(g, n, t, a) {	\
+	.name = (n),			\
+	.default_trigger = (t),		\
+	.gpio = (g),			\
+	.active_low = (a)		\
+}
+
+#define GPIO_LED_STD(g, n, t)	GPIO_LED_DEF((g), (n), (t), 0)
+#define GPIO_LED_INV(g, n, t)	GPIO_LED_DEF((g), (n), (t), 1)
+
+extern void adm5120_add_device_gpio_leds(unsigned num_leds,
+					struct gpio_led *leds) __init;
+
+#endif /* _ASM_MIPS_MACH_ADM5120_PLATFORM_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_switch.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_switch.h
new file mode 100644
index 000000000..91adc5bae
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_switch.h
@@ -0,0 +1,300 @@
+/*
+ *  ADM5120 ethernet switch definitions
+ *
+ *  This header file defines the hardware registers of the ADM5120 SoC
+ *  built-in Ethernet switch.
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MACH_ADM5120_SWITCH_H
+#define _MACH_ADM5120_SWITCH_H
+
+#ifndef BIT
+#  define BIT(at)	(1 << (at))
+#endif
+#define BITMASK(len)	(BIT(len)-1)
+
+#define SW_READ_REG(r)		__raw_readl( \
+	(void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + r)
+#define SW_WRITE_REG(r, v)	__raw_writel((v), \
+	(void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + r)
+
+/* Switch register offsets */
+#define SWITCH_REG_CODE		0x0000
+#define SWITCH_REG_SOFT_RESET	0x0004	/* Soft Reset */
+#define SWITCH_REG_BOOT_DONE	0x0008	/* Boot Done */
+#define SWITCH_REG_SW_RESET	0x000C	/* Switch Reset */
+#define SWITCH_REG_PHY_STATUS	0x0014	/* PHY Status */
+#define SWITCH_REG_MEMCTRL	0x001C	/* Memory Control */
+#define SWITCH_REG_CPUP_CONF	0x0024	/* CPU Port Configuration */
+#define SWITCH_REG_PORT_CONF0	0x0028	/* Port Configuration 0 */
+#define SWITCH_REG_PORT_CONF1	0x002C	/* Port Configuration 1 */
+#define SWITCH_REG_PORT_CONF2	0x0030	/* Port Configuration 2 */
+#define SWITCH_REG_VLAN_G1	0x0040	/* VLAN group 1 */
+#define SWITCH_REG_VLAN_G2	0x0044	/* VLAN group 2 */
+#define SWITCH_REG_SEND_TRIG	0x0048	/* Send Trigger */
+#define SWITCH_REG_MAC_WT0	0x0058	/* MAC Write Address 0 */
+#define SWITCH_REG_MAC_WT1	0x005C	/* MAC Write Address 1 */
+#define SWITCH_REG_BW_CNTL0	0x0060	/* Bandwidth Control 0 */
+#define SWITCH_REG_BW_CNTL1	0x0064	/* Bandwidth Control 1 */
+#define SWITCH_REG_PHY_CNTL0	0x0068	/* PHY Control 0 */
+#define SWITCH_REG_PHY_CNTL1	0x006C	/* PHY Control 1 */
+#define SWITCH_REG_PORT_TH	0x0078	/* Port Threshold */
+#define SWITCH_REG_PHY_CNTL2	0x007C	/* PHY Control 2 */
+#define SWITCH_REG_PHY_CNTL3	0x0080	/* PHY Control 3 */
+#define SWITCH_REG_PRI_CNTL	0x0084	/* Priority Control */
+#define SWITCH_REG_PHY_CNTL4	0x00A0	/* PHY Control 4 */
+#define SWITCH_REG_EMPTY_CNT	0x00A4	/* Empty Count */
+#define SWITCH_REG_PORT_CNTLS	0x00A8	/* Port Control Select */
+#define SWITCH_REG_PORT_CNTL	0x00AC	/* Port Control */
+#define SWITCH_REG_INT_STATUS	0x00B0	/* Interrupt Status */
+#define SWITCH_REG_INT_MASK	0x00B4	/* Interrupt Mask */
+#define SWITCH_REG_GPIO_CONF0	0x00B8	/* GPIO Configuration 0 */
+#define SWITCH_REG_GPIO_CONF2	0x00BC	/* GPIO Configuration 1 */
+#define SWITCH_REG_WDOG0	0x00C0	/* Watchdog 0 */
+#define SWITCH_REG_WDOG1	0x00C4	/* Watchdog 1 */
+
+#define SWITCH_REG_SHDA		0x00D0	/* Send High Descriptors Address */
+#define SWITCH_REG_SLDA		0x00D4	/* Send Low Descriptors Address */
+#define SWITCH_REG_RHDA		0x00D8	/* Receive High Descriptor Address */
+#define SWITCH_REG_RLDA		0x00DC	/* Receive Low Descriptor Address */
+#define SWITCH_REG_SHWA		0x00E0	/* Send High Working Address */
+#define SWITCH_REG_SLWA		0x00E4	/* Send Low Working Address */
+#define SWITCH_REG_RHWA		0x00E8	/* Receive High Working Address */
+#define SWITCH_REG_RLWA		0x00EC	/* Receive Low Working Address */
+
+#define SWITCH_REG_TIMER_INT	0x00F0	/* Timer */
+#define SWITCH_REG_TIMER	0x00F4	/* Timer Interrupt */
+
+#define SWITCH_REG_PORT0_LED	0x0100
+#define SWITCH_REG_PORT1_LED	0x0104
+#define SWITCH_REG_PORT2_LED	0x0108
+#define SWITCH_REG_PORT3_LED	0x010C
+#define SWITCH_REG_PORT4_LED	0x0110
+
+/* CODE register bits */
+#define CODE_PC_MASK		BITMASK(16)	/* Product Code */
+#define CODE_REV_SHIFT		16
+#define CODE_REV_MASK		BITMASK(4)	/* Product Revision */
+#define CODE_CLKS_SHIFT		20
+#define CODE_CLKS_MASK		BITMASK(2)	/* Clock Speed */
+#define CODE_CLKS_175		0		/* 175 MHz */
+#define CODE_CLKS_200		1		/* 200 MHz */
+#define CODE_CLKS_225		2		/* 225 MHz */
+#define CODE_CLKS_250		3		/* 250 MHz */
+#define CODE_NAB		BIT(24)		/* NAND boot */
+#define CODE_PK_MASK		BITMASK(1)	/* Package type */
+#define CODE_PK_SHIFT		29
+#define CODE_PK_BGA		0		/* BGA package */
+#define CODE_PK_PQFP		1		/* PQFP package */
+
+/* MEMCTRL register bits */
+#define MEMCTRL_SDRS_MASK	BITMASK(3)	/* SDRAM bank size */
+#define MEMCTRL_SDRS_4M		0x01
+#define MEMCTRL_SDRS_8M		0x02
+#define MEMCTRL_SDRS_16M	0x03
+#define MEMCTRL_SDRS_64M	0x04
+#define MEMCTRL_SDRS_128M	0x05
+#define MEMCTRL_SDR1_ENABLE	BIT(5)		/* enable SDRAM bank 1 */
+
+#define MEMCTRL_SRS0_SHIFT	8		/* shift for SRAM0 size */
+#define MEMCTRL_SRS1_SHIFT	16		/* shift for SRAM1 size */
+#define MEMCTRL_SRS_MASK	BITMASK(3)	/* SRAM size mask */
+#define MEMCTRL_SRS_DISABLED	0x00		/* Disabled */
+#define MEMCTRL_SRS_512K	0x01		/* 512KB*/
+#define MEMCTRL_SRS_1M		0x02		/* 1MB */
+#define MEMCTRL_SRS_2M		0x03		/* 2MB */
+#define MEMCTRL_SRS_4M		0x04		/* 4MB */
+
+/* Port bits used in various registers */
+#define SWITCH_PORT_PHY0	BIT(0)
+#define SWITCH_PORT_PHY1	BIT(1)
+#define SWITCH_PORT_PHY2	BIT(2)
+#define SWITCH_PORT_PHY3	BIT(3)
+#define SWITCH_PORT_PHY4	BIT(4)
+#define SWITCH_PORT_MII		BIT(5)
+#define SWITCH_PORT_CPU		BIT(6)
+
+/* Port bit shorthands */
+#define SWITCH_PORTS_PHY	0x1F	/* phy ports */
+#define SWITCH_PORTS_NOCPU	0x3F	/* physical ports */
+#define SWITCH_PORTS_ALL	0x7F	/* all ports */
+
+/* CPUP_CONF register bits */
+#define CPUP_CONF_DCPUP		BIT(0)	/* Disable CPU port */
+#define CPUP_CONF_CRCP		BIT(1)	/* CRC padding from CPU */
+#define CPUP_CONF_BTM		BIT(2)	/* Bridge Testing Mode */
+#define CPUP_CONF_DUNP_SHIFT	9	/* Disable Unknown Packets for portX */
+#define CPUP_CONF_DMCP_SHIFT	16	/* Disable Mcast Packets form portX */
+#define CPUP_CONF_DBCP_SHIFT	24	/* Disable Bcast Packets form portX */
+
+/* PORT_CONF0 register bits */
+#define PORT_CONF0_DP_SHIFT	0	/* Disable Port */
+#define PORT_CONF0_EMCP_SHIFT	8	/* Enable All MC Packets */
+#define PORT_CONF0_BP_SHIFT	16	/* Enable Back Pressure */
+
+/* PORT_CONF1 register bits */
+#define PORT_CONF1_DISL_SHIFT	0	/* Disable Learning */
+#define PORT_CONF1_BS_SHIFT	6	/* Blocking State */
+#define PORT_CONF1_BM_SHIFT	12	/* Blocking Mode */
+
+/* SEND_TRIG register bits */
+#define SEND_TRIG_STL		BIT(0)	/* Send Trigger Low */
+#define SEND_TRIG_STH		BIT(1)	/* Send Trigger High */
+
+/* MAC_WT0 register bits */
+#define MAC_WT0_MAWC		BIT(0)	/* MAC address write command */
+#define MAC_WT0_MWD_SHIFT	1
+#define MAC_WT0_MWD		BIT(1)	/* MAC write done */
+#define MAC_WT0_WFB		BIT(2)	/* Write Filter Bit */
+#define MAC_WT0_WVN_SHIFT	3	/* Write Vlan Number shift */
+#define MAC_WT0_WVE		BIT(6)	/* Write VLAN enable */
+#define MAC_WT0_WPMN_SHIFT	7
+#define MAC_WT0_WAF_SHIFT	13	/* Write Age Field shift */
+#define MAC_WT0_WAF_EMPTY	0
+#define MAC_WT0_WAF_STATIC	7	/* age: static */
+#define MAC_WT0_MAC0_SHIFT	16
+#define MAC_WT0_MAC1_SHIFT	24
+
+/* MAC_WT1 register bits */
+#define MAC_WT1_MAC2_SHIFT	0
+#define MAC_WT1_MAC3_SHIFT	8
+#define MAC_WT1_MAC4_SHIFT	16
+#define MAC_WT1_MAC5_SHIFT	24
+
+/* BW_CNTL0/BW_CNTL1 register bits */
+#define BW_CNTL_DISABLE		0x00
+#define BW_CNTL_64K		0x01
+#define BW_CNTL_128K		0x02
+#define BW_CNTL_256K		0x03
+#define BW_CNTL_512K		0x04
+#define BW_CNTL_1M		0x05
+#define BW_CNTL_4M		0x06
+#define BW_CNTL_10M		0x07
+
+#define P4TBC_SHIFT		0
+#define P4RBC_SHIFT		4
+#define P5TBC_SHIFT		8
+#define P5RBC_SHIFT		12
+
+#define BW_CNTL1_NAND_ENABLE	0x100
+
+/* PHY_CNTL0 register bits */
+#define PHY_CNTL0_PHYA_MASK	BITMASK(5)
+#define PHY_CNTL0_PHYR_MASK	BITMASK(5)
+#define PHY_CNTL0_PHYR_SHIFT	8
+#define PHY_CNTL0_WC		BIT(13)		/* Write Command */
+#define PHY_CNTL0_RC		BIT(14)		/* Read Command */
+#define PHY_CNTL0_WTD_MASK	BIT(16)		/* Read Command */
+#define PHY_CNTL0_WTD_SHIFT	16
+
+/* PHY_CNTL1 register bits */
+#define PHY_CNTL1_WOD		BIT(0)		/* Write Operation Done */
+#define PHY_CNTL1_ROD		BIT(1)		/* Read Operation Done */
+#define PHY_CNTL1_RD_MASK	BITMASK(16)
+#define PHY_CNTL1_RD_SHIFT	16
+
+/* PHY_CNTL2 register bits */
+#define PHY_CNTL2_ANE_SHIFT	0	/* Auto Negotiation Enable */
+#define PHY_CNTL2_SC_SHIFT	5	/* Speed Control */
+#define PHY_CNTL2_DC_SHIFT	10	/* Duplex Control */
+#define PHY_CNTL2_FNCV_SHIFT	15	/* Recommended FC Value */
+#define PHY_CNTL2_PHYR_SHIFT	20	/* PHY reset */
+#define PHY_CNTL2_AMDIX_SHIFT	25	/* Auto MDIX enable */
+/* PHY_CNTL2_RMAE is bad in datasheet */
+#define PHY_CNTL2_RMAE		BIT(31)	/* Recommended MCC Average enable */
+
+/* PHY_CNTL3 register bits */
+#define PHY_CNTL3_RNT		BIT(10) /* Recommend Normal Threshold */
+
+/* PORT_TH register bits */
+#define PORT_TH_PPT_MASK	BITMASK(8)	/* Per Port Threshold */
+#define PORT_TH_CPUT_SHIFT	8		/* CPU Port Buffer Threshold */
+#define PORT_TH_CPUT_MASK	BITMASK(8)
+#define PORT_TH_CPUHT_SHIFT	16		/* CPU Hold Threshold */
+#define PORT_TH_CPUHT_MASK	BITMASK(8)
+#define PORT_TH_CPURT_SHIFT	24		/* CPU Release Threshold */
+#define PORT_TH_CPURT_MASK	BITMASK(8)
+
+/* EMPTY_CNT register bits */
+#define EMPTY_CNT_EBGB_MASK	BITMASK(9) /* Empty Blocks in the Global Buffer */
+
+/* GPIO_CONF0 register bits */
+#define GPIO_CONF0_MASK		BITMASK(8)
+#define GPIO_CONF0_IM_SHIFT	0
+#define GPIO_CONF0_IV_SHIFT	8
+#define GPIO_CONF0_OE_SHIFT	16
+#define GPIO_CONF0_OV_SHIFT	24
+#define GPIO_CONF0_IM_MASK	(0xFF << GPIO_CONF0_IM_SHIFT)
+#define GPIO_CONF0_IV_MASK	(0xFF << GPIO_CONF0_IV_SHIFT)
+#define GPIO_CONF0_OE_MASK	(0xFF << GPIO_CONF0_OE_SHIFT)
+#define GPIO_CONF0_OV_MASK	(0xFF << GPIO_CONF0_OV_SHIFT)
+
+/* GPIO_CONF2 register bits */
+#define GPIO_CONF2_CSX0		BIT(4)	/* enable CSX0:INTX0 on GPIO 1:2 */
+#define GPIO_CONF2_CSX1		BIT(5)	/* enable CSX1:INTX1 on GPIO 3:4 */
+#define GPIO_CONF2_EW		BIT(6)	/* enable wait state pin for CSX0/1 */
+
+/* INT_STATUS/INT_MASK register bits */
+#define SWITCH_INT_SHD		BIT(0)	/* Send High Done */
+#define SWITCH_INT_SLD		BIT(1)	/* Send Low Done */
+#define SWITCH_INT_RHD		BIT(2)	/* Receive High Done */
+#define SWITCH_INT_RLD		BIT(3)	/* Receive Low Done */
+#define SWITCH_INT_HDF		BIT(4)	/* High Descriptor Full */
+#define SWITCH_INT_LDF		BIT(5)	/* Low Descriptor Full */
+#define SWITCH_INT_P0QF		BIT(6)	/* Port0 Queue Full */
+#define SWITCH_INT_P1QF		BIT(7)	/* Port1 Queue Full */
+#define SWITCH_INT_P2QF		BIT(8)	/* Port2 Queue Full */
+#define SWITCH_INT_P3QF		BIT(9)	/* Port3 Queue Full */
+#define SWITCH_INT_P4QF		BIT(10)	/* Port4 Queue Full */
+#define SWITCH_INT_P5QF		BIT(11)	/* Port5 Queue Full */
+#define SWITCH_INT_CPQF		BIT(13)	/* CPU Queue Full */
+#define SWITCH_INT_GQF		BIT(14)	/* Global Queue Full */
+#define SWITCH_INT_MD		BIT(15)	/* Must Drop */
+#define SWITCH_INT_BCS		BIT(16)	/* BC Storm */
+#define SWITCH_INT_PSC		BIT(18)	/* Port Status Change */
+#define SWITCH_INT_ID		BIT(19)	/* Intruder Detected */
+#define SWITCH_INT_W0TE		BIT(20)	/* Watchdog 0 Timer Expired */
+#define SWITCH_INT_W1TE		BIT(21)	/* Watchdog 1 Timer Expired */
+#define SWITCH_INT_RDE		BIT(22)	/* Receive Descriptor Error */
+#define SWITCH_INT_SDE		BIT(23)	/* Send Descriptor Error */
+#define SWITCH_INT_CPUH		BIT(24)	/* CPU Hold */
+
+/* TIMER_INT register bits */
+#define TIMER_INT_TOS		BIT(0)	/* time-out status */
+#define TIMER_INT_TOM		BIT(16)	/* mask time-out interrupt */
+
+/* TIMER register bits */
+#define TIMER_PERIOD_MASK	BITMASK(16)	/* mask for timer period */
+#define TIMER_PERIOD_DEFAULT	0xFFFF		/* default timer period */
+#define TIMER_TE		BIT(16)	/* timer enable bit */
+
+/* PORTx_LED register bits */
+#define LED_MODE_MASK		BITMASK(4)
+#define LED_MODE_INPUT		0
+#define LED_MODE_FLASH		1
+#define LED_MODE_OUT_HIGH	2
+#define LED_MODE_OUT_LOW	3
+#define LED_MODE_LINK		4
+#define LED_MODE_SPEED		5
+#define LED_MODE_DUPLEX		6
+#define LED_MODE_ACT		7
+#define LED_MODE_COLL		8
+#define LED_MODE_LINK_ACT	9
+#define LED_MODE_DUPLEX_COLL	10
+#define LED_MODE_10M_ACT	11
+#define LED_MODE_100M_ACT	12
+#define LED0_MODE_SHIFT		0	/* LED0 mode shift */
+#define LED1_MODE_SHIFT		4	/* LED1 mode shift */
+#define LED2_MODE_SHIFT		8	/* LED2 mode shift */
+#define LED0_IV_SHIFT		12	/* LED0 input value shift */
+#define LED1_IV_SHIFT		13	/* LED1 input value shift */
+#define LED2_IV_SHIFT		14	/* LED2 input value shift */
+
+#endif /* _MACH_ADM5120_SWITCH_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h
new file mode 100644
index 000000000..81d3067da
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h
@@ -0,0 +1,64 @@
+/*
+ *  ADM5120 UART definitions
+ *
+ *  This header file defines the hardware registers of the ADM5120 SoC
+ *  built-in UARTs.
+ *
+ *  Copyright (C) 2007 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MACH_ADM5120_UART_H
+#define _MACH_ADM5120_UART_H
+
+#define UART_BAUDDIV(clk, baud) ((clk/(16 * (baud)))-1)
+
+#define UART_REG_DATA	0x00
+#define UART_REG_RSR	0x04
+#define UART_REG_ECR	UART_REG_RSR
+#define UART_REG_LCRH	0x08
+#define UART_REG_LCRM	0x0C
+#define UART_REG_LCRL	0x10
+#define UART_REG_CTRL	0x14
+#define UART_REG_FLAG	0x18
+
+/* Receive Status Register bits */
+#define UART_RSR_FE	(1 << 0)
+#define UART_RSR_PE	(1 << 1)
+#define UART_RSR_BE	(1 << 2)
+#define UART_RSR_OE	(1 << 3)
+#define UART_RSR_ERR	(UART_RSR_FE | UART_RSR_PE | UART_RSR_BE)
+
+#define UART_ECR_ALL	0xFF
+
+/* Line Control High register bits */
+#define UART_LCRH_BRK	(1 << 0) /* send break */
+#define UART_LCRH_PEN	(1 << 1) /* parity enable */
+#define UART_LCRH_EPS	(1 << 2) /* even parity select */
+#define UART_LCRH_STP1	(0 << 3) /* one stop bits select */
+#define UART_LCRH_STP2	(1 << 3) /* two stop bits select */
+#define UART_LCRH_FEN	(1 << 4) /* FIFO enable */
+
+#define UART_LCRH_WLEN5	(0 << 5)
+#define UART_LCRH_WLEN6	(1 << 5)
+#define UART_LCRH_WLEN7	(2 << 5)
+#define UART_LCRH_WLEN8	(3 << 5)
+
+/* Control register bits */
+#define UART_CTRL_EN	(1 << 0)
+
+/* Flag register bits */
+#define UART_FLAG_CTS	(1 << 0)
+#define UART_FLAG_DSR	(1 << 1)
+#define UART_FLAG_DCD	(1 << 2)
+#define UART_FLAG_BUSY	(1 << 3)
+#define UART_FLAG_RXFE	(1 << 4)
+#define UART_FLAG_TXFF	(1 << 5)
+#define UART_FLAG_RXFF	(1 << 6)
+#define UART_FLAG_TXFE	(1 << 7)
+
+#endif /* _MACH_ADM5120_UART_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/asm/sizes.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/asm/sizes.h
new file mode 100644
index 000000000..503843db1
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/asm/sizes.h
@@ -0,0 +1,56 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+/* DO NOT EDIT!! - this file automatically generated
+ *                 from .s file by awk -f s2h.awk
+ */
+/*  Size definitions
+ *  Copyright (C) ARM Limited 1998. All rights reserved.
+ */
+
+#ifndef __sizes_h
+#define __sizes_h                       1
+
+/* handy sizes */
+#define SZ_16				0x00000010
+#define SZ_256				0x00000100
+#define SZ_512				0x00000200
+
+#define SZ_1K                           0x00000400
+#define SZ_4K                           0x00001000
+#define SZ_8K                           0x00002000
+#define SZ_16K                          0x00004000
+#define SZ_64K                          0x00010000
+#define SZ_128K                         0x00020000
+#define SZ_256K                         0x00040000
+#define SZ_512K                         0x00080000
+
+#define SZ_1M                           0x00100000
+#define SZ_2M                           0x00200000
+#define SZ_4M                           0x00400000
+#define SZ_8M                           0x00800000
+#define SZ_16M                          0x01000000
+#define SZ_32M                          0x02000000
+#define SZ_64M                          0x04000000
+#define SZ_128M                         0x08000000
+#define SZ_256M                         0x10000000
+#define SZ_512M                         0x20000000
+
+#define SZ_1G                           0x40000000
+#define SZ_2G                           0x80000000
+
+#endif
+
+/*         END */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/cpu-feature-overrides.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/cpu-feature-overrides.h
new file mode 100644
index 000000000..c6310cc6e
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/cpu-feature-overrides.h
@@ -0,0 +1,71 @@
+/*
+ *  ADM5120 specific CPU feature overrides
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ *	Copyright (C) 2003, 2004 Ralf Baechle
+ *	Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_ADM5120_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_ADM5120_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * The ADM5120 SOC has a built-in MIPS 4Kc core.
+ */
+#define cpu_has_tlb			1
+#define cpu_has_4kex			1
+#define cpu_has_3k_cache		0
+#define cpu_has_4k_cache		1
+#define cpu_has_tx39_cache		0
+#define cpu_has_sb1_cache		0
+#define cpu_has_fpu			0
+#define cpu_has_32fpr			0
+#define cpu_has_counter			1
+#define cpu_has_watch			1
+#define cpu_has_divec			1
+/* #define cpu_has_vce			? */
+/* #define cpu_has_cache_cdex_p		? */
+/* #define cpu_has_cache_cdex_s		? */
+#define cpu_has_prefetch		1
+/* #define cpu_has_mcheck		? */
+#define cpu_has_ejtag			1
+#define cpu_has_llsc			1
+
+#define cpu_has_mips16			0
+#define cpu_has_mdmx			0
+#define cpu_has_mips3d			0
+#define cpu_has_smartmips		0
+
+/* #define cpu_has_vtag_icache		? */
+/* #define cpu_has_dc_aliases		? */
+/* #define cpu_has_ic_fills_f_dc	? */
+/* #define cpu_has_pindexed_dcache	? */
+
+/* #define cpu_icache_snoops_remote_store	? */
+
+#define cpu_has_mips32r1		1
+#define cpu_has_mips32r2		0
+#define cpu_has_mips64r1		0
+#define cpu_has_mips64r2		0
+
+#define cpu_has_dsp			0
+#define cpu_has_mipsmt			0
+
+/* #define cpu_has_nofpuex		? */
+#define cpu_has_64bits			0
+#define cpu_has_64bit_zero_reg		0
+#define cpu_has_64bit_gp_regs		0
+#define cpu_has_64bit_addresses		0
+
+/* #define cpu_has_inclusive_pcaches	? */
+
+#define cpu_dcache_line_size()		16
+#define cpu_icache_line_size()		16
+
+#endif /* __ASM_MACH_ADM5120_CPU_FEATURE_OVERRIDES_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/gpio.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/gpio.h
new file mode 100644
index 000000000..7ba7efca1
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/gpio.h
@@ -0,0 +1,115 @@
+/*
+ *  ADM5120 GPIO wrappers for arch-neutral GPIO calls
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _ASM_MIPS_MACH_ADM5120_GPIO_H
+#define _ASM_MIPS_MACH_ADM5120_GPIO_H
+
+#define ARCH_NR_GPIOS	64
+
+#include <asm-generic/gpio.h>
+
+#include <asm/mach-adm5120/adm5120_switch.h>
+
+#define ADM5120_GPIO_PIN0	0
+#define ADM5120_GPIO_PIN1	1
+#define ADM5120_GPIO_PIN2	2
+#define ADM5120_GPIO_PIN3	3
+#define ADM5120_GPIO_PIN4	4
+#define ADM5120_GPIO_PIN5	5
+#define ADM5120_GPIO_PIN6	6
+#define ADM5120_GPIO_PIN7	7
+#define ADM5120_GPIO_P0L0	8
+#define ADM5120_GPIO_P0L1	9
+#define ADM5120_GPIO_P0L2	10
+#define ADM5120_GPIO_P1L0	11
+#define ADM5120_GPIO_P1L1	12
+#define ADM5120_GPIO_P1L2	13
+#define ADM5120_GPIO_P2L0	14
+#define ADM5120_GPIO_P2L1	15
+#define ADM5120_GPIO_P2L2	16
+#define ADM5120_GPIO_P3L0	17
+#define ADM5120_GPIO_P3L1	18
+#define ADM5120_GPIO_P3L2	19
+#define ADM5120_GPIO_P4L0	20
+#define ADM5120_GPIO_P4L1	21
+#define ADM5120_GPIO_P4L2	22
+#define ADM5120_GPIO_MAX	22
+#define ADM5120_GPIO_COUNT	ADM5120_GPIO_MAX+1
+
+#define ADM5120_GPIO_LOW	0
+#define ADM5120_GPIO_HIGH	1
+
+#define ADM5120_GPIO_SWITCH	0x10
+#define ADM5120_GPIO_FLASH	(ADM5120_GPIO_SWITCH | LED_MODE_FLASH)
+#define ADM5120_GPIO_LINK	(ADM5120_GPIO_SWITCH | LED_MODE_LINK)
+#define ADM5120_GPIO_SPEED	(ADM5120_GPIO_SWITCH | LED_MODE_SPEED)
+#define ADM5120_GPIO_DUPLEX	(ADM5120_GPIO_SWITCH | LED_MODE_DUPLEX)
+#define ADM5120_GPIO_ACT	(ADM5120_GPIO_SWITCH | LED_MODE_ACT)
+#define ADM5120_GPIO_COLL	(ADM5120_GPIO_SWITCH | LED_MODE_COLL)
+#define ADM5120_GPIO_LINK_ACT	(ADM5120_GPIO_SWITCH | LED_MODE_LINK_ACT)
+#define ADM5120_GPIO_DUPLEX_COLL (ADM5120_GPIO_SWITCH | LED_MODE_DUPLEX_COLL)
+#define ADM5120_GPIO_10M_ACT	(ADM5120_GPIO_SWITCH | LED_MODE_10M_ACT)
+#define ADM5120_GPIO_100M_ACT	(ADM5120_GPIO_SWITCH | LED_MODE_100M_ACT)
+
+extern int  __adm5120_gpio0_get_value(unsigned gpio);
+extern void __adm5120_gpio0_set_value(unsigned gpio, int value);
+extern int  __adm5120_gpio1_get_value(unsigned gpio);
+extern void __adm5120_gpio1_set_value(unsigned gpio, int value);
+extern int  adm5120_gpio_to_irq(unsigned gpio);
+extern int  adm5120_irq_to_gpio(unsigned irq);
+
+static inline int gpio_get_value(unsigned gpio)
+{
+	int ret;
+
+	switch (gpio) {
+	case ADM5120_GPIO_PIN0 ... ADM5120_GPIO_PIN7:
+		ret = __adm5120_gpio0_get_value(gpio);
+		break;
+	case ADM5120_GPIO_P0L0 ... ADM5120_GPIO_P4L2:
+		ret = __adm5120_gpio1_get_value(gpio - ADM5120_GPIO_P0L0);
+		break;
+	default:
+		ret = __gpio_get_value(gpio);
+		break;
+	}
+
+	return ret;
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+	switch (gpio) {
+	case ADM5120_GPIO_PIN0 ... ADM5120_GPIO_PIN7:
+		__adm5120_gpio0_set_value(gpio, value);
+		break;
+	case ADM5120_GPIO_P0L0 ... ADM5120_GPIO_P4L2:
+		__adm5120_gpio1_set_value(gpio - ADM5120_GPIO_P0L0, value);
+		break;
+	default:
+		__gpio_set_value(gpio, value);
+		break;
+	}
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+	return adm5120_gpio_to_irq(gpio);
+}
+
+static inline int irq_to_gpio(unsigned irq)
+{
+	return adm5120_irq_to_gpio(irq);
+}
+
+#define gpio_cansleep	__gpio_cansleep
+
+#endif /* _ASM_MIPS_MACH_ADM5120_GPIO_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/irq.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/irq.h
new file mode 100644
index 000000000..b0350c8b8
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/irq.h
@@ -0,0 +1,43 @@
+/*
+ *  ADM5120 specific IRQ numbers
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef _ASM_MIPS_MACH_ADM5120_IRQ_H
+#define _ASM_MIPS_MACH_ADM5120_IRQ_H
+
+#define MIPS_CPU_IRQ_BASE	0
+#define NR_IRQS			24
+
+#include_next <irq.h>
+
+#include <asm/mach-adm5120/adm5120_intc.h>
+
+#define NO_IRQ			(-1)
+
+#define MIPS_CPU_IRQ_COUNT	8
+#define MIPS_CPU_IRQ(x)		(MIPS_CPU_IRQ_BASE + (x))
+
+#define ADM5120_INTC_IRQ_BASE	(MIPS_CPU_IRQ_BASE + MIPS_CPU_IRQ_COUNT)
+#define ADM5120_INTC_IRQ(x)	(ADM5120_INTC_IRQ_BASE + (x))
+
+#define ADM5120_IRQ_INTC	MIPS_CPU_IRQ(2)
+#define ADM5120_IRQ_COUNTER	MIPS_CPU_IRQ(7)
+
+#define ADM5120_IRQ_TIMER	ADM5120_INTC_IRQ(INTC_IRQ_TIMER)
+#define ADM5120_IRQ_UART0	ADM5120_INTC_IRQ(INTC_IRQ_UART0)
+#define ADM5120_IRQ_UART1	ADM5120_INTC_IRQ(INTC_IRQ_UART1)
+#define ADM5120_IRQ_USBC	ADM5120_INTC_IRQ(INTC_IRQ_USBC)
+#define ADM5120_IRQ_GPIO2	ADM5120_INTC_IRQ(INTC_IRQ_GPIO2)
+#define ADM5120_IRQ_GPIO4	ADM5120_INTC_IRQ(INTC_IRQ_GPIO4)
+#define ADM5120_IRQ_PCI0	ADM5120_INTC_IRQ(INTC_IRQ_PCI0)
+#define ADM5120_IRQ_PCI1	ADM5120_INTC_IRQ(INTC_IRQ_PCI1)
+#define ADM5120_IRQ_PCI2	ADM5120_INTC_IRQ(INTC_IRQ_PCI2)
+#define ADM5120_IRQ_SWITCH	ADM5120_INTC_IRQ(INTC_IRQ_SWITCH)
+
+#endif /* _ASM_MIPS_MACH_ADM5120_IRQ_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/admboot.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/admboot.h
new file mode 100644
index 000000000..fa42bf714
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/admboot.h
@@ -0,0 +1,17 @@
+/*
+ *  ADMBoot specific definitions
+ *
+ *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _ADMBOOT_H
+#define _ADMBOOT_H
+
+extern int admboot_get_mac_base(u32 offset, u32 len, u8 *mac) __init;
+
+#endif /* _ADMBOOT_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/cfe.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/cfe.h
new file mode 100644
index 000000000..0cb3eee70
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/cfe.h
@@ -0,0 +1,18 @@
+/*
+ *  Broadcom's CFE definitions
+ *
+ *  Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _PROM_CFE_H_
+#define _PROM_CFE_H_
+
+extern int cfe_present(void) __init;
+extern char *cfe_getenv(char *);
+
+#endif /*_PROM_CFE_H_*/
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/generic.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/generic.h
new file mode 100644
index 000000000..778df2467
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/generic.h
@@ -0,0 +1,18 @@
+/*
+ *  Generic prom definitions
+ *
+ *  Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _PROM_GENERIC_H_
+#define _PROM_GENERIC_H_
+
+extern int generic_prom_present(void) __init;
+extern char *generic_prom_getenv(char *);
+
+#endif /*_PROM_GENERIC_H_*/
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/myloader.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/myloader.h
new file mode 100644
index 000000000..ea8db81ed
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/myloader.h
@@ -0,0 +1,179 @@
+/*
+ *  Compex's MyLoader specific definitions
+ *
+ *  Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MYLOADER_H_
+#define _MYLOADER_H_
+
+/*
+ * Firmware file format:
+ *
+ *	<header>
+ *	[<block descriptor 0>]
+ *	...
+ *	[<block descriptor n>]
+ *	<null block descriptor>
+ *	[<block data 0>]
+ *	...
+ *	[<block data n>]
+ *
+ *
+ */
+
+/* Myloader specific magic numbers */
+#define MYLO_MAGIC_FIRMWARE	0x4C594D00
+#define MYLO_MAGIC_20021103	0x20021103
+#define MYLO_MAGIC_20021107	0x20021107
+
+#define MYLO_MAGIC_SYS_PARAMS	MYLO_MAGIC_20021107
+#define MYLO_MAGIC_PARTITIONS	MYLO_MAGIC_20021103
+#define MYLO_MAGIC_BOARD_PARAMS	MYLO_MAGIC_20021103
+
+/*
+ * Addresses of the data structures provided by MyLoader
+ */
+#define MYLO_MIPS_SYS_PARAMS	0x80000800	/* System Parameters */
+#define MYLO_MIPS_BOARD_PARAMS	0x80000A00	/* Board Parameters */
+#define MYLO_MIPS_PARTITIONS	0x80000C00	/* Partition Table */
+#define MYLO_MIPS_BOOT_PARAMS	0x80000E00	/* Boot Parameters */
+
+/* Vendor ID's (seems to be same as the PCI vendor ID's) */
+#define VENID_COMPEX		0x11F6
+
+/* Devices based on the ADM5120 */
+#define DEVID_COMPEX_NP27G	0x0078
+#define DEVID_COMPEX_NP28G	0x044C
+#define DEVID_COMPEX_NP28GHS	0x044E
+#define DEVID_COMPEX_WP54Gv1C	0x0514
+#define DEVID_COMPEX_WP54G	0x0515
+#define DEVID_COMPEX_WP54AG	0x0546
+#define DEVID_COMPEX_WPP54AG	0x0550
+#define DEVID_COMPEX_WPP54G	0x0555
+
+/* Devices based on the IXP422 */
+#define DEVID_COMPEX_WP18	0x047E
+#define DEVID_COMPEX_NP18A	0x0489
+
+/* Other devices */
+#define DEVID_COMPEX_NP26G8M	0x03E8
+#define DEVID_COMPEX_NP26G16M	0x03E9
+
+struct mylo_fw_header {
+	uint32_t	magic;	/* must be MYLO_MAGIC_FIRMWARE */
+	uint32_t	crc;	/* CRC of the whole firmware */
+	uint32_t	res0;	/* unknown/unused */
+	uint32_t	res1;	/* unknown/unused */
+	uint16_t	vid;	/* vendor ID */
+	uint16_t	did;	/* device ID */
+	uint16_t	svid;	/* sub vendor ID */
+	uint16_t	sdid;	/* sub device ID */
+	uint32_t	rev;	/* device revision */
+	uint32_t	fwhi;	/* FIXME: firmware version high? */
+	uint32_t	fwlo;	/* FIXME: firmware version low? */
+	uint32_t	flags;	/* firmware flags */
+};
+
+#define FW_FLAG_BOARD_PARAMS_WP	0x01 /* board parameters are write protected */
+#define FW_FLAG_BOOT_SECTOR_WE	0x02 /* enable of write boot sectors (below 64K) */
+
+struct mylo_fw_blockdesc {
+	uint32_t	type;	/* block type */
+	uint32_t	addr;	/* relative address to flash start */
+	uint32_t	dlen;	/* size of block data in bytes */
+	uint32_t	blen;	/* total size of block in bytes */
+};
+
+#define FW_DESC_TYPE_UNUSED	0
+#define FW_DESC_TYPE_USED	1
+
+struct mylo_partition {
+	uint16_t	flags;	/* partition flags */
+	uint16_t	type;	/* type of the partition */
+	uint32_t	addr;	/* relative address of the partition from the
+				   flash start */
+	uint32_t	size;	/* size of the partition in bytes */
+	uint32_t	param;	/* if this is the active partition, the
+				   MyLoader load code to this address */
+};
+
+#define PARTITION_FLAG_ACTIVE	0x8000 /* this is the active partition,
+					* MyLoader loads firmware from here */
+#define PARTITION_FLAG_ISRAM	0x2000 /* FIXME: this is a RAM partition? */
+#define PARTIIION_FLAG_RAMLOAD	0x1000 /* FIXME: load this partition into the RAM? */
+#define PARTITION_FLAG_PRELOAD	0x0800 /* the partition data preloaded to RAM
+					* before decompression */
+#define PARTITION_FLAG_HAVEHDR  0x0002 /* the partition data have a header */
+
+#define PARTITION_TYPE_FREE	0
+#define PARTITION_TYPE_USED	1
+
+#define MYLO_MAX_PARTITIONS	8	/* maximum number of partitions in the
+					   partition table */
+
+struct mylo_partition_table {
+	uint32_t	magic;	/* must be MYLO_MAGIC_PARTITIONS */
+	uint32_t	res0;	/* unknown/unused */
+	uint32_t	res1;	/* unknown/unused */
+	uint32_t 	res2;	/* unknown/unused */
+	struct mylo_partition partitions[MYLO_MAX_PARTITIONS];
+};
+
+struct mylo_partition_header {
+	uint32_t	len;	/* length of the partition data */
+	uint32_t	crc;	/* CRC value of the partition data */
+};
+
+struct mylo_system_params {
+	uint32_t	magic;	/* must be MYLO_MAGIC_SYS_PARAMS */
+	uint32_t	res0;
+	uint32_t	res1;
+	uint32_t	mylo_ver;
+	uint16_t	vid;	/* Vendor ID */
+	uint16_t	did;	/* Device ID */
+	uint16_t	svid;	/* Sub Vendor ID */
+	uint16_t	sdid;	/* Sub Device ID */
+	uint32_t	rev;	/* device revision */
+	uint32_t	fwhi;
+	uint32_t	fwlo;
+	uint32_t	tftp_addr;
+	uint32_t	prog_start;
+	uint32_t	flash_size;	/* Size of boot FLASH in bytes */
+	uint32_t	dram_size;	/* Size of onboard RAM in bytes */
+};
+
+
+struct mylo_eth_addr {
+	uint8_t	mac[6];
+	uint8_t	csum[2];
+};
+
+#define MYLO_ETHADDR_COUNT	8	/* maximum number of ethernet address
+					   in the board parameters */
+
+struct mylo_board_params {
+	uint32_t	magic;	/* must be MYLO_MAGIC_BOARD_PARAMS */
+	uint32_t	res0;
+	uint32_t	res1;
+	uint32_t	res2;
+	struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT];
+};
+
+struct myloader_info {
+	u32	vid;
+	u32	did;
+	u32	svid;
+	u32	sdid;
+	uint8_t macs[MYLO_ETHADDR_COUNT][6];
+};
+
+extern struct myloader_info myloader_info;
+extern int myloader_present(void) __init;
+
+#endif /* _MYLOADER_H_*/
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/routerboot.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/routerboot.h
new file mode 100644
index 000000000..91ac05a63
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/routerboot.h
@@ -0,0 +1,36 @@
+/*
+ *  Mikrotik's RouterBOOT definitions
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _PROM_ROUTERBOOT_H_
+#define _PROM_ROUTERBOOT_H_
+
+struct rb_bios_settings {
+	u32	hs_offs; /* hard settings offset */
+	u32	hs_size; /* hard settings size */
+	u32	fw_offs; /* firmware offset */
+	u32	ss_offs; /* soft settings offset */
+	u32	ss_size; /* soft settings size */
+};
+
+struct rb_hard_settings {
+	char	*name;		/* board name */
+	char	*bios_ver;	/* BIOS version */
+	u32	mem_size;	/* memory size in bytes */
+	u32	mac_count;	/* number of mac addresses */
+	u8	*mac_base;	/* mac address base */
+};
+
+extern int routerboot_present(void) __init;
+extern char *routerboot_get_boardname(void);
+
+extern struct rb_hard_settings rb_hs;
+
+#endif /* _PROM_ROUTERBOOT_H_ */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/zynos.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/zynos.h
new file mode 100644
index 000000000..d1e3e5b94
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/prom/zynos.h
@@ -0,0 +1,86 @@
+/*
+ *  ZyNOS (ZyXEL's Networking OS) definitions
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef _ZYNOS_H
+#define _ZYNOS_H
+
+#define ZYNOS_NAME_LEN		32
+#define ZYNOS_FEAT_BYTES	22
+#define ZYNOS_MAC_LEN		6
+
+struct zynos_board_info {
+	unsigned char	vendor[ZYNOS_NAME_LEN];
+	unsigned char	product[ZYNOS_NAME_LEN];
+	u32		bootext_addr;
+	u32		res0;
+	u16		board_id;
+	u8		res1[6];
+	u8		feat_other[ZYNOS_FEAT_BYTES];
+	u8		feat_main;
+	u8		res2;
+	u8		mac[ZYNOS_MAC_LEN];
+	u8		country;
+	u8		dbgflag;
+} __attribute__ ((packed));
+
+/*
+ * Vendor IDs
+ */
+#define ZYNOS_VENDOR_ID_ZYXEL	0
+#define ZYNOS_VENDOR_ID_NETGEAR	1
+#define ZYNOS_VENDOR_ID_DLINK	2
+#define ZYNOS_VENDOR_ID_OTHER	3
+#define ZYNOS_VENDOR_ID_LUCENT	4
+
+/*
+ * Vendor names
+ */
+#define ZYNOS_VENDOR_DLINK	"D-Link"
+#define ZYNOS_VENDOR_LUCENT	"LUCENT"
+#define ZYNOS_VENDOR_NETGEAR	"NetGear"
+#define ZYNOS_VENDOR_ZYXEL	"ZyXEL"
+
+/*
+ * Board IDs (big-endian)
+ */
+#define ZYNOS_BOARD_ES2108	0x00F2	/* Ethernet Switch 2108 */
+#define ZYNOS_BOARD_ES2108F	0x01AF	/* Ethernet Switch 2108-F */
+#define ZYNOS_BOARD_ES2108G	0x00F3	/* Ethernet Switch 2108-G */
+#define ZYNOS_BOARD_ES2108LC	0x00FC	/* Ethernet Switch 2108-LC */
+#define ZYNOS_BOARD_ES2108PWR	0x00F4	/* Ethernet Switch 2108PWR */
+#define ZYNOS_BOARD_HS100	0x9FF1	/* HomeSafe 100/100W */
+#define ZYNOS_BOARD_P334	0x9FF5	/* Prestige 334 */
+#define ZYNOS_BOARD_P334U	0x9FDD	/* Prestige 334U */
+#define ZYNOS_BOARD_P334W	0x9FF3	/* Prestige 334W */
+#define ZYNOS_BOARD_P334WH	0x00E0	/* Prestige 334WH */
+#define ZYNOS_BOARD_P334WHD	0x00E1	/* Prestige 334WHD */
+#define ZYNOS_BOARD_P334WT	0x9FEF	/* Prestige 334WT */
+#define ZYNOS_BOARD_P334WT_ALT	0x9F02	/* Prestige 334WT alternative*/
+#define ZYNOS_BOARD_P335	0x9FED	/* Prestige 335/335WT */
+#define ZYNOS_BOARD_P335PLUS	0x0025	/* Prestige 335Plus */
+#define ZYNOS_BOARD_P335U	0x9FDC	/* Prestige 335U */
+
+/*
+ * Some magic numbers (big-endian)
+ */
+#define ZYNOS_MAGIC_DBGAREA1	0x48646267	/* "Hdbg" */
+#define ZYNOS_MAGIC_DBGAREA2	0x61726561	/* "area" */
+
+struct bootbase_info {
+	u16		vendor_id;
+	u16		board_id;
+	u8		mac[6];
+};
+
+extern struct bootbase_info bootbase_info;
+extern int bootbase_present(void) __init;
+
+#endif /* _ZYNOS_H */
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/war.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/war.h
new file mode 100644
index 000000000..87c35f375
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_ADM5120_WAR_H
+#define __ASM_MIPS_MACH_ADM5120_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR	0
+#define R4600_V1_HIT_CACHEOP_WAR	0
+#define R4600_V2_HIT_CACHEOP_WAR	0
+#define R5432_CP0_INTERRUPT_WAR		0
+#define BCM1250_M3_WAR			0
+#define SIBYTE_1956_WAR			0
+#define MIPS4K_ICACHE_REFILL_WAR	0
+#define MIPS_CACHE_SYNC_WAR		0
+#define TX49XX_ICACHE_INDEX_INV_WAR	0
+#define RM9000_CDEX_SMP_WAR		0
+#define ICACHE_REFILLS_WORKAROUND_WAR	0
+#define R10000_LLSC_WAR			0
+#define MIPS34K_MISSED_ITLB_WAR		0
+
+#endif /* __ASM_MIPS_MACH_ADM5120_WAR_H */
diff --git a/target/linux/adm5120/files/arch/mips/pci/pci-adm5120.c b/target/linux/adm5120/files/arch/mips/pci/pci-adm5120.c
new file mode 100644
index 000000000..f8d359806
--- /dev/null
+++ b/target/linux/adm5120/files/arch/mips/pci/pci-adm5120.c
@@ -0,0 +1,277 @@
+/*
+ *  ADM5120 PCI Host Controller driver
+ *
+ *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This code was based on the ADM5120 specific port of the Linux 2.6.10 kernel
+ *  done by Jeroen Vreeken
+ *	Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
+ *
+ *  Jeroen's code was based on the Linux 2.4.xx source codes found in various
+ *  tarballs released by Edimax for it's ADM5120 based devices
+ *	Copyright (C) ADMtek Incorporated
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
+#include <linux/pci_regs.h>
+
+#include <asm/bootinfo.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG(f, a...)	printk(KERN_DEBUG f, ## a)
+#else
+#define DBG(f, a...)	do {} while (0)
+#endif
+
+#define PCI_ENABLE 0x80000000
+
+/* -------------------------------------------------------------------------*/
+
+static unsigned int adm5120_pci_nr_irqs __initdata;
+static struct adm5120_pci_irq *adm5120_pci_irq_map __initdata;
+
+static DEFINE_SPINLOCK(pci_lock);
+
+/* -------------------------------------------------------------------------*/
+
+static inline void write_cfgaddr(u32 addr)
+{
+	__raw_writel((addr | PCI_ENABLE),
+		(void __iomem *)(KSEG1ADDR(ADM5120_PCICFG_ADDR)));
+}
+
+static inline void write_cfgdata(u32 data)
+{
+	__raw_writel(data, (void __iomem *)KSEG1ADDR(ADM5120_PCICFG_DATA));
+}
+
+static inline u32 read_cfgdata(void)
+{
+	return __raw_readl((void __iomem *)KSEG1ADDR(ADM5120_PCICFG_DATA));
+}
+
+static inline u32 mkaddr(struct pci_bus *bus, unsigned int devfn, int where)
+{
+	return ((bus->number & 0xFF) << 16) | ((devfn & 0xFF) << 8) | \
+		(where & 0xFC);
+}
+
+/* -------------------------------------------------------------------------*/
+
+static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
+		int size, u32 *val)
+{
+	unsigned long flags;
+	u32 data;
+
+	spin_lock_irqsave(&pci_lock, flags);
+
+	write_cfgaddr(mkaddr(bus, devfn, where));
+	data = read_cfgdata();
+
+	DBG("PCI: cfg_read  %02u.%02u.%01u/%02X:%01d, cfg:0x%08X",
+		bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn),
+		where, size, data);
+
+	switch (size) {
+	case 1:
+		if (where & 1)
+			data >>= 8;
+		if (where & 2)
+			data >>= 16;
+		data &= 0xFF;
+		break;
+	case 2:
+		if (where & 2)
+			data >>= 16;
+		data &= 0xFFFF;
+		break;
+	}
+
+	*val = data;
+	DBG(", 0x%08X returned\n", data);
+
+	spin_unlock_irqrestore(&pci_lock, flags);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
+		int size, u32 val)
+{
+	unsigned long flags;
+	u32 data;
+	int s;
+
+	spin_lock_irqsave(&pci_lock, flags);
+
+	write_cfgaddr(mkaddr(bus, devfn, where));
+	data = read_cfgdata();
+
+	DBG("PCI: cfg_write %02u.%02u.%01u/%02X:%01d, cfg:0x%08X",
+		bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn),
+		where, size, data);
+
+	switch (size) {
+	case 1:
+		s = ((where & 3) << 3);
+		data &= ~(0xFF << s);
+		data |= ((val & 0xFF) << s);
+		break;
+	case 2:
+		s = ((where & 2) << 4);
+		data &= ~(0xFFFF << s);
+		data |= ((val & 0xFFFF) << s);
+		break;
+	case 4:
+		data = val;
+		break;
+	}
+
+	write_cfgdata(data);
+	DBG(", 0x%08X written\n", data);
+
+	spin_unlock_irqrestore(&pci_lock, flags);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops adm5120_pci_ops = {
+	.read	= pci_config_read,
+	.write	= pci_config_write,
+};
+
+/* -------------------------------------------------------------------------*/
+
+static void adm5120_pci_fixup(struct pci_dev *dev)
+{
+	if (dev->devfn != 0)
+		return;
+
+	/* setup COMMAND register */
+	pci_write_config_word(dev, PCI_COMMAND,
+		(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER));
+
+	/* setup CACHE_LINE_SIZE register */
+	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 4);
+
+	/* setup BARS */
+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0);
+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
+}
+
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ADMTEK, PCI_DEVICE_ID_ADMTEK_ADM5120,
+	adm5120_pci_fixup);
+
+/* -------------------------------------------------------------------------*/
+
+void __init adm5120_pci_set_irq_map(unsigned int nr_irqs,
+		struct adm5120_pci_irq *map)
+{
+	adm5120_pci_nr_irqs = nr_irqs;
+	adm5120_pci_irq_map = map;
+}
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+	int irq = -1;
+	int i;
+
+	if ((!adm5120_pci_nr_irqs) || (!adm5120_pci_irq_map)) {
+		printk(KERN_ALERT "PCI: pci_irq_map is not initialized\n");
+		goto out;
+	}
+
+	if (slot < 1 || slot > 4) {
+		printk(KERN_ALERT "PCI: slot number %u is not supported\n",
+			slot);
+		goto out;
+	}
+
+	for (i = 0; i < adm5120_pci_nr_irqs; i++) {
+		if ((adm5120_pci_irq_map[i].slot == slot)
+			&& (adm5120_pci_irq_map[i].func == PCI_FUNC(dev->devfn))
+			&& (adm5120_pci_irq_map[i].pin == pin)) {
+			irq = adm5120_pci_irq_map[i].irq;
+			break;
+		}
+	}
+
+	if (irq < 0) {
+		printk(KERN_ALERT "PCI: no irq found for %s pin:%u\n",
+			pci_name((struct pci_dev *)dev), pin);
+	} else {
+		printk(KERN_INFO "PCI: mapping irq for %s pin:%u, irq:%d\n",
+			pci_name((struct pci_dev *)dev), pin, irq);
+	}
+
+out:
+	return irq;
+}
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+	return 0;
+}
+
+/* -------------------------------------------------------------------------*/
+
+static struct resource pci_io_resource = {
+	.name	= "ADM5120 PCI I/O",
+	.start	= ADM5120_PCIIO_BASE,
+	.end	= ADM5120_PCICFG_ADDR-1,
+	.flags	= IORESOURCE_IO
+};
+
+static struct resource pci_mem_resource = {
+	.name	= "ADM5120 PCI MEM",
+	.start	= ADM5120_PCIMEM_BASE,
+	.end	= ADM5120_PCIIO_BASE-1,
+	.flags	= IORESOURCE_MEM
+};
+
+static struct pci_controller adm5120_controller = {
+	.pci_ops	= &adm5120_pci_ops,
+	.io_resource	= &pci_io_resource,
+	.mem_resource	= &pci_mem_resource,
+};
+
+static int __init adm5120_pci_setup(void)
+{
+	if (adm5120_package_pqfp()) {
+		printk(KERN_INFO "PCI: not available on ADM5120P\n");
+		return -1;
+	}
+
+	/* Avoid ISA compat ranges.  */
+	PCIBIOS_MIN_IO = 0x00000000;
+	PCIBIOS_MIN_MEM = 0x00000000;
+
+	/* Set I/O resource limits.  */
+	ioport_resource.end = 0x1fffffff;
+	iomem_resource.end = 0xffffffff;
+
+	register_pci_controller(&adm5120_controller);
+	return 0;
+}
+
+arch_initcall(adm5120_pci_setup);