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The pin maps in this document are included for informational purposes
only. The final arbiters of truth are the PIN_MAP definitions in
../wirish/boards.h and the STM32 datasheets.
====
Maple
====
Reserved Pins: Function
PA11 USBDM
PA12 USBDP
PA13 JTMS-SWDAT
PA14 JTCK-SWCLK
PA15 JTDI
PB2 BOOT1
PB3 JTDO
PB4 JTRST
PC9 BUT button
PC11 USB_P
PC12 DISC
PD0 OSC_IN
PD1 OSC_OUT
Alternate function remaps:
None?
-------------------------------------------------------------------------------
Pin STM32 PIN ADC Timer I2C UART SPI 5v?
-------------------------------------------------------------------------------
D0 PA3 ADC3 TIM2_CH4 - USART2_RX - -
D1 PA2 ADC2 TIM2_CH3 - USART2_TX - -
D2 PA0 ADC0 TIM2_CH1_ETR - USART2_CTS - -
D3 PA1 ADC1 TIM2_CH2 - USART2_RTS - -
D4 PB5 - - ISC1_SMBA - - -
D5 PB6 - TIM4_CH1 I2C1_SCL - - Y
D6 PA8 - TIM1_CH1 - USART1_CK - Y
D7 PA9 - TIM1_CH2 - USART1_TX - Y
D8 PA10 - TIM1_CH3 - USART1_RX - Y
D9 PB7 - TIM4_CH2 I2C1_SDA - - Y
D10 PA4 ADC4 - - USART2_CK SPI1_NSS -
D11 PA7 ADC7 TIM3_CH2 - - SPI1_MOSI -
D12 PA6 ADC6 TIM3_CH1 - - SPI1_MISO -
D13 PA5 ADC5 - - - SPI1_SCK -
D14 PB8 0 TIM4_CH3 - - - Y
-------------------------------------------------------------------------------
Little header
-------------------------------------------------------------------------------
D15 PC0 ADC10 - - - - -
D16 PC1 ADC11 - - - - -
D17 PC2 ADC12 - - - - -
D18 PC3 ADC13 - - - - -
D19 PC4 ADC14 - - - - -
D20 PC5 ADC15 - - - - -
-------------------------------------------------------------------------------
External header
-------------------------------------------------------------------------------
D21 PC13 - - - - - -
D22 PC14 - - - - - -
D23 PC15 - - - - - -
D24 PB9 - TIM4_CH4 - - - Y
D25 PD2 - TIM3_ETR - - - Y
D26 PC10 - - - - - Y
D27 PB0 ADC8 TIM3_CH3 - - - -
D28 PB1 ADC9 TIM3_CH4 - - - -
D29 PB10 - - I2C2_SCL USART3_TX - Y
D30 PB11 - - I2C2_SDA USART3_RX - Y
D31 PB12 - TIM1_BKIN I2C2_SMBAL USART3_CK SPI2_NSS Y
D32 PB13 - TIM1_CH1N - USART3_CTS SPI2_SCK Y
D33 PB14 - TIM1_CH2N - USART3_RTS SPI2_MISO Y
D34 PB15 - TIM1_CH3N - - SPI2_MOSI Y
D35 PC6 - - - - - Y
D36 PC7 - - - - - Y
D37 PC8 - - - - - Y
-------------------------------------------------------------------------------
Note: former pin D38 (PC9) is now attached to the BUT button and there is a
GND connection where D38 was.
TODO:
- [?] JTAG pins for GPIO
==========
Maple Mini
==========
Reserved pins:
Pin Function
--- --------
PA11 USBDM
PA12 USBDP
PB8 BUT button
PB9 DISC
PD0 OSC_IN
PD1 OSC_OUT
Alternate function remaps:
Pin Default Remap
--- ------- -----
PB4 JNTRST GPIO
PB3 JTDO GPIO
PA15 JTDI GPIO
PA14 JTCK GPIO
PA13 JTMS GPIO
-------------------------------------------------------------------------------
Pin STM32 PIN ADC Timer I2C USART SPI 5v?
-------------------------------------------------------------------------------
D0 PB11 - - I2C2_SDA USART3_RX - Y
D1 PB10 - - I2C2_SCL USART3_TX - Y
D2 PB2 - - - - - Y
D3 PB0 ADC8 TIM3_CH3 - - - -
D4 PA7 ADC7 TIM3_CH2 - - SPI1_MOSI -
D5 PA6 ADC6 TIM3_CH1 - - SPI1_MISO -
D6 PA5 ADC5 - - - SPI1_SCK -
D7 PA4 ADC4 - - USART2_CK SPI1_NSS -
D8 PA3 ADC3 TIM2_CH4 - USART2_RX - -
D9 PA2 ADC2 TIM2_CH3 - USART2_TX - -
D10 PA1 ADC1 TIM2_CH2 - USART2_RTS - -
D11 PA0 ADC0 TIM2_CH1_ETR - USART2_CTS - -
D12 PC15 - - - - - -
D13 PC14 - - - - - -
D14 PC13 - - - - - -
D15 PB7 - TIM4_CH2 I2C1_SDA - - Y
D16 PB6 - TIM4_CH1 I2C1_SCL - - Y
D17 PB5 - - I2C1_SMBA - - -
D18 PB4 - - - - - Y
D19 PB3 - - - - - Y
D20 PA15 - - - - - Y
D21 PA14 - - - - - Y
D22 PA13 - - - - - Y
# D23 is USBDP, but supports:
PA12 - - - - - Y
# D24 is USBDM, but supports:
PA11 - - - - - Y
D25 PA10 - TIM1_CH3 - USART1_RX - Y
D26 PA9 - TIM1_CH2 - USART1_TX - Y
D27 PA8 - TIM1_CH1 - USART1_CK - Y
D28 PB15 - TIM1_CH3N - - SPI2_MOSI Y
D29 PB14 - TIM1_CH2N - USART3_RTS SPI2_MISO Y
D30 PB13 - TIM1_CH1N - USART3_CTS SPI2_SCK Y
D31 PB12 - TIM1_BKIN I2C2_SMBAL USART3_CK SPI2_NSS Y
D32 PB8 0 TIM4_CH3 - - - Y
D33 PB1 ADC9 TIM3_CH4 - - - -
TODO:
- [?] JTAG pins for GPIO
============
Maple Native
============
Reserved pins:
TODO
Alternate function remaps:
TODO
The pin map on Maple Native is in flux. However, the bank/port pin
definitions are available in notes/native-pin-definitions.txt.
|
